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Change all time conversions. Yech. New timer units in microseconds breaks all existing logic that used milliseconds in the conversions. Something likely got broken doing this, probably because I confused a MSEC2TICK conversion with a TICK2MSEC conversion. Also, the tickless OS no appears fully functional and passes the OS test on the simulator with no errors

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This commit is contained in:
Gregory Nutt 2014-08-07 18:00:38 -06:00
parent 8b2a8fceba
commit 39183d37b8
30 changed files with 50 additions and 53 deletions
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2
arch/8051/src/up_unblocktask.c
View file

@ -100,7 +100,7 @@ void up_unblock_task(FAR struct tcb_s *tcb)
*/
#if CONFIG_RR_INTERVAL > 0
tcb->timeslice = CONFIG_RR_INTERVAL / MSEC_PER_TICK;
tcb->timeslice = MSEC2TICK(CONFIG_RR_INTERVAL);
#endif
/* Add the task in the correct location in the prioritized

2
arch/arm/src/arm/up_unblocktask.c
View file

@ -97,7 +97,7 @@ void up_unblock_task(struct tcb_s *tcb)
*/
#if CONFIG_RR_INTERVAL > 0
tcb->timeslice = CONFIG_RR_INTERVAL / MSEC_PER_TICK;
tcb->timeslice = MSEC2TICK(CONFIG_RR_INTERVAL);
#endif
/* Add the task in the correct location in the prioritized

2
arch/arm/src/armv6-m/up_unblocktask.c
View file

@ -96,7 +96,7 @@ void up_unblock_task(struct tcb_s *tcb)
*/
#if CONFIG_RR_INTERVAL > 0
tcb->timeslice = CONFIG_RR_INTERVAL / MSEC_PER_TICK;
tcb->timeslice = MSEC2TICK(CONFIG_RR_INTERVAL);
#endif
/* Add the task in the correct location in the prioritized

2
arch/arm/src/armv7-a/arm_unblocktask.c
View file

@ -97,7 +97,7 @@ void up_unblock_task(struct tcb_s *tcb)
*/
#if CONFIG_RR_INTERVAL > 0
tcb->timeslice = CONFIG_RR_INTERVAL / MSEC_PER_TICK;
tcb->timeslice = MSEC2TICK(CONFIG_RR_INTERVAL);
#endif
/* Add the task in the correct location in the prioritized

2
arch/arm/src/armv7-m/up_unblocktask.c
View file

@ -97,7 +97,7 @@ void up_unblock_task(struct tcb_s *tcb)
*/
#if CONFIG_RR_INTERVAL > 0
tcb->timeslice = CONFIG_RR_INTERVAL / MSEC_PER_TICK;
tcb->timeslice = MSEC2TICK(CONFIG_RR_INTERVAL);
#endif
/* Add the task in the correct location in the prioritized

4
arch/arm/src/c5471/c5471_timerisr.c
View file

@ -53,7 +53,7 @@
************************************************************/
/* We want the general purpose timer running at the rate
* MSEC_PER_TICK. The C5471 clock is 47.5MHz and we're using
* USEC_PER_TICK. The C5471 clock is 47.5MHz and we're using
* a timer PTV value of 3 (3 == divide incoming frequency by
* 16) which then yields a 16 bitCLKS_PER_INT value
* of 29687.
@ -114,7 +114,7 @@ void up_timer_initialize(void)
up_disable_irq(C5471_IRQ_SYSTIMER);
/* Start the general purpose timer running in auto-reload mode
* so that an interrupt is generated at the rate MSEC_PER_TICK.
* so that an interrupt is generated at the rate USEC_PER_TICK.
*/
val = ((CLKS_PER_INT-1) << CLKS_PER_INT_SHIFT) | AR | ST | PTV;

2
arch/arm/src/dm320/dm320_timerisr.c
View file

@ -139,7 +139,7 @@ void up_timer_initialize(void)
up_disable_irq(DM320_IRQ_SYSTIMER);
/* Start timer0 running so that an interrupt is generated at
* the rate MSEC_PER_TICK.
* the rate USEC_PER_TICK.
*/
putreg16(DM320_TMR0_PRSCL, DM320_TIMER0_TMPRSCL); /* Timer 0 Prescalar */

4
arch/arm/src/imx/imx_timerisr.c
View file

@ -138,11 +138,11 @@ void up_timer_initialize(void)
* putreg(0, IMX_TIMER1_TPRER); -- already the case
*
* Set the compare register so that the COMP interrupt is generated
* with a period of MSEC_PER_TICK. The value IMX_PERCLK1_FREQ/1000
* with a period of USEC_PER_TICK. The value IMX_PERCLK1_FREQ/1000
* (defined in board.h) is the number of counts in millisecond, so:
*/
putreg32((IMX_PERCLK1_FREQ / 1000) * MSEC_PER_TICK, IMX_TIMER1_TCMP);
putreg32(MSEC2TICK(IMX_PERCLK1_FREQ / 1000), IMX_TIMER1_TCMP);
/* Configure to provide timer COMP interrupts when TCN increments
* to TCMP.

2
arch/arm/src/kinetis/kinetis_sdhc.c
View file

@ -2409,7 +2409,7 @@ static sdio_eventset_t kinetis_eventwait(FAR struct sdio_dev_s *dev,
/* Start the watchdog timer */
delay = (timeout + (MSEC_PER_TICK-1)) / MSEC_PER_TICK;
delay = MSEC2TICK(timeout);
ret = wd_start(priv->waitwdog, delay, (wdentry_t)kinetis_eventtimeout,
1, (uint32_t)priv);
if (ret != OK)

2
arch/arm/src/lpc17xx/lpc17_sdcard.c
View file

@ -2266,7 +2266,7 @@ static sdio_eventset_t lpc17_eventwait(FAR struct sdio_dev_s *dev,
/* Start the watchdog timer */
delay = (timeout + (MSEC_PER_TICK-1)) / MSEC_PER_TICK;
delay = MSEC2TICK(timeout);
ret = wd_start(priv->waitwdog, delay, (wdentry_t)lpc17_eventtimeout,
1, (uint32_t)priv);
if (ret != OK)

2
arch/arm/src/sam34/sam_hsmci.c
View file

@ -2273,7 +2273,7 @@ static sdio_eventset_t sam_eventwait(FAR struct sdio_dev_s *dev,
/* Start the watchdog timer */
delay = (timeout + (MSEC_PER_TICK-1)) / MSEC_PER_TICK;
delay = MSEC2TICK(timeout);
ret = wd_start(priv->waitwdog, delay, (wdentry_t)sam_eventtimeout,
1, (uint32_t)priv);
if (ret != OK)

2
arch/arm/src/sam34/sam_spi.c
View file

@ -127,7 +127,7 @@
*/
#define DMA_TIMEOUT_MS (800)
#define DMA_TIMEOUT_TICKS ((DMA_TIMEOUT_MS + (MSEC_PER_TICK-1)) / MSEC_PER_TICK)
#define DMA_TIMEOUT_TICKS MSEC2TICK(DMA_TIMEOUT_MS)
/* Debug *******************************************************************/
/* Check if SPI debut is enabled (non-standard.. no support in

2
arch/arm/src/sama5/sam_hsmci.c
View file

@ -2737,7 +2737,7 @@ static sdio_eventset_t sam_eventwait(FAR struct sdio_dev_s *dev,
timeout = MAX(5000, timeout);
}
delay = (timeout + (MSEC_PER_TICK-1)) / MSEC_PER_TICK;
delay = MSEC2TICK(timeout);
ret = wd_start(priv->waitwdog, delay, (wdentry_t)sam_eventtimeout,
1, (uint32_t)priv);
if (ret != OK)

2
arch/arm/src/sama5/sam_spi.c
View file

@ -120,7 +120,7 @@
*/
#define DMA_TIMEOUT_MS (800)
#define DMA_TIMEOUT_TICKS ((DMA_TIMEOUT_MS + (MSEC_PER_TICK-1)) / MSEC_PER_TICK)
#define DMA_TIMEOUT_TICKS MSEC2TICK(DMA_TIMEOUT_MS)
/* Debug *******************************************************************/
/* Check if SPI debut is enabled (non-standard.. no support in

2
arch/arm/src/sama5/sam_ssc.c
View file

@ -390,7 +390,7 @@
*/
#define DMA_TIMEOUT_MS (800)
#define DMA_TIMEOUT_TICKS ((DMA_TIMEOUT_MS + (MSEC_PER_TICK-1)) / MSEC_PER_TICK)
#define DMA_TIMEOUT_TICKS MSEC2TICK(DMA_TIMEOUT_MS)
/* Debug *******************************************************************/
/* Check if SSC debut is enabled (non-standard.. no support in

2
arch/arm/src/sama5/sam_tsd.c
View file

@ -89,7 +89,7 @@
/* Poll the pen position while the pen is down at this rate (50MS): */
#define TSD_WDOG_DELAY ((50 + (MSEC_PER_TICK-1))/ MSEC_PER_TICK)
#define TSD_WDOG_DELAY MSEC2TICK(50)
/* This is a value for the threshold that guantees a big difference on the
* first pendown (but can't overflow).

2
arch/arm/src/sama5/sam_twi.c
View file

@ -527,7 +527,7 @@ static int twi_wait(struct twi_dev_s *priv, unsigned int size)
* There is no concern about arithmetic overflow for reasonable transfer sizes.
*/
timeout = (TWI_TIMEOUT_MSPB * size) / MSEC_PER_TICK;
timeout = MSEC2TICK(TWI_TIMEOUT_MSPB);
if (timeout < 1)
{
timeout = 1;

4
arch/arm/src/stm32/stm32_otgfshost.c
View file

@ -151,8 +151,8 @@
#define STM32_READY_DELAY 200000 /* In loop counts */
#define STM32_FLUSH_DELAY 200000 /* In loop counts */
#define STM32_SETUP_DELAY (5000 / MSEC_PER_TICK) /* 5 seconds in system ticks */
#define STM32_DATANAK_DELAY (5000 / MSEC_PER_TICK) /* 5 seconds in system ticks */
#define STM32_SETUP_DELAY SEC2TICK(5) /* 5 seconds in system ticks */
#define STM32_DATANAK_DELAY SEC2TICK(5) /* 5 seconds in system ticks */
/* Ever-present MIN/MAX macros */

2
arch/arm/src/stm32/stm32_sdio.c
View file

@ -2315,7 +2315,7 @@ static sdio_eventset_t stm32_eventwait(FAR struct sdio_dev_s *dev,
/* Start the watchdog timer */
delay = (timeout + (MSEC_PER_TICK-1)) / MSEC_PER_TICK;
delay = MSEC2TICK(timeout);
ret = wd_start(priv->waitwdog, delay, (wdentry_t)stm32_eventtimeout,
1, (uint32_t)priv);
if (ret != OK)

2
arch/avr/src/avr/up_unblocktask.c
View file

@ -97,7 +97,7 @@ void up_unblock_task(struct tcb_s *tcb)
*/
#if CONFIG_RR_INTERVAL > 0
tcb->timeslice = CONFIG_RR_INTERVAL / MSEC_PER_TICK;
tcb->timeslice = MSEC2TICK(CONFIG_RR_INTERVAL);
#endif
/* Add the task in the correct location in the prioritized

2
arch/avr/src/avr32/up_unblocktask.c
View file

@ -97,7 +97,7 @@ void up_unblock_task(struct tcb_s *tcb)
*/
#if CONFIG_RR_INTERVAL > 0
tcb->timeslice = CONFIG_RR_INTERVAL / MSEC_PER_TICK;
tcb->timeslice = MSEC2TICK(CONFIG_RR_INTERVAL);
#endif
/* Add the task in the correct location in the prioritized

2
arch/hc/src/common/up_unblocktask.c
View file

@ -97,7 +97,7 @@ void up_unblock_task(struct tcb_s *tcb)
*/
#if CONFIG_RR_INTERVAL > 0
tcb->timeslice = CONFIG_RR_INTERVAL / MSEC_PER_TICK;
tcb->timeslice = MSEC2TICK(CONFIG_RR_INTERVAL);
#endif
/* Add the task in the correct location in the prioritized

2
arch/mips/src/mips32/up_unblocktask.c
View file

@ -99,7 +99,7 @@ void up_unblock_task(struct tcb_s *tcb)
*/
#if CONFIG_RR_INTERVAL > 0
tcb->timeslice = CONFIG_RR_INTERVAL / MSEC_PER_TICK;
tcb->timeslice = MSEC2TICK(CONFIG_RR_INTERVAL);
#endif
/* Add the task in the correct location in the prioritized

2
arch/rgmp/src/nuttx.c
View file

@ -326,7 +326,7 @@ void up_unblock_task(struct tcb_s *tcb)
* robin tasks but it doesn't here to do it for everything
*/
#if CONFIG_RR_INTERVAL > 0
tcb->timeslice = CONFIG_RR_INTERVAL / MSEC_PER_TICK;
tcb->timeslice = MSEC2TICK(CONFIG_RR_INTERVAL);
#endif
// Add the task in the correct location in the prioritized

2
arch/sh/src/common/up_unblocktask.c
View file

@ -97,7 +97,7 @@ void up_unblock_task(struct tcb_s *tcb)
*/
#if CONFIG_RR_INTERVAL > 0
tcb->timeslice = CONFIG_RR_INTERVAL / MSEC_PER_TICK;
tcb->timeslice = MSEC2TICK(CONFIG_RR_INTERVAL);
#endif
/* Add the task in the correct location in the prioritized

39
arch/sim/src/up_tickless.c
View file

@ -66,6 +66,7 @@
#include <time.h>
#include <nuttx/arch.h>
#include <nuttx/clock.h>
#ifdef CONFIG_SCHED_TICKLESS
@ -74,12 +75,12 @@
****************************************************************************/
#if defined(CONFIG_SIM_WALLTIME) || defined(CONFIG_SIM_X11FB)
# define TICK_USEC (1000000 / CLK_TCK)
# define TICK_SEC (TICK_USEC / 1000000)
# define TICK_NSEC ((TICK_USEC % 1000) * 1000)
# define TICK_USEC (USEC_PER_SEC / CLK_TCK)
# define TICK_SEC (TICK_USEC / USEC_PER_SEC)
# define TICK_NSEC ((TICK_USEC % NSEC_PER_USEC) * NSEC_PER_USEC)
#else
# define TICK_SEC 0
# define TICK_NSEC (128 * 1000)
# define TICK_SEC 0
# define TICK_NSEC NSEC_PER_TICK
#endif
/****************************************************************************
@ -209,8 +210,8 @@ int up_timer_cancel(FAR struct timespec *ts)
if (g_timer_active)
{
ts->tv_sec = g_interval_delay.tv_nsec;
ts->tv_nsec = g_interval_delay.tv_sec;
ts->tv_sec = g_interval_delay.tv_sec;
ts->tv_nsec = g_interval_delay.tv_nsec;
}
else
{
@ -220,8 +221,8 @@ int up_timer_cancel(FAR struct timespec *ts)
/* Disable and reset the simulated timer */
g_interval_delay.tv_nsec = 0;
g_interval_delay.tv_sec = 0;
g_interval_delay.tv_nsec = 0;
g_timer_active = false;
}
#endif
@ -253,8 +254,8 @@ int up_timer_cancel(FAR struct timespec *ts)
#ifdef CONFIG_SCHED_TICKLESS
int up_timer_start(FAR const struct timespec *ts)
{
g_interval_delay.tv_nsec = ts->tv_nsec;
g_interval_delay.tv_sec = ts->tv_sec;
g_interval_delay.tv_nsec = ts->tv_nsec;
g_timer_active = true;
}
#endif
@ -278,10 +279,10 @@ void up_timer_update(void)
/* Increment the elapsed time */
g_elapsed_time.tv_nsec += TICK_NSEC;
if (g_elapsed_time.tv_nsec >= 1000000000)
if (g_elapsed_time.tv_nsec >= NSEC_PER_SEC)
{
g_elapsed_time.tv_nsec++;
g_elapsed_time.tv_sec -= 1000000000;
g_elapsed_time.tv_sec++;
g_elapsed_time.tv_nsec -= NSEC_PER_SEC;
}
g_elapsed_time.tv_sec += TICK_SEC;
@ -307,7 +308,7 @@ void up_timer_update(void)
/* Decrement nanoseconds */
if (g_interval_delay.tv_nsec > TICK_NSEC)
if (g_interval_delay.tv_nsec >= TICK_NSEC)
{
g_interval_delay.tv_nsec -= TICK_NSEC;
}
@ -316,14 +317,10 @@ void up_timer_update(void)
else if (g_interval_delay.tv_sec > 0)
{
if (g_interval_delay.tv_nsec >= TICK_NSEC)
{
g_interval_delay.tv_nsec = 0;
}
else
{
g_interval_delay.tv_sec--;
}
g_interval_delay.tv_nsec += NSEC_PER_SEC;
g_interval_delay.tv_sec--;
g_interval_delay.tv_nsec -= TICK_NSEC;
}
/* Otherwise the timer has expired */

2
arch/sim/src/up_unblocktask.c
View file

@ -99,7 +99,7 @@ void up_unblock_task(struct tcb_s *tcb)
*/
#if CONFIG_RR_INTERVAL > 0
tcb->timeslice = CONFIG_RR_INTERVAL / MSEC_PER_TICK;
tcb->timeslice = MSEC2TICK(CONFIG_RR_INTERVAL);
#endif
/* Add the task in the correct location in the prioritized

2
arch/x86/src/common/up_unblocktask.c
View file

@ -96,7 +96,7 @@ void up_unblock_task(struct tcb_s *tcb)
*/
#if CONFIG_RR_INTERVAL > 0
tcb->timeslice = CONFIG_RR_INTERVAL / MSEC_PER_TICK;
tcb->timeslice = MSEC2TICK(CONFIG_RR_INTERVAL);
#endif
/* Add the task in the correct location in the prioritized

2
arch/z16/src/common/up_unblocktask.c
View file

@ -101,7 +101,7 @@ void up_unblock_task(FAR struct tcb_s *tcb)
*/
#if CONFIG_RR_INTERVAL > 0
tcb->timeslice = CONFIG_RR_INTERVAL / MSEC_PER_TICK;
tcb->timeslice = MSEC2TICK(CONFIG_RR_INTERVAL);
#endif
/* Add the task in the correct location in the prioritized

2
arch/z80/src/common/up_unblocktask.c
View file

@ -102,7 +102,7 @@ void up_unblock_task(FAR struct tcb_s *tcb)
*/
#if CONFIG_RR_INTERVAL > 0
tcb->timeslice = CONFIG_RR_INTERVAL / MSEC_PER_TICK;
tcb->timeslice = MSEC2TICK(CONFIG_RR_INTERVAL);
#endif
/* Add the task in the correct location in the prioritized