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x86_64: move PCI bus initialization from qemu-intel64 to common x86_64 and initialize PCI in up_initialize()

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many PCI devices must be initialized early during boot process (e.g. PCI serial port)

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
This commit is contained in:
p-szafonimateusz 2024-02-20 17:48:36 +01:00 committed by Alan Carvalho de Assis
parent cdfce8a055
commit 4123615621
12 changed files with 46 additions and 53 deletions
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4
arch/x86_64/src/common/CMakeLists.txt
View file

@ -33,4 +33,8 @@ set(SRCS
x86_64_udelay.c
x86_64_tcbinfo.c)
if(CONFIG_PCI)
list(APPEND SRCS x86_64_pci.c)
endif()
target_sources(arch PRIVATE ${SRCS})

7
arch/x86_64/src/common/x86_64_initialize.c
View file

@ -115,6 +115,12 @@ void up_initialize(void)
x86_64_serialinit();
#endif
/* Initialize the PCI bus */
#ifdef CONFIG_PCI
x86_64_pci_init();
#endif
/* Initialize the network */
#ifndef CONFIG_NETDEV_LATEINIT
@ -124,5 +130,6 @@ void up_initialize(void)
/* Initialize USB -- device and/or host */
x86_64_usbinitialize();
board_autoled_on(LED_IRQSENABLED);
}

6
arch/x86_64/src/common/x86_64_internal.h
View file

@ -235,6 +235,12 @@ void x86_64_usbuninitialize(void);
# define x86_64_usbuninitialize()
#endif
/* Defined in x86_64_pci.c */
#ifdef CONFIG_PCI
void x86_64_pci_init(void);
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_X86_64_SRC_COMMON_UP_INTERNAL_H */

54
boards/x86_64/intel64/qemu-intel64/src/qemu_pci.c → arch/x86_64/src/common/x86_64_pci.c
View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/x86_64/intel64/qemu-intel64/src/qemu_pci.c
* arch/x86_64/src/common/x86_64_pci.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
@ -43,35 +43,31 @@
* Private Functions Definitions
****************************************************************************/
static void qemu_pci_cfg_write(struct pci_dev_s *dev, int reg,
static void x86_64_pci_cfg_write(struct pci_dev_s *dev, int reg,
uint32_t val, int width);
static uint32_t qemu_pci_cfg_read(struct pci_dev_s *dev, int reg,
static uint32_t x86_64_pci_cfg_read(struct pci_dev_s *dev, int reg,
int width);
static int qemu_pci_map_bar(uint64_t addr, uint64_t len);
static uint32_t qemu_pci_io_read(const volatile void *addr, int width);
static void qemu_pci_io_write(const volatile void *addr, uint32_t val,
static int x86_64_pci_map_bar(uint64_t addr, uint64_t len);
static uint32_t x86_64_pci_io_read(const volatile void *addr, int width);
static void x86_64_pci_io_write(const volatile void *addr, uint32_t val,
int width);
/****************************************************************************
* Private Data
****************************************************************************/
static const struct pci_bus_ops_s g_qemu_pci_bus_ops =
static const struct pci_bus_ops_s g_x86_64_pci_bus_ops =
{
.pci_cfg_write = qemu_pci_cfg_write,
.pci_cfg_read = qemu_pci_cfg_read,
.pci_map_bar = qemu_pci_map_bar,
.pci_io_read = qemu_pci_io_read,
.pci_io_write = qemu_pci_io_write,
.pci_cfg_write = x86_64_pci_cfg_write,
.pci_cfg_read = x86_64_pci_cfg_read,
.pci_map_bar = x86_64_pci_map_bar,
.pci_io_read = x86_64_pci_io_read,
.pci_io_write = x86_64_pci_io_write,
};
static struct pci_bus_s g_qemu_pci_bus =
static struct pci_bus_s g_x86_64_pci_bus =
{
.ops = &g_qemu_pci_bus_ops,
.ops = &g_x86_64_pci_bus_ops,
};
/****************************************************************************
@ -79,7 +75,7 @@ static struct pci_bus_s g_qemu_pci_bus =
****************************************************************************/
/****************************************************************************
* Name: qemu_pci_cfg_write
* Name: x86_64_pci_cfg_write
*
* Description:
* Write 8, 16, 32, 64 bits data to PCI-E configuration space of device
@ -95,7 +91,7 @@ static struct pci_bus_s g_qemu_pci_bus =
*
****************************************************************************/
static void qemu_pci_cfg_write(struct pci_dev_s *dev, int reg,
static void x86_64_pci_cfg_write(struct pci_dev_s *dev, int reg,
uint32_t val, int width)
{
uint8_t offset_mask = (4 - width);
@ -118,7 +114,7 @@ static void qemu_pci_cfg_write(struct pci_dev_s *dev, int reg,
}
/****************************************************************************
* Name: qemu_pci_cfg_read
* Name: x86_64_pci_cfg_read
*
* Description:
* Read 8, 16, 32, 64 bits data from PCI-E configuration space of device
@ -134,7 +130,7 @@ static void qemu_pci_cfg_write(struct pci_dev_s *dev, int reg,
*
****************************************************************************/
static uint32_t qemu_pci_cfg_read(struct pci_dev_s *dev, int reg,
static uint32_t x86_64_pci_cfg_read(struct pci_dev_s *dev, int reg,
int width)
{
uint32_t ret;
@ -161,7 +157,7 @@ static uint32_t qemu_pci_cfg_read(struct pci_dev_s *dev, int reg,
return 0;
}
static uint32_t qemu_pci_io_read(const volatile void *addr, int width)
static uint32_t x86_64_pci_io_read(const volatile void *addr, int width)
{
uint16_t portaddr = (uint16_t)(intptr_t)addr;
@ -181,7 +177,7 @@ static uint32_t qemu_pci_io_read(const volatile void *addr, int width)
return 0;
}
static void qemu_pci_io_write(const volatile void *addr, uint32_t val,
static void x86_64_pci_io_write(const volatile void *addr, uint32_t val,
int width)
{
uint16_t portaddr = (uint16_t)(intptr_t)addr;
@ -203,7 +199,7 @@ static void qemu_pci_io_write(const volatile void *addr, uint32_t val,
}
}
static int qemu_pci_map_bar(uint64_t addr, uint64_t len)
static int x86_64_pci_map_bar(uint64_t addr, uint64_t len)
{
up_map_region((void *)(uintptr_t)addr, len,
X86_PAGE_WR | X86_PAGE_PRESENT | X86_PAGE_NOCACHE | X86_PAGE_GLOBAL);
@ -215,15 +211,15 @@ static int qemu_pci_map_bar(uint64_t addr, uint64_t len)
****************************************************************************/
/****************************************************************************
* Name: qemu_pci_init
* Name: x86_64_pci_init
*
* Description:
* Initialize the PCI-E bus *
* Initialize the PCI-E bus
*
****************************************************************************/
void qemu_pci_init(void)
void x86_64_pci_init(void)
{
pciinfo("Initializing PCI Bus\n");
pci_initialize(&g_qemu_pci_bus);
pci_initialize(&g_x86_64_pci_bus);
}

4
arch/x86_64/src/intel64/Make.defs
View file

@ -25,6 +25,10 @@ CMN_CSRCS += x86_64_getintstack.c x86_64_mdelay.c x86_64_initialize.c
CMN_CSRCS += x86_64_modifyreg8.c x86_64_modifyreg16.c x86_64_modifyreg32.c
CMN_CSRCS += x86_64_nputs.c x86_64_switchcontext.c x86_64_udelay.c
ifeq ($(CONFIG_PCI),y)
CMN_CSRCS += x86_64_pci.c
endif
CMN_CSRCS += intel64_createstack.c intel64_initialstate.c intel64_irq.c
CMN_CSRCS += intel64_map_region.c intel64_regdump.c intel64_releasestack.c
CMN_CSRCS += intel64_rtc.c intel64_restore_auxstate.c intel64_savestate.c

7
boards/x86_64/intel64/qemu-intel64/Kconfig
View file

@ -3,10 +3,3 @@
# see the file kconfig-language.txt in the NuttX tools repository.
#
#
config QEMU_PCI
bool "Initialize and enumerate PCI Bus"
default n
select PCI
---help---
Enables initialization and scanning of standard x86-64 pci bus.

1
boards/x86_64/intel64/qemu-intel64/configs/earlyfb/defconfig
View file

@ -44,7 +44,6 @@ CONFIG_PRIORITY_INHERITANCE=y
CONFIG_PTHREAD_MUTEX_TYPES=y
CONFIG_PTHREAD_STACK_DEFAULT=4194304
CONFIG_PTHREAD_STACK_MIN=4194304
CONFIG_QEMU_PCI=y
CONFIG_RAM_SIZE=268435456
CONFIG_SCHED_CHILD_STATUS=y
CONFIG_SCHED_HAVE_PARENT=y

1
boards/x86_64/intel64/qemu-intel64/configs/pcitest/defconfig
View file

@ -49,7 +49,6 @@ CONFIG_PRIORITY_INHERITANCE=y
CONFIG_PTHREAD_MUTEX_TYPES=y
CONFIG_PTHREAD_STACK_DEFAULT=4194304
CONFIG_PTHREAD_STACK_MIN=4194304
CONFIG_QEMU_PCI=y
CONFIG_RAM_SIZE=268435456
CONFIG_SCHED_CHILD_STATUS=y
CONFIG_SCHED_HAVE_PARENT=y

4
boards/x86_64/intel64/qemu-intel64/src/CMakeLists.txt
View file

@ -24,10 +24,6 @@ if(CONFIG_BOARDCTL)
list(APPEND SRCS qemu_appinit.c)
endif()
if(CONFIG_QEMU_PCI)
list(APPEND SRCS qemu_pci.c)
endif()
if(CONFIG_BOARDCTL_RESET)
list(APPEND SRCS qemu_reset.c)
endif()

4
boards/x86_64/intel64/qemu-intel64/src/Makefile
View file

@ -26,10 +26,6 @@ ifeq ($(CONFIG_BOARDCTL),y)
CSRCS += qemu_appinit.c
endif
ifeq ($(CONFIG_QEMU_PCI),y)
CSRCS += qemu_pci.c
endif
ifeq ($(CONFIG_BOARDCTL_RESET),y)
CSRCS += qemu_reset.c
endif

5
boards/x86_64/intel64/qemu-intel64/src/qemu_bringup.c
View file

@ -57,10 +57,5 @@ int qemu_bringup(void)
}
#endif
#ifdef CONFIG_QEMU_PCI
/* Initialization of system */
qemu_pci_init();
#endif
return ret;
}

2
boards/x86_64/intel64/qemu-intel64/src/qemu_intel64.h
View file

@ -48,8 +48,6 @@
* Public Function Prototypes
****************************************************************************/
void qemu_pci_init(void);
int qemu_bringup(void);
#endif /* __ASSEMBLY__ */