configs/esp32-core: Add basic directory to support the ESP32 Core board V2
This commit is contained in:
Gregory Nutt
parent
852330876b
commit
52b1ca8747
5 changed files with 85 additions and 6 deletions
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@ -244,6 +244,21 @@ arch/x86 - Intel x86 architectures
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arch/x86/include/i486 and arch/x86/src/i486
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arch/x86/include/qemu and arch/x86/src/qemu
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arch/xtensa
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Implementations based on the Cadence® Tensilica® Xtensa® processors,
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such as the Xtensa LX6 dataplane processing units (DPUs). At
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present, this includes the following subdirectories:
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Common XTENSA support:
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arch/xtensa/include and arch/xtensa/src/common
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LX6 DPU support:
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arch/xtensa/include/lx6 and arch/xtensa/xtensa/lx6
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Expressif ESP32 implemenation of the LX6 DPU:
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arch/xtensa/include/esp32 and arch/xtensa/xtensa/esp32
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arch/z16 - ZiLOG 16-bit processors
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This directory holds related, 16-bit architectures from ZiLOG. At
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present, this includes the following subdirectories:
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@ -170,14 +170,17 @@ config ARCH_BOARD_EKKLM3S9B96
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TI/Stellaris EKK-LM3S9B96 board. This board is based on the
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an EKK-LM3S9B96 which is a Cortex-M3.
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config ARCH_BOARD_EZ80F910200KITG
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bool "ZiLOG ez80f910200kitg development kit"
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depends on ARCH_CHIP_EZ80F91
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config ARCH_BOARD_ESP32CORE
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bool "Expressif ESP32 Core board V2"
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depends on ARCH_CHIP_ESP32
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select ARCH_HAVE_LEDS
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---help---
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ez80Acclaim! Microcontroller. This port use the ZiLOG ez80f910200kitg
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development kit, eZ80F091 part, and the Zilog ZDS-II Windows command line
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tools. The development environment is Cygwin under WinXP.
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The ESP32 is a dual-core system from Expressif with two Harvard
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architecture Xtensa LX6 CPUs. All embedded memory, external memory
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and peripherals are located on the data bus and/or the instruction
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bus of these CPUs. With some minor exceptions, the address mapping
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of two CPUs is symmetric, meaning they use the same addresses to
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access the same memory.
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config ARCH_BOARD_EZ80F910200ZCO
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bool "ZiLOG ez80f910200zco development kit"
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@ -1383,6 +1386,7 @@ config ARCH_BOARD
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default "efm32-g8xx-stk" if ARCH_BOARD_EFM32G8XXSTK
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default "efm32gg-stk3700" if ARCH_BOARD_EFM32GG_STK3700
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default "ekk-lm3s9b96" if ARCH_BOARD_EKKLM3S9B96
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default "esp32-core" if ARCH_BOARD_ESP32CORE
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default "ez80f910200kitg" if ARCH_BOARD_EZ80F910200KITG
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default "ez80f910200zco" if ARCH_BOARD_EZ80F910200ZCO
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default "fire-stm32v2" if ARCH_BOARD_FIRE_STM32
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@ -1581,6 +1585,9 @@ endif
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if ARCH_BOARD_EKKLM3S9B96
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source "configs/ekk-lm3s9b96/Kconfig"
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endif
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if ARCH_BOARD_ESP32CORE
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source "configs/esp32-core/Kconfig"
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endif
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if ARCH_BOARD_EZ80F910200KITG
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source "configs/ez80f910200kitg/Kconfig"
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endif
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@ -246,6 +246,14 @@ configs/ekk-lm3s9b96
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TI/Stellaris EKK-LM3S9B96 board. This board is based on the
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an EKK-LM3S9B96 which is a Cortex-M3.
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configs/esp-core
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The ESP32 is a dual-core system from Expressif with two Harvard
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architecture Xtensa LX6 CPUs. All embedded memory, external memory and
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nd peripherals are located on the data bus and/or the instruction bus of
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bus of these CPUs. With some minor exceptions, the address mapping of two
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CPUs is symmetric, meaning they use the same addresses to access the same
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memory.
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configs/ez80f0910200kitg
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ez80Acclaim! Microcontroller. This port use the Zilog ez80f0910200kitg
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development kit, eZ80F091 part, and the Zilog ZDS-II Windows command line
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8
configs/esp32-core/Kconfig
Normal file
8
configs/esp32-core/Kconfig
Normal file
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@ -0,0 +1,8 @@
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#
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# For a description of the syntax of this configuration file,
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# see the file kconfig-language.txt in the NuttX tools repository.
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#
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if ARCH_BOARD_ESP32CORE
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endif # ARCH_BOARD_ESP32CORE
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41
configs/esp32-core/README.txt
Normal file
41
configs/esp32-core/README.txt
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@ -0,0 +1,41 @@
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README for the Expressif ESP32 Core board (V2)
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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The ESP32 is a dual-core system from Expressif with two Harvard
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architecture Xtensa LX6 CPUs. All embedded memory, external memory and
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peripherals are located on the data bus and/or the instruction bus of
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these CPUs. With some minor exceptions, the address mapping of two CPUs
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is symmetric, meaning they use the same addresses to access the same
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memory. Multiple peripherals in the system can access embedded memory via
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DMA.
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The two CPUs are named "PRO_CPU" and "APP_CPU" (for "protocol" and
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"application"), however for most purposes the two CPUs are
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interchangeable.
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Features:
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* Address Space
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- Symmetric address mapping
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- 4 GB (32-bit) address space for both data bus and instruction bus
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- 1296 KB embedded memory address space
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- 19704 KB external memory address space
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- 512 KB peripheral address space
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- Some embedded and external memory regions can be accessed by either
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data bus or instruction bus
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- 328 KB DMA address space
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* Embedded Memory
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- 448 KB Internal ROM
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- 520 KB Internal SRAM
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- 8 KB RTC FAST Memory
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- 8 KB RTC SLOW Memory
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* External Memory
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Off-chip SPI memory can be mapped into the available address space as
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external memory. Parts of the embedded memory can be used as transparent
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cache for this external memory.
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- Supports up to 16 MB off-Chip SPI Flash.
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- Supports up to 8 MB off-Chip SPI SRAM.
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* Peripherals
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- 41 peripherals
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* DMA
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- 13 modules are capable of DMA operation
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