Add skeleton of P14201 driver
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2664 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
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10 changed files with 570 additions and 119 deletions
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@ -1125,3 +1125,5 @@
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* net/net_close.c - Correct a UDP reference counting error
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5.6 2010-xx-xx Gregory Nutt <spudmonkey@racsa.co.cr>
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* drivers/lcd/p14201.c - Driver for RiT P14201 series OLED.
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@ -8,7 +8,7 @@
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<tr align="center" bgcolor="#e4e4e4">
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<td>
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<h1><big><font color="#3c34ec"><i>NuttX RTOS</i></font></big></h1>
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<p>Last Updated: May 9, 2010</p>
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<p>Last Updated: May 10, 2010</p>
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</td>
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</tr>
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</table>
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@ -1749,6 +1749,8 @@ buildroot-1.8 2009-12-21 <spudmonkey@racsa.co.cr>
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<ul><pre>
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nuttx-5.6 2010-xx-xx Gregory Nutt <spudmonkey@racsa.co.cr>
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* drivers/lcd/p14201.c - Driver for RiT P14201 series OLED.
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pascal-2.1 2010-xx-xx Gregory Nutt <spudmonkey@racsa.co.cr>
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buildroot-1.9 2010-xx-xx <spudmonkey@racsa.co.cr>
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@ -83,15 +83,16 @@ OLED
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The Evaluation Kit includes an OLED graphics display. Features:
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- RiT P14201 series display (www.ritekdisplay.com).
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- 128 columns by 96rows
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- RiT P14201 series display
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- 128 columns by 96 rows
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- 4-bit, 16-level gray scale.
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- High-contrast (typ. 500:1)
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- Excellent brightness (120 cd/m2)
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- Fast 10 us response with 128 x 96 pixel resolution.
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- Fast 10 us response.
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The OLED display has a built-in controller IC with synchronous serial and
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parallel interfaces. Synchronous serial (SSI) is used on the EVB. The SSI
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port is shared with the microSD card slot.
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parallel interfaces (SSD1329). Synchronous serial (SSI) is used on the EVB.
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The SSI port is shared with the microSD card slot.
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- PC7: OLED display data/control select (D/Cn)
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- PA3: OLED display chip select (CSn)
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@ -1,7 +1,7 @@
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############################################################################
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# drivers/Makefile
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#
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# Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
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# Copyright (C) 2007-2010 Gregory Nutt. All rights reserved.
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# Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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#
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# Redistribution and use in source and binary forms, with or without
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@ -69,6 +69,11 @@ ROOTDEPPATH = --dep-path .
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MMCSDDEPPATH = --dep-path mmcsd
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CFLAGS += ${shell $(TOPDIR)/tools/incdir.sh $(INCDIROPT) "$(CC)" $(TOPDIR)/drivers/mmcsd}
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include lcd/Make.defs
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ROOTDEPPATH = --dep-path .
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LCDDEPPATH = --dep-path lcd
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CFLAGS += ${shell $(TOPDIR)/tools/incdir.sh $(INCDIROPT) "$(CC)" $(TOPDIR)/drivers/lcd}
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ifneq ($(CONFIG_NFILE_DESCRIPTORS),0)
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ifneq ($(CONFIG_DISABLE_MOUNTPOINT),y)
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include bch/Make.defs
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@ -83,7 +88,7 @@ ROOTDEPPATH = --dep-path .
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MTDDEPPATH = --dep-path mtd
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ASRCS = $(SERIAL_ASRCS) $(NET_ASRCS) $(PIPE_ASRCS) $(USBDEV_ASRCS) \
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$(MMCSD_ASRCS) $(BCH_ASRCS) $(MTD_ASRCS)
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$(MMCSD_ASRCS) $(LCD_ASRCS) $(BCH_ASRCS) $(MTD_ASRCS)
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AOBJS = $(ASRCS:.S=$(OBJEXT))
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CSRCS =
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@ -94,7 +99,7 @@ CSRCS += ramdisk.c rwbuffer.c
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endif
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endif
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CSRCS += $(SERIAL_CSRCS) $(NET_CSRCS) $(PIPE_CSRCS) $(USBDEV_CSRCS) \
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$(MMCSD_CSRCS) $(BCH_CSRCS) $(MTD_CSRCS)
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$(MMCSD_CSRCS) $(LCD_CSRCS) $(BCH_CSRCS) $(MTD_CSRCS)
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COBJS = $(CSRCS:.c=$(OBJEXT))
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SRCS = $(ASRCS) $(CSRCS)
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@ -102,7 +107,7 @@ OBJS = $(AOBJS) $(COBJS)
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BIN = libdrivers$(LIBEXT)
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VPATH = serial:net:pipes:usbdev:mmcsd:bch:mtd
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VPATH = serial:net:pipes:usbdev:mmcsd:lcd:bch:mtd
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all: $(BIN)
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@ -119,7 +124,7 @@ $(BIN): $(OBJS)
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.depend: Makefile $(SRCS)
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@$(MKDEP) $(ROOTDEPPATH) $(SERIALDEPPATH) $(NETDEPPATH) $(PIPEDEPPATH) \
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$(USBDEVDEPPATH) $(MMCSDDEPPATH) $(BCHDEPPATH) $(MTDDEPPATH) \
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$(USBDEVDEPPATH) $(MMCSDDEPPATH) $(LCDDEPPATH) $(BCHDEPPATH) $(MTDDEPPATH) \
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$(CC) -- $(CFLAGS) -- $(SRCS) >Make.dep
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@touch $@
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43
drivers/lcd/Make.defs
Executable file
43
drivers/lcd/Make.defs
Executable file
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@ -0,0 +1,43 @@
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############################################################################
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# drivers/lcd/Make.defs
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#
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# Copyright (C) 2010 Gregory Nutt. All rights reserved.
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# Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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# are met:
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#
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# 1. Redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer.
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# 2. Redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in
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# the documentation and/or other materials provided with the
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# distribution.
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# 3. Neither the name NuttX nor the names of its contributors may be
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# used to endorse or promote products derived from this software
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# without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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# POSSIBILITY OF SUCH DAMAGE.
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#
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############################################################################
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LCD_ASRCS =
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ifeq ($(CONFIG_NX_LCDDRIVER),y)
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LCD_CSRCS = p14201.c
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else
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LCD_CSRCS =
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endif
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430
drivers/lcd/p14201.c
Executable file
430
drivers/lcd/p14201.c
Executable file
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/**************************************************************************************
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* drivers/lcd/p14201.c
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* Driver for RiT P14201 series display (wih sd1329 IC controller)
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*
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* Copyright (C) 2010 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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**************************************************************************************/
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/**************************************************************************************
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* Included Files
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**************************************************************************************/
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#include <nuttx/config.h>
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#include <sys/types.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include <string.h>
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#include <errno.h>
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#include <debug.h>
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#include <nuttx/arch.h>
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#include <nuttx/lcd.h>
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#include <arch/irq.h>
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#include "sd1329.h"
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/**************************************************************************************
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* Pre-processor Definitions
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**************************************************************************************/
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/* Configuration **********************************************************************/
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/* Verify that all configuration requirements have been met */
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/* Define the following to enable register-level debug output */
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#undef CONFIG_LCD_RITDEBUG
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/* Verbose debug must also be enabled */
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#ifndef CONFIG_DEBUG
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# undef CONFIG_DEBUG_VERBOSE
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# undef CONFIG_DEBUG_GRAPHICS
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#endif
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#ifndef CONFIG_DEBUG_VERBOSE
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# undef CONFIG_LCD_RITDEBUG
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#endif
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/* Color Properties *******************************************************************/
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/* Display Resolution */
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#define RIT_XRES 128
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#define RIT_YRES 96
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/* Color depth and format */
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#define RIT_BPP 4
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#define RIT_COLORFMT FB_FMT_Y4
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/* Debug ******************************************************************************/
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#ifdef CONFIG_LCD_RITDEBUG
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# define ritdbg(format, arg...) vdbg(format, ##arg)
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#else
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# define ritdbg(x...)
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#endif
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/**************************************************************************************
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* Private Type Definition
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**************************************************************************************/
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/* This structure describes the state of this driver */
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struct rit_dev_s
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{
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/* Publically visible device structure */
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struct lcd_dev_s dev;
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/* Private LCD-specific information follows */
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};
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/**************************************************************************************
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* Private Function Protototypes
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**************************************************************************************/
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/* LCD Data Transfer Methods */
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static int rit_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffer,
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size_t npixels);
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static int rit_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer,
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size_t npixels);
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/* LCD Configuration */
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static int rit_getvideoinfo(FAR struct lcd_dev_s *dev,
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FAR struct fb_videoinfo_s *vinfo);
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static int rit_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno,
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FAR struct lcd_planeinfo_s *pinfo);
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/* LCD RGB Mapping */
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#ifdef CONFIG_FB_CMAP
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# error "RGB color mapping not supported by this driver"
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#endif
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/* Cursor Controls */
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#ifdef CONFIG_FB_HWCURSOR
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# error "Cursor control not supported by this driver"
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#endif
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/* LCD Specific Controls */
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static int rit_getpower(struct lcd_dev_s *dev);
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static int rit_setpower(struct lcd_dev_s *dev, int power);
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static int rit_getcontrast(struct lcd_dev_s *dev);
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static int rit_setcontrast(struct lcd_dev_s *dev, unsigned int contrast);
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/**************************************************************************************
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* Private Data
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**************************************************************************************/
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/* This is working memory allocated by the LCD driver for each LCD device
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* and for each color plane. This memory will hold one raster line of data.
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* The size of the allocated run buffer must therefore be at least
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* (bpp * xres / 8). Actual alignment of the buffer must conform to the
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* bitwidth of the underlying pixel type.
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*
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* If there are multiple planes, they may share the same working buffer
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* because different planes will not be operate on concurrently. However,
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* if there are multiple LCD devices, they must each have unique run buffers.
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*/
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static uint8_t g_runbuffer[RIT_XRES/2];
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/* This structure describes the overall LCD video controller */
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static const struct fb_videoinfo_s g_videoinfo =
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{
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.fmt = RIT_COLORFMT, /* Color format: RGB16-565: RRRR RGGG GGGB BBBB */
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.xres = RIT_XRES, /* Horizontal resolution in pixel columns */
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.yres = RIT_YRES, /* Vertical resolution in pixel rows */
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.nplanes = 1, /* Number of color planes supported */
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};
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/* This is the standard, NuttX Plane information object */
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static const struct lcd_planeinfo_s g_planeinfo =
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{
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.putrun = rit_putrun, /* Put a run into LCD memory */
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.getrun = rit_getrun, /* Get a run from LCD memory */
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.buffer = (uint8_t*)g_runbuffer, /* Run scratch buffer */
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.bpp = RIT_BPP, /* Bits-per-pixel */
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};
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/* This is the standard, NuttX LCD driver object */
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static struct rit_dev_s g_lcddev_s =
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{
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.dev =
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{
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/* LCD Configuration */
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.getvideoinfo = rit_getvideoinfo,
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.getplaneinfo = rit_getplaneinfo,
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/* LCD RGB Mapping -- Not supported */
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/* Cursor Controls -- Not supported */
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/* LCD Specific Controls */
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.getpower = rit_getpower,
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.setpower = rit_setpower,
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.getcontrast = rit_getcontrast,
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.setcontrast = rit_setcontrast,
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},
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};
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/**************************************************************************************
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* Private Functions
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**************************************************************************************/
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/**************************************************************************************
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* Name: rit_putrun
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*
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* Description:
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* This method can be used to write a partial raster line to the LCD:
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*
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* row - Starting row to write to (range: 0 <= row < yres)
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* col - Starting column to write to (range: 0 <= col <= xres-npixels)
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* buffer - The buffer containing the run to be written to the LCD
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* npixels - The number of pixels to write to the LCD
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* (range: 0 < npixels <= xres-col)
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*
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**************************************************************************************/
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static int rit_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffer,
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size_t npixels)
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{
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/* Buffer must be provided and aligned to a 16-bit address boundary */
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gvdbg("row: %d col: %d npixels: %d\n", row, col, npixels);
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DEBUGASSERT(buffer && ((uintptr_t)buffer & 1) == 0);
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/* Set up to write the run. */
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/* Write the run to GRAM. */
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return OK;
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}
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/**************************************************************************************
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* Name: rit_getrun
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*
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* Description:
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* This method can be used to read a partial raster line from the LCD:
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*
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* row - Starting row to read from (range: 0 <= row < yres)
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* col - Starting column to read read (range: 0 <= col <= xres-npixels)
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* buffer - The buffer in which to return the run read from the LCD
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* npixels - The number of pixels to read from the LCD
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* (range: 0 < npixels <= xres-col)
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*
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**************************************************************************************/
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static int rit_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer,
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size_t npixels)
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{
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/* Buffer must be provided and aligned to a 16-bit address boundary */
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gvdbg("row: %d col: %d npixels: %d\n", row, col, npixels);
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DEBUGASSERT(buffer && ((uintptr_t)buffer & 1) == 0);
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/* Set up to read the run */
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/* Read the run from GRAM. */
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return OK;
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}
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/**************************************************************************************
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* Name: rit_getvideoinfo
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*
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* Description:
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* Get information about the LCD video controller configuration.
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*
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**************************************************************************************/
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static int rit_getvideoinfo(FAR struct lcd_dev_s *dev,
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FAR struct fb_videoinfo_s *vinfo)
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{
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DEBUGASSERT(dev && vinfo);
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gvdbg("fmt: %d xres: %d yres: %d nplanes: %d\n",
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g_videoinfo.fmt, g_videoinfo.xres, g_videoinfo.yres, g_videoinfo.nplanes);
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memcpy(vinfo, &g_videoinfo, sizeof(struct fb_videoinfo_s));
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return OK;
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}
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/**************************************************************************************
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* Name: rit_getplaneinfo
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*
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* Description:
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* Get information about the configuration of each LCD color plane.
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*
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**************************************************************************************/
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static int rit_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno,
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FAR struct lcd_planeinfo_s *pinfo)
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{
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DEBUGASSERT(dev && pinfo && planeno == 0);
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gvdbg("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp);
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memcpy(pinfo, &g_planeinfo, sizeof(struct lcd_planeinfo_s));
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return OK;
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}
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||||
|
||||
/**************************************************************************************
|
||||
* Name: rit_getpower
|
||||
*
|
||||
* Description:
|
||||
* Get the LCD panel power status (0: full off - CONFIG_LCD_MAXPOWER: full on. On
|
||||
* backlit LCDs, this setting may correspond to the backlight setting.
|
||||
*
|
||||
**************************************************************************************/
|
||||
|
||||
static int rit_getpower(struct lcd_dev_s *dev)
|
||||
{
|
||||
struct rit_dev_s *priv = (struct rit_dev_s *)dev;
|
||||
gvdbg("power: %d\n", 0);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**************************************************************************************
|
||||
* Name: rit_setpower
|
||||
*
|
||||
* Description:
|
||||
* Enable/disable LCD panel power (0: full off - CONFIG_LCD_MAXPOWER: full on). On
|
||||
* backlit LCDs, this setting may correspond to the backlight setting.
|
||||
*
|
||||
**************************************************************************************/
|
||||
|
||||
static int rit_setpower(struct lcd_dev_s *dev, int power)
|
||||
{
|
||||
struct rit_dev_s *priv = (struct rit_dev_s *)dev;
|
||||
|
||||
gvdbg("power: %d\n", power);
|
||||
DEBUGASSERT(power <= CONFIG_LCD_MAXPOWER);
|
||||
|
||||
/* Set new power level */
|
||||
|
||||
return OK;
|
||||
}
|
||||
|
||||
/**************************************************************************************
|
||||
* Name: rit_getcontrast
|
||||
*
|
||||
* Description:
|
||||
* Get the current contrast setting (0-CONFIG_LCD_MAXCONTRAST).
|
||||
*
|
||||
**************************************************************************************/
|
||||
|
||||
static int rit_getcontrast(struct lcd_dev_s *dev)
|
||||
{
|
||||
gvdbg("Not implemented\n");
|
||||
return -ENOSYS;
|
||||
}
|
||||
|
||||
/**************************************************************************************
|
||||
* Name: rit_getcontrast
|
||||
*
|
||||
* Description:
|
||||
* Set LCD panel contrast (0-CONFIG_LCD_MAXCONTRAST).
|
||||
*
|
||||
**************************************************************************************/
|
||||
|
||||
static int rit_setcontrast(struct lcd_dev_s *dev, unsigned int contrast)
|
||||
{
|
||||
gvdbg("contrast: %d\n", contrast);
|
||||
return -ENOSYS;
|
||||
}
|
||||
|
||||
/**************************************************************************************
|
||||
* Public Functions
|
||||
**************************************************************************************/
|
||||
|
||||
/**************************************************************************************
|
||||
* Name: up_lcdinitialize
|
||||
*
|
||||
* Description:
|
||||
* Initialize the LCD video hardware. The initial state of the LCD is fully
|
||||
* initialized, display memory cleared, and the LCD ready to use, but with the power
|
||||
* setting at 0 (full off).
|
||||
*
|
||||
**************************************************************************************/
|
||||
|
||||
int up_lcdinitialize(void)
|
||||
{
|
||||
gvdbg("Initializing\n");
|
||||
|
||||
/* Configure GPIO pins */
|
||||
|
||||
/* Enable clocking */
|
||||
|
||||
/* Configure and enable LCD */
|
||||
|
||||
return OK;
|
||||
}
|
||||
|
||||
/**************************************************************************************
|
||||
* Name: up_lcdgetdev
|
||||
*
|
||||
* Description:
|
||||
* Return a a reference to the LCD object for the specified LCD. This allows
|
||||
* support for multiple LCD devices.
|
||||
*
|
||||
**************************************************************************************/
|
||||
|
||||
FAR struct lcd_dev_s *up_lcdgetdev(int lcddev)
|
||||
{
|
||||
gvdbg("lcddev: %d\n", lcddev);
|
||||
return lcddev == 0 ? &g_lcddev_s.dev : NULL;
|
||||
}
|
||||
|
||||
/**************************************************************************************
|
||||
* Name: up_lcduninitialize
|
||||
*
|
||||
* Description:
|
||||
* Unitialize the framebuffer support.
|
||||
*
|
||||
**************************************************************************************/
|
||||
|
||||
void up_lcduninitialize(void)
|
||||
{
|
||||
/* Turn the LCD off */
|
||||
|
||||
/* Disable clocking */
|
||||
}
|
||||
|
||||
|
|
@ -121,8 +121,8 @@
|
|||
|
||||
#define SSD1329_ICON_CONTROL 0x90
|
||||
# define SSD1329_ICON_NORMAL 0x00 /* A[1:0]1=00: Icon RESET to normal display */
|
||||
# define SSD1329_ICON_ON 0x01 /* A[1:0]1=01: Icon All ON */
|
||||
# define SSD1329_ICON_OFF 0x02 /* A[1:0]=10: Icon All OFF */
|
||||
# define SSD1329_ICON_ALLON 0x01 /* A[1:0]1=01: Icon All ON */
|
||||
# define SSD1329_ICON_ALLOFF 0x02 /* A[1:0]=10: Icon All OFF */
|
||||
# define SSD1329_ICON_DISABLE 0x00 /* A[4]=0: Disable Icon display */
|
||||
# define SSD1329_ICON_ENABLE 0x10 /* A[4]=1: Enable Icon display */
|
||||
# define SSD1329_VICON_DISABLE 0x00 /* A[5]=0: Disable VICON charge pump circuit */
|
||||
|
|
|
@ -47,10 +47,9 @@
|
|||
#include <debug.h>
|
||||
|
||||
#include <nuttx/arch.h>
|
||||
#include <nuttx/spi.h>
|
||||
#include <nuttx/lcd.h>
|
||||
|
||||
#include <arch/irq.h>
|
||||
|
||||
#include "up_arch.h"
|
||||
|
||||
/**************************************************************************************
|
||||
|
@ -153,7 +152,7 @@ static int skel_setcontrast(struct lcd_dev_s *dev, unsigned int contrast);
|
|||
|
||||
/* This is working memory allocated by the LCD driver for each LCD device
|
||||
* and for each color plane. This memory will hold one raster line of data.
|
||||
* The size of the allocated run buffer must therefor be at least
|
||||
* The size of the allocated run buffer must therefore be at least
|
||||
* (bpp * xres / 8). Actual alignment of the buffer must conform to the
|
||||
* bitwidth of the underlying pixel type.
|
||||
*
|
||||
|
@ -236,7 +235,7 @@ static int skel_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffer
|
|||
/* Set up to write the run. */
|
||||
|
||||
/* Write the run to GRAM. */
|
||||
|
||||
#warning "Missing logic"
|
||||
return OK;
|
||||
}
|
||||
|
||||
|
@ -262,11 +261,11 @@ static int skel_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer,
|
|||
gvdbg("row: %d col: %d npixels: %d\n", row, col, npixels);
|
||||
DEBUGASSERT(buffer && ((uintptr_t)buffer & 1) == 0);
|
||||
|
||||
/* Set up to read the run */
|
||||
/* When the SPI interfacee is used, the SD1329 controller does not support reading
|
||||
* from GDDRAM.
|
||||
*/
|
||||
|
||||
/* Read the run from GRAM. */
|
||||
|
||||
return OK;
|
||||
return -ENOSYS;
|
||||
}
|
||||
|
||||
/**************************************************************************************
|
||||
|
@ -374,7 +373,7 @@ static int skel_setcontrast(struct lcd_dev_s *dev, unsigned int contrast)
|
|||
**************************************************************************************/
|
||||
|
||||
/**************************************************************************************
|
||||
* Name: up_lcdinitialize
|
||||
* Name: up_oledinitialize
|
||||
*
|
||||
* Description:
|
||||
* Initialize the LCD video hardware. The initial state of the LCD is fully
|
||||
|
@ -383,47 +382,15 @@ static int skel_setcontrast(struct lcd_dev_s *dev, unsigned int contrast)
|
|||
*
|
||||
**************************************************************************************/
|
||||
|
||||
int up_lcdinitialize(void)
|
||||
FAR struct lcd_dev_s *up_oledinitialize(FAR struct spi_dev_s *spi)
|
||||
{
|
||||
gvdbg("Initializing\n");
|
||||
|
||||
/* Configure GPIO pins */
|
||||
|
||||
#warning "Missing logic"
|
||||
/* Enable clocking /
|
||||
|
||||
/* Configure and enable LCD */
|
||||
|
||||
return OK;
|
||||
}
|
||||
|
||||
/**************************************************************************************
|
||||
* Name: up_lcdgetdev
|
||||
*
|
||||
* Description:
|
||||
* Return a a reference to the LCD object for the specified LCD. This allows
|
||||
* support for multiple LCD devices.
|
||||
*
|
||||
**************************************************************************************/
|
||||
|
||||
FAR struct lcd_dev_s *up_lcdgetdev(int lcddev)
|
||||
{
|
||||
gvdbg("lcddev: %d\n", lcddev);
|
||||
return lcddev == 0 ? &g_lcddev_s.dev : NULL;
|
||||
}
|
||||
|
||||
/**************************************************************************************
|
||||
* Name: up_lcduninitialize
|
||||
*
|
||||
* Description:
|
||||
* Unitialize the framebuffer support.
|
||||
*
|
||||
**************************************************************************************/
|
||||
|
||||
void up_lcduninitialize(void)
|
||||
{
|
||||
/* Turn the LCD off */
|
||||
|
||||
/* Disable clocking */
|
||||
}
|
||||
|
||||
|
||||
|
|
|
@ -53,108 +53,109 @@
|
|||
|
||||
/* Monochrome Formats *******************************************************/
|
||||
|
||||
#define FB_FMT_Y8 0 /* BPP=8 8-bit uncompressed greyscale */
|
||||
#define FB_FMT_Y16 1 /* BPP=16 16-bit uncompressed greyscale */
|
||||
#define FB_FMT_Y4 0 /* BPP=4, 4-bit uncompressed greyscale */
|
||||
#define FB_FMT_Y8 1 /* BPP=8, 8-bit uncompressed greyscale */
|
||||
#define FB_FMT_Y16 2 /* BPP=16, 16-bit uncompressed greyscale */
|
||||
#define FB_FMT_GREY FB_FMT_Y8 /* BPP=8 */
|
||||
#define FB_FMT_Y800 FB_FMT_Y8 /* BPP=8 */
|
||||
|
||||
#define FB_ISMONO(f) ((f) >= FB_FMT_Y8) && (f) <= FB_FMT_Y16)
|
||||
#define FB_ISMONO(f) ((f) >= FB_FMT_Y4) && (f) <= FB_FMT_Y16)
|
||||
|
||||
/* RGB video formats ********************************************************/
|
||||
|
||||
/* Standard RGB */
|
||||
|
||||
#define FB_FMT_RGB1 2 /* BPP=1 */
|
||||
#define FB_FMT_RGB4 3 /* BPP=4 */
|
||||
#define FB_FMT_RGB8 4 /* BPP=8 */
|
||||
#define FB_FMT_RGB16_555 5 /* BPP=16 R=5, G=5, B=5 (1 unused bit) */
|
||||
#define FB_FMT_RGB16_565 6 /* BPP=16 R=6, G=6, B=5 */
|
||||
#define FB_FMT_RGB24 7 /* BPP=24 */
|
||||
#define FB_FMT_RGB32 8 /* BPP=32 */
|
||||
#define FB_FMT_RGB1 3 /* BPP=1 */
|
||||
#define FB_FMT_RGB4 4 /* BPP=4 */
|
||||
#define FB_FMT_RGB8 5 /* BPP=8 */
|
||||
#define FB_FMT_RGB16_555 6 /* BPP=16 R=5, G=5, B=5 (1 unused bit) */
|
||||
#define FB_FMT_RGB16_565 7 /* BPP=16 R=6, G=6, B=5 */
|
||||
#define FB_FMT_RGB24 8 /* BPP=24 */
|
||||
#define FB_FMT_RGB32 9 /* BPP=32 */
|
||||
|
||||
/* Run length encoded RGB */
|
||||
|
||||
#define FB_FMT_RGBRLE4 9 /* BPP=4 */
|
||||
#define FB_FMT_RGBRLE8 10 /* BPP=8 */
|
||||
#define FB_FMT_RGBRLE4 10 /* BPP=4 */
|
||||
#define FB_FMT_RGBRLE8 11 /* BPP=8 */
|
||||
|
||||
/* Raw RGB */
|
||||
|
||||
#define FB_FMT_RGBRAW 11 /* BPP=? */
|
||||
#define FB_FMT_RGBRAW 12 /* BPP=? */
|
||||
|
||||
/* Raw RGB with arbitrary sample packing within a pixel. Packing and precision
|
||||
* of R, G and B components is determined by bit masks for each.
|
||||
*/
|
||||
|
||||
#define FB_FMT_RGBBTFLD16 12 /* BPP=16 */
|
||||
#define FB_FMT_RGBBTFLD24 13 /* BPP=24 */
|
||||
#define FB_FMT_RGBBTFLD32 14 /* BPP=32 */
|
||||
#define FB_FMT_RGBA16 15 /* BPP=16 Raw RGB with alpha */
|
||||
#define FB_FMT_RGBA32 16 /* BPP=32 Raw RGB with alpha */
|
||||
#define FB_FMT_RGBBTFLD16 13 /* BPP=16 */
|
||||
#define FB_FMT_RGBBTFLD24 14 /* BPP=24 */
|
||||
#define FB_FMT_RGBBTFLD32 15 /* BPP=32 */
|
||||
#define FB_FMT_RGBA16 16 /* BPP=16 Raw RGB with alpha */
|
||||
#define FB_FMT_RGBA32 17 /* BPP=32 Raw RGB with alpha */
|
||||
|
||||
/* Raw RGB with a transparency field. Layout is as for stanadard RGB at 16 and
|
||||
* 32 bits per pixel but the msb in each pixel indicates whether the pixel is
|
||||
* transparent or not.
|
||||
*/
|
||||
|
||||
#define FB_FMT_RGBT16 17 /* BPP=16 */
|
||||
#define FB_FMT_RGBT32 18 /* BPP=32 */
|
||||
#define FB_FMT_RGBT16 18 /* BPP=16 */
|
||||
#define FB_FMT_RGBT32 19 /* BPP=32 */
|
||||
|
||||
#define FB_ISRGB(f) ((f) >= FB_FMT_RGB1) && (f) <= FB_FMT_RGBT32)
|
||||
|
||||
/* Packed YUV Formats *******************************************************/
|
||||
|
||||
#define FB_FMT_AYUV 19 /* BPP=32 Combined YUV and alpha */
|
||||
#define FB_FMT_CLJR 20 /* BPP=8 4 pixels packed into a uint32_t.
|
||||
#define FB_FMT_AYUV 20 /* BPP=32 Combined YUV and alpha */
|
||||
#define FB_FMT_CLJR 21 /* BPP=8 4 pixels packed into a uint32_t.
|
||||
* YUV 4:1:1 with l< 8 bits per YUV sample */
|
||||
#define FB_FMT_CYUV 21 /* BPP=16 UYVY except that height is reversed */
|
||||
#define FB_FMT_IRAW 22 /* BPP=? Intel uncompressed YUV.
|
||||
#define FB_FMT_IUYV 23 /* BPP=16 Interlaced UYVY (line order
|
||||
* 0,2,4,.., 1,3,5...)
|
||||
#define FB_FMT_IY41 24 /* BPP=12 Interlaced Y41P (line order
|
||||
* 0,2,4,.., 1,3,5...)
|
||||
#define FB_FMT_IYU2 25 /* BPP=24 */
|
||||
#define FB_FMT_HDYC 26 /* BPP=16 UYVY except uses the BT709 color space */
|
||||
#define FB_FMT_UYVP 27 /* BPP=24? YCbCr 4:2:2, 10-bits per component in U0Y0V0Y1 order */
|
||||
#define FB_FMT_UYVY 28 /* BPP=16 YUV 4:2:2 */
|
||||
#define FB_FMT_CYUV 22 /* BPP=16 UYVY except that height is reversed */
|
||||
#define FB_FMT_IRAW 23 /* BPP=? Intel uncompressed YUV */
|
||||
#define FB_FMT_IUYV 24 /* BPP=16 Interlaced UYVY (line order
|
||||
* 0,2,4,.., 1,3,5...) */
|
||||
#define FB_FMT_IY41 25 /* BPP=12 Interlaced Y41P (line order
|
||||
* 0,2,4,.., 1,3,5...) */
|
||||
#define FB_FMT_IYU2 26 /* BPP=24 */
|
||||
#define FB_FMT_HDYC 27 /* BPP=16 UYVY except uses the BT709 color space */
|
||||
#define FB_FMT_UYVP 28 /* BPP=24? YCbCr 4:2:2, 10-bits per component in U0Y0V0Y1 order */
|
||||
#define FB_FMT_UYVY 29 /* BPP=16 YUV 4:2:2 */
|
||||
#define FB_FMT_UYNV FB_FMT_UYVY /* BPP=16 */
|
||||
#define FB_FMT_Y422 FB_FMT_UYVY /* BPP=16 */
|
||||
#define FB_FMT_V210 29 /* BPP=32 10-bit 4:2:2 YCrCb */
|
||||
#define FB_FMT_V422 30 /* BPP=16 Upside down version of UYVY.
|
||||
#define FB_FMT_V655 31 /* BPP=16? 16-bit YUV 4:2:2 */
|
||||
#define FB_FMT_VYUY 32 /* BPP=? ATI Packed YUV Data
|
||||
#define FB_FMT_YUYV 33 /* BPP=16 YUV 4:2:2 */
|
||||
#define FB_FMT_V210 30 /* BPP=32 10-bit 4:2:2 YCrCb */
|
||||
#define FB_FMT_V422 31 /* BPP=16 Upside down version of UYVY */
|
||||
#define FB_FMT_V655 32 /* BPP=16? 16-bit YUV 4:2:2 */
|
||||
#define FB_FMT_VYUY 33 /* BPP=? ATI Packed YUV Data */
|
||||
#define FB_FMT_YUYV 34 /* BPP=16 YUV 4:2:2 */
|
||||
#define FB_FMT_YUY2 FB_FMT_YUYV /* BPP=16 YUV 4:2:2 */
|
||||
#define FB_FMT_YUNV FB_FMT_YUYV /* BPP=16 YUV 4:2:2 */
|
||||
#define FB_FMT_YVYU 34 /* BPP=16 YUV 4:2:2 */
|
||||
#define FB_FMT_Y41P 35 /* BPP=12 YUV 4:1:1 */
|
||||
#define FB_FMT_Y411 36 /* BPP=12 YUV 4:1:1 */
|
||||
#define FB_FMT_Y211 37 /* BPP=8 */
|
||||
#define FB_FMT_Y41T 38 /* BPP=12 Y41P LSB for transparency */
|
||||
#define FB_FMT_Y42T 39 /* BPP=16 UYVY LSB for transparency */
|
||||
#define FB_FMT_YUVP 40 /* BPP=24? YCbCr 4:2:2 Y0U0Y1V0 order */
|
||||
#define FB_FMT_YVYU 35 /* BPP=16 YUV 4:2:2 */
|
||||
#define FB_FMT_Y41P 36 /* BPP=12 YUV 4:1:1 */
|
||||
#define FB_FMT_Y411 37 /* BPP=12 YUV 4:1:1 */
|
||||
#define FB_FMT_Y211 38 /* BPP=8 */
|
||||
#define FB_FMT_Y41T 39 /* BPP=12 Y41P LSB for transparency */
|
||||
#define FB_FMT_Y42T 40 /* BPP=16 UYVY LSB for transparency */
|
||||
#define FB_FMT_YUVP 41 /* BPP=24? YCbCr 4:2:2 Y0U0Y1V0 order */
|
||||
|
||||
#define FB_ISYUVPACKED(f) ((f) >= FB_FMT_AYUV) && (f) <= FB_FMT_YUVP)
|
||||
|
||||
/* Packed Planar YUV Formats ************************************************/
|
||||
|
||||
#define FB_FMT_YVU9 41 /* BPP=9 8-bit Y followed by 8-bit 4x4 VU */
|
||||
#define FB_FMT_YUV9 42 /* BPP=9? */
|
||||
#define FB_FMT_IF09 43 /* BPP=9.5 YVU9 + 4x4 plane of delta relative to tframe. */
|
||||
#define FB_FMT_YV16 44 /* BPP=16 8-bit Y followed by 8-bit 2x1 VU */
|
||||
#define FB_FMT_YV12 45 /* BPP=12 8-bit Y followed by 8-bit 2x2 VU */
|
||||
#define FB_FMT_I420 46 /* BPP=12 8-bit Y followed by 8-bit 2x2 UV */
|
||||
#define FB_FMT_YVU9 42 /* BPP=9 8-bit Y followed by 8-bit 4x4 VU */
|
||||
#define FB_FMT_YUV9 43 /* BPP=9? */
|
||||
#define FB_FMT_IF09 44 /* BPP=9.5 YVU9 + 4x4 plane of delta relative to tframe. */
|
||||
#define FB_FMT_YV16 45 /* BPP=16 8-bit Y followed by 8-bit 2x1 VU */
|
||||
#define FB_FMT_YV12 46 /* BPP=12 8-bit Y followed by 8-bit 2x2 VU */
|
||||
#define FB_FMT_I420 47 /* BPP=12 8-bit Y followed by 8-bit 2x2 UV */
|
||||
#define FB_FMT_IYUV FB_FMT_I420 /* BPP=12 */
|
||||
#define FB_FMT_NV12 47 /* BPP=12 8-bit Y followed by an interleaved 2x2 UV */
|
||||
#define FB_FMT_NV21 48 /* BPP=12 NV12 with UV reversed */
|
||||
#define FB_FMT_IMC1 49 /* BPP=12 YV12 except UV planes ame stride as Y */
|
||||
#define FB_FMT_IMC2 50 /* BPP=12 IMC1 except UV lines interleaved at half stride boundaries */
|
||||
#define FB_FMT_IMC3 51 /* BPP=12 As IMC1 except that UV swapped */
|
||||
#define FB_FMT_IMC4 52 /* BPP=12 As IMC2 except that UV swapped */
|
||||
#define FB_FMT_CLPL 53 /* BPP=12 YV12 but including a level of indirection. */
|
||||
#define FB_FMT_Y41B 54 /* BPP=12? 4:1:1 planar. */
|
||||
#define FB_FMT_Y42B 55 /* BPP=16? YUV 4:2:2 planar. */
|
||||
#define FB_FMT_CXY1 56 /* BPP=12 */
|
||||
#define FB_FMT_CXY2 57 /* BPP=16 */
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||||
#define FB_FMT_NV12 48 /* BPP=12 8-bit Y followed by an interleaved 2x2 UV */
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||||
#define FB_FMT_NV21 49 /* BPP=12 NV12 with UV reversed */
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||||
#define FB_FMT_IMC1 50 /* BPP=12 YV12 except UV planes ame stride as Y */
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||||
#define FB_FMT_IMC2 51 /* BPP=12 IMC1 except UV lines interleaved at half stride boundaries */
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||||
#define FB_FMT_IMC3 52 /* BPP=12 As IMC1 except that UV swapped */
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||||
#define FB_FMT_IMC4 53 /* BPP=12 As IMC2 except that UV swapped */
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||||
#define FB_FMT_CLPL 54 /* BPP=12 YV12 but including a level of indirection. */
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||||
#define FB_FMT_Y41B 55 /* BPP=12? 4:1:1 planar. */
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||||
#define FB_FMT_Y42B 56 /* BPP=16? YUV 4:2:2 planar. */
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||||
#define FB_FMT_CXY1 57 /* BPP=12 */
|
||||
#define FB_FMT_CXY2 58 /* BPP=16 */
|
||||
|
||||
#define FB_ISYUVPLANAR(f) ((f) >= FB_FMT_AYUV) && (f) <= FB_FMT_YUVP)
|
||||
#define FB_ISYUV(f) (FB_ISYUVPACKED(f) || FB_ISYUVPLANAR(f))
|
||||
|
@ -162,7 +163,7 @@
|
|||
/* Hardware cursor control **************************************************/
|
||||
|
||||
#ifdef CONFIG_FB_HWCURSOR
|
||||
#define FB_CUR_ENABLE 0x01 /* Enable the cursor
|
||||
#define FB_CUR_ENABLE 0x01 /* Enable the cursor */
|
||||
#define FB_CUR_SETIMAGE 0x02 /* Set the cursor image */
|
||||
#define FB_CUR_SETPOSITION 0x04 /* Set the position of the cursor */
|
||||
#define FB_CUR_SETSIZE 0x08 /* Set the size of the cursor */
|
||||
|
|
|
@ -98,7 +98,7 @@ struct lcd_planeinfo_s
|
|||
|
||||
/* This is working memory allocated by the LCD driver for each LCD device
|
||||
* and for each color plane. This memory will hold one raster line of data.
|
||||
* The size of the allocated run buffer must therefor be at least
|
||||
* The size of the allocated run buffer must therefore be at least
|
||||
* (bpp * xres / 8). Actual alignment of the buffer must conform to the
|
||||
* bitwidth of the underlying pixel type.
|
||||
*
|
||||
|
|
Loading…
Reference in a new issue