Add skeleton of P14201 driver

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2664 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2010-05-11 03:55:28 +00:00
parent d2c87216dd
commit 58d04d869a
10 changed files with 570 additions and 119 deletions

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@ -1125,3 +1125,5 @@
* net/net_close.c - Correct a UDP reference counting error
5.6 2010-xx-xx Gregory Nutt <spudmonkey@racsa.co.cr>
* drivers/lcd/p14201.c - Driver for RiT P14201 series OLED.

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@ -8,7 +8,7 @@
<tr align="center" bgcolor="#e4e4e4">
<td>
<h1><big><font color="#3c34ec"><i>NuttX RTOS</i></font></big></h1>
<p>Last Updated: May 9, 2010</p>
<p>Last Updated: May 10, 2010</p>
</td>
</tr>
</table>
@ -1749,6 +1749,8 @@ buildroot-1.8 2009-12-21 &lt;spudmonkey@racsa.co.cr&gt;
<ul><pre>
nuttx-5.6 2010-xx-xx Gregory Nutt &lt;spudmonkey@racsa.co.cr&gt;
* drivers/lcd/p14201.c - Driver for RiT P14201 series OLED.
pascal-2.1 2010-xx-xx Gregory Nutt &lt;spudmonkey@racsa.co.cr&gt;
buildroot-1.9 2010-xx-xx <spudmonkey@racsa.co.cr>

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@ -83,15 +83,16 @@ OLED
The Evaluation Kit includes an OLED graphics display. Features:
- RiT P14201 series display (www.ritekdisplay.com).
- 128 columns by 96rows
- RiT P14201 series display
- 128 columns by 96 rows
- 4-bit, 16-level gray scale.
- High-contrast (typ. 500:1)
- Excellent brightness (120 cd/m2)
- Fast 10 us response with 128 x 96 pixel resolution.
- Fast 10 us response.
The OLED display has a built-in controller IC with synchronous serial and
parallel interfaces. Synchronous serial (SSI) is used on the EVB. The SSI
port is shared with the microSD card slot.
parallel interfaces (SSD1329). Synchronous serial (SSI) is used on the EVB.
The SSI port is shared with the microSD card slot.
- PC7: OLED display data/control select (D/Cn)
- PA3: OLED display chip select (CSn)

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@ -1,7 +1,7 @@
############################################################################
# drivers/Makefile
#
# Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
# Copyright (C) 2007-2010 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <spudmonkey@racsa.co.cr>
#
# Redistribution and use in source and binary forms, with or without
@ -69,6 +69,11 @@ ROOTDEPPATH = --dep-path .
MMCSDDEPPATH = --dep-path mmcsd
CFLAGS += ${shell $(TOPDIR)/tools/incdir.sh $(INCDIROPT) "$(CC)" $(TOPDIR)/drivers/mmcsd}
include lcd/Make.defs
ROOTDEPPATH = --dep-path .
LCDDEPPATH = --dep-path lcd
CFLAGS += ${shell $(TOPDIR)/tools/incdir.sh $(INCDIROPT) "$(CC)" $(TOPDIR)/drivers/lcd}
ifneq ($(CONFIG_NFILE_DESCRIPTORS),0)
ifneq ($(CONFIG_DISABLE_MOUNTPOINT),y)
include bch/Make.defs
@ -83,7 +88,7 @@ ROOTDEPPATH = --dep-path .
MTDDEPPATH = --dep-path mtd
ASRCS = $(SERIAL_ASRCS) $(NET_ASRCS) $(PIPE_ASRCS) $(USBDEV_ASRCS) \
$(MMCSD_ASRCS) $(BCH_ASRCS) $(MTD_ASRCS)
$(MMCSD_ASRCS) $(LCD_ASRCS) $(BCH_ASRCS) $(MTD_ASRCS)
AOBJS = $(ASRCS:.S=$(OBJEXT))
CSRCS =
@ -94,7 +99,7 @@ CSRCS += ramdisk.c rwbuffer.c
endif
endif
CSRCS += $(SERIAL_CSRCS) $(NET_CSRCS) $(PIPE_CSRCS) $(USBDEV_CSRCS) \
$(MMCSD_CSRCS) $(BCH_CSRCS) $(MTD_CSRCS)
$(MMCSD_CSRCS) $(LCD_CSRCS) $(BCH_CSRCS) $(MTD_CSRCS)
COBJS = $(CSRCS:.c=$(OBJEXT))
SRCS = $(ASRCS) $(CSRCS)
@ -102,7 +107,7 @@ OBJS = $(AOBJS) $(COBJS)
BIN = libdrivers$(LIBEXT)
VPATH = serial:net:pipes:usbdev:mmcsd:bch:mtd
VPATH = serial:net:pipes:usbdev:mmcsd:lcd:bch:mtd
all: $(BIN)
@ -119,7 +124,7 @@ $(BIN): $(OBJS)
.depend: Makefile $(SRCS)
@$(MKDEP) $(ROOTDEPPATH) $(SERIALDEPPATH) $(NETDEPPATH) $(PIPEDEPPATH) \
$(USBDEVDEPPATH) $(MMCSDDEPPATH) $(BCHDEPPATH) $(MTDDEPPATH) \
$(USBDEVDEPPATH) $(MMCSDDEPPATH) $(LCDDEPPATH) $(BCHDEPPATH) $(MTDDEPPATH) \
$(CC) -- $(CFLAGS) -- $(SRCS) >Make.dep
@touch $@

43
drivers/lcd/Make.defs Executable file
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@ -0,0 +1,43 @@
############################################################################
# drivers/lcd/Make.defs
#
# Copyright (C) 2010 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <spudmonkey@racsa.co.cr>
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in
# the documentation and/or other materials provided with the
# distribution.
# 3. Neither the name NuttX nor the names of its contributors may be
# used to endorse or promote products derived from this software
# without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
############################################################################
LCD_ASRCS =
ifeq ($(CONFIG_NX_LCDDRIVER),y)
LCD_CSRCS = p14201.c
else
LCD_CSRCS =
endif

430
drivers/lcd/p14201.c Executable file
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@ -0,0 +1,430 @@
/**************************************************************************************
* drivers/lcd/p14201.c
* Driver for RiT P14201 series display (wih sd1329 IC controller)
*
* Copyright (C) 2010 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
**************************************************************************************/
/**************************************************************************************
* Included Files
**************************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <stdint.h>
#include <stdbool.h>
#include <string.h>
#include <errno.h>
#include <debug.h>
#include <nuttx/arch.h>
#include <nuttx/lcd.h>
#include <arch/irq.h>
#include "sd1329.h"
/**************************************************************************************
* Pre-processor Definitions
**************************************************************************************/
/* Configuration **********************************************************************/
/* Verify that all configuration requirements have been met */
/* Define the following to enable register-level debug output */
#undef CONFIG_LCD_RITDEBUG
/* Verbose debug must also be enabled */
#ifndef CONFIG_DEBUG
# undef CONFIG_DEBUG_VERBOSE
# undef CONFIG_DEBUG_GRAPHICS
#endif
#ifndef CONFIG_DEBUG_VERBOSE
# undef CONFIG_LCD_RITDEBUG
#endif
/* Color Properties *******************************************************************/
/* Display Resolution */
#define RIT_XRES 128
#define RIT_YRES 96
/* Color depth and format */
#define RIT_BPP 4
#define RIT_COLORFMT FB_FMT_Y4
/* Debug ******************************************************************************/
#ifdef CONFIG_LCD_RITDEBUG
# define ritdbg(format, arg...) vdbg(format, ##arg)
#else
# define ritdbg(x...)
#endif
/**************************************************************************************
* Private Type Definition
**************************************************************************************/
/* This structure describes the state of this driver */
struct rit_dev_s
{
/* Publically visible device structure */
struct lcd_dev_s dev;
/* Private LCD-specific information follows */
};
/**************************************************************************************
* Private Function Protototypes
**************************************************************************************/
/* LCD Data Transfer Methods */
static int rit_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffer,
size_t npixels);
static int rit_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer,
size_t npixels);
/* LCD Configuration */
static int rit_getvideoinfo(FAR struct lcd_dev_s *dev,
FAR struct fb_videoinfo_s *vinfo);
static int rit_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno,
FAR struct lcd_planeinfo_s *pinfo);
/* LCD RGB Mapping */
#ifdef CONFIG_FB_CMAP
# error "RGB color mapping not supported by this driver"
#endif
/* Cursor Controls */
#ifdef CONFIG_FB_HWCURSOR
# error "Cursor control not supported by this driver"
#endif
/* LCD Specific Controls */
static int rit_getpower(struct lcd_dev_s *dev);
static int rit_setpower(struct lcd_dev_s *dev, int power);
static int rit_getcontrast(struct lcd_dev_s *dev);
static int rit_setcontrast(struct lcd_dev_s *dev, unsigned int contrast);
/**************************************************************************************
* Private Data
**************************************************************************************/
/* This is working memory allocated by the LCD driver for each LCD device
* and for each color plane. This memory will hold one raster line of data.
* The size of the allocated run buffer must therefore be at least
* (bpp * xres / 8). Actual alignment of the buffer must conform to the
* bitwidth of the underlying pixel type.
*
* If there are multiple planes, they may share the same working buffer
* because different planes will not be operate on concurrently. However,
* if there are multiple LCD devices, they must each have unique run buffers.
*/
static uint8_t g_runbuffer[RIT_XRES/2];
/* This structure describes the overall LCD video controller */
static const struct fb_videoinfo_s g_videoinfo =
{
.fmt = RIT_COLORFMT, /* Color format: RGB16-565: RRRR RGGG GGGB BBBB */
.xres = RIT_XRES, /* Horizontal resolution in pixel columns */
.yres = RIT_YRES, /* Vertical resolution in pixel rows */
.nplanes = 1, /* Number of color planes supported */
};
/* This is the standard, NuttX Plane information object */
static const struct lcd_planeinfo_s g_planeinfo =
{
.putrun = rit_putrun, /* Put a run into LCD memory */
.getrun = rit_getrun, /* Get a run from LCD memory */
.buffer = (uint8_t*)g_runbuffer, /* Run scratch buffer */
.bpp = RIT_BPP, /* Bits-per-pixel */
};
/* This is the standard, NuttX LCD driver object */
static struct rit_dev_s g_lcddev_s =
{
.dev =
{
/* LCD Configuration */
.getvideoinfo = rit_getvideoinfo,
.getplaneinfo = rit_getplaneinfo,
/* LCD RGB Mapping -- Not supported */
/* Cursor Controls -- Not supported */
/* LCD Specific Controls */
.getpower = rit_getpower,
.setpower = rit_setpower,
.getcontrast = rit_getcontrast,
.setcontrast = rit_setcontrast,
},
};
/**************************************************************************************
* Private Functions
**************************************************************************************/
/**************************************************************************************
* Name: rit_putrun
*
* Description:
* This method can be used to write a partial raster line to the LCD:
*
* row - Starting row to write to (range: 0 <= row < yres)
* col - Starting column to write to (range: 0 <= col <= xres-npixels)
* buffer - The buffer containing the run to be written to the LCD
* npixels - The number of pixels to write to the LCD
* (range: 0 < npixels <= xres-col)
*
**************************************************************************************/
static int rit_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffer,
size_t npixels)
{
/* Buffer must be provided and aligned to a 16-bit address boundary */
gvdbg("row: %d col: %d npixels: %d\n", row, col, npixels);
DEBUGASSERT(buffer && ((uintptr_t)buffer & 1) == 0);
/* Set up to write the run. */
/* Write the run to GRAM. */
return OK;
}
/**************************************************************************************
* Name: rit_getrun
*
* Description:
* This method can be used to read a partial raster line from the LCD:
*
* row - Starting row to read from (range: 0 <= row < yres)
* col - Starting column to read read (range: 0 <= col <= xres-npixels)
* buffer - The buffer in which to return the run read from the LCD
* npixels - The number of pixels to read from the LCD
* (range: 0 < npixels <= xres-col)
*
**************************************************************************************/
static int rit_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer,
size_t npixels)
{
/* Buffer must be provided and aligned to a 16-bit address boundary */
gvdbg("row: %d col: %d npixels: %d\n", row, col, npixels);
DEBUGASSERT(buffer && ((uintptr_t)buffer & 1) == 0);
/* Set up to read the run */
/* Read the run from GRAM. */
return OK;
}
/**************************************************************************************
* Name: rit_getvideoinfo
*
* Description:
* Get information about the LCD video controller configuration.
*
**************************************************************************************/
static int rit_getvideoinfo(FAR struct lcd_dev_s *dev,
FAR struct fb_videoinfo_s *vinfo)
{
DEBUGASSERT(dev && vinfo);
gvdbg("fmt: %d xres: %d yres: %d nplanes: %d\n",
g_videoinfo.fmt, g_videoinfo.xres, g_videoinfo.yres, g_videoinfo.nplanes);
memcpy(vinfo, &g_videoinfo, sizeof(struct fb_videoinfo_s));
return OK;
}
/**************************************************************************************
* Name: rit_getplaneinfo
*
* Description:
* Get information about the configuration of each LCD color plane.
*
**************************************************************************************/
static int rit_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno,
FAR struct lcd_planeinfo_s *pinfo)
{
DEBUGASSERT(dev && pinfo && planeno == 0);
gvdbg("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp);
memcpy(pinfo, &g_planeinfo, sizeof(struct lcd_planeinfo_s));
return OK;
}
/**************************************************************************************
* Name: rit_getpower
*
* Description:
* Get the LCD panel power status (0: full off - CONFIG_LCD_MAXPOWER: full on. On
* backlit LCDs, this setting may correspond to the backlight setting.
*
**************************************************************************************/
static int rit_getpower(struct lcd_dev_s *dev)
{
struct rit_dev_s *priv = (struct rit_dev_s *)dev;
gvdbg("power: %d\n", 0);
return 0;
}
/**************************************************************************************
* Name: rit_setpower
*
* Description:
* Enable/disable LCD panel power (0: full off - CONFIG_LCD_MAXPOWER: full on). On
* backlit LCDs, this setting may correspond to the backlight setting.
*
**************************************************************************************/
static int rit_setpower(struct lcd_dev_s *dev, int power)
{
struct rit_dev_s *priv = (struct rit_dev_s *)dev;
gvdbg("power: %d\n", power);
DEBUGASSERT(power <= CONFIG_LCD_MAXPOWER);
/* Set new power level */
return OK;
}
/**************************************************************************************
* Name: rit_getcontrast
*
* Description:
* Get the current contrast setting (0-CONFIG_LCD_MAXCONTRAST).
*
**************************************************************************************/
static int rit_getcontrast(struct lcd_dev_s *dev)
{
gvdbg("Not implemented\n");
return -ENOSYS;
}
/**************************************************************************************
* Name: rit_getcontrast
*
* Description:
* Set LCD panel contrast (0-CONFIG_LCD_MAXCONTRAST).
*
**************************************************************************************/
static int rit_setcontrast(struct lcd_dev_s *dev, unsigned int contrast)
{
gvdbg("contrast: %d\n", contrast);
return -ENOSYS;
}
/**************************************************************************************
* Public Functions
**************************************************************************************/
/**************************************************************************************
* Name: up_lcdinitialize
*
* Description:
* Initialize the LCD video hardware. The initial state of the LCD is fully
* initialized, display memory cleared, and the LCD ready to use, but with the power
* setting at 0 (full off).
*
**************************************************************************************/
int up_lcdinitialize(void)
{
gvdbg("Initializing\n");
/* Configure GPIO pins */
/* Enable clocking */
/* Configure and enable LCD */
return OK;
}
/**************************************************************************************
* Name: up_lcdgetdev
*
* Description:
* Return a a reference to the LCD object for the specified LCD. This allows
* support for multiple LCD devices.
*
**************************************************************************************/
FAR struct lcd_dev_s *up_lcdgetdev(int lcddev)
{
gvdbg("lcddev: %d\n", lcddev);
return lcddev == 0 ? &g_lcddev_s.dev : NULL;
}
/**************************************************************************************
* Name: up_lcduninitialize
*
* Description:
* Unitialize the framebuffer support.
*
**************************************************************************************/
void up_lcduninitialize(void)
{
/* Turn the LCD off */
/* Disable clocking */
}

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@ -121,8 +121,8 @@
#define SSD1329_ICON_CONTROL 0x90
# define SSD1329_ICON_NORMAL 0x00 /* A[1:0]1=00: Icon RESET to normal display */
# define SSD1329_ICON_ON 0x01 /* A[1:0]1=01: Icon All ON */
# define SSD1329_ICON_OFF 0x02 /* A[1:0]=10: Icon All OFF */
# define SSD1329_ICON_ALLON 0x01 /* A[1:0]1=01: Icon All ON */
# define SSD1329_ICON_ALLOFF 0x02 /* A[1:0]=10: Icon All OFF */
# define SSD1329_ICON_DISABLE 0x00 /* A[4]=0: Disable Icon display */
# define SSD1329_ICON_ENABLE 0x10 /* A[4]=1: Enable Icon display */
# define SSD1329_VICON_DISABLE 0x00 /* A[5]=0: Disable VICON charge pump circuit */

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@ -47,10 +47,9 @@
#include <debug.h>
#include <nuttx/arch.h>
#include <nuttx/spi.h>
#include <nuttx/lcd.h>
#include <arch/irq.h>
#include "up_arch.h"
/**************************************************************************************
@ -153,7 +152,7 @@ static int skel_setcontrast(struct lcd_dev_s *dev, unsigned int contrast);
/* This is working memory allocated by the LCD driver for each LCD device
* and for each color plane. This memory will hold one raster line of data.
* The size of the allocated run buffer must therefor be at least
* The size of the allocated run buffer must therefore be at least
* (bpp * xres / 8). Actual alignment of the buffer must conform to the
* bitwidth of the underlying pixel type.
*
@ -236,7 +235,7 @@ static int skel_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffer
/* Set up to write the run. */
/* Write the run to GRAM. */
#warning "Missing logic"
return OK;
}
@ -262,11 +261,11 @@ static int skel_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer,
gvdbg("row: %d col: %d npixels: %d\n", row, col, npixels);
DEBUGASSERT(buffer && ((uintptr_t)buffer & 1) == 0);
/* Set up to read the run */
/* When the SPI interfacee is used, the SD1329 controller does not support reading
* from GDDRAM.
*/
/* Read the run from GRAM. */
return OK;
return -ENOSYS;
}
/**************************************************************************************
@ -374,7 +373,7 @@ static int skel_setcontrast(struct lcd_dev_s *dev, unsigned int contrast)
**************************************************************************************/
/**************************************************************************************
* Name: up_lcdinitialize
* Name: up_oledinitialize
*
* Description:
* Initialize the LCD video hardware. The initial state of the LCD is fully
@ -383,47 +382,15 @@ static int skel_setcontrast(struct lcd_dev_s *dev, unsigned int contrast)
*
**************************************************************************************/
int up_lcdinitialize(void)
FAR struct lcd_dev_s *up_oledinitialize(FAR struct spi_dev_s *spi)
{
gvdbg("Initializing\n");
/* Configure GPIO pins */
#warning "Missing logic"
/* Enable clocking /
/* Configure and enable LCD */
return OK;
}
/**************************************************************************************
* Name: up_lcdgetdev
*
* Description:
* Return a a reference to the LCD object for the specified LCD. This allows
* support for multiple LCD devices.
*
**************************************************************************************/
FAR struct lcd_dev_s *up_lcdgetdev(int lcddev)
{
gvdbg("lcddev: %d\n", lcddev);
return lcddev == 0 ? &g_lcddev_s.dev : NULL;
}
/**************************************************************************************
* Name: up_lcduninitialize
*
* Description:
* Unitialize the framebuffer support.
*
**************************************************************************************/
void up_lcduninitialize(void)
{
/* Turn the LCD off */
/* Disable clocking */
}

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@ -53,108 +53,109 @@
/* Monochrome Formats *******************************************************/
#define FB_FMT_Y8 0 /* BPP=8 8-bit uncompressed greyscale */
#define FB_FMT_Y16 1 /* BPP=16 16-bit uncompressed greyscale */
#define FB_FMT_Y4 0 /* BPP=4, 4-bit uncompressed greyscale */
#define FB_FMT_Y8 1 /* BPP=8, 8-bit uncompressed greyscale */
#define FB_FMT_Y16 2 /* BPP=16, 16-bit uncompressed greyscale */
#define FB_FMT_GREY FB_FMT_Y8 /* BPP=8 */
#define FB_FMT_Y800 FB_FMT_Y8 /* BPP=8 */
#define FB_ISMONO(f) ((f) >= FB_FMT_Y8) && (f) <= FB_FMT_Y16)
#define FB_ISMONO(f) ((f) >= FB_FMT_Y4) && (f) <= FB_FMT_Y16)
/* RGB video formats ********************************************************/
/* Standard RGB */
#define FB_FMT_RGB1 2 /* BPP=1 */
#define FB_FMT_RGB4 3 /* BPP=4 */
#define FB_FMT_RGB8 4 /* BPP=8 */
#define FB_FMT_RGB16_555 5 /* BPP=16 R=5, G=5, B=5 (1 unused bit) */
#define FB_FMT_RGB16_565 6 /* BPP=16 R=6, G=6, B=5 */
#define FB_FMT_RGB24 7 /* BPP=24 */
#define FB_FMT_RGB32 8 /* BPP=32 */
#define FB_FMT_RGB1 3 /* BPP=1 */
#define FB_FMT_RGB4 4 /* BPP=4 */
#define FB_FMT_RGB8 5 /* BPP=8 */
#define FB_FMT_RGB16_555 6 /* BPP=16 R=5, G=5, B=5 (1 unused bit) */
#define FB_FMT_RGB16_565 7 /* BPP=16 R=6, G=6, B=5 */
#define FB_FMT_RGB24 8 /* BPP=24 */
#define FB_FMT_RGB32 9 /* BPP=32 */
/* Run length encoded RGB */
#define FB_FMT_RGBRLE4 9 /* BPP=4 */
#define FB_FMT_RGBRLE8 10 /* BPP=8 */
#define FB_FMT_RGBRLE4 10 /* BPP=4 */
#define FB_FMT_RGBRLE8 11 /* BPP=8 */
/* Raw RGB */
#define FB_FMT_RGBRAW 11 /* BPP=? */
#define FB_FMT_RGBRAW 12 /* BPP=? */
/* Raw RGB with arbitrary sample packing within a pixel. Packing and precision
* of R, G and B components is determined by bit masks for each.
*/
#define FB_FMT_RGBBTFLD16 12 /* BPP=16 */
#define FB_FMT_RGBBTFLD24 13 /* BPP=24 */
#define FB_FMT_RGBBTFLD32 14 /* BPP=32 */
#define FB_FMT_RGBA16 15 /* BPP=16 Raw RGB with alpha */
#define FB_FMT_RGBA32 16 /* BPP=32 Raw RGB with alpha */
#define FB_FMT_RGBBTFLD16 13 /* BPP=16 */
#define FB_FMT_RGBBTFLD24 14 /* BPP=24 */
#define FB_FMT_RGBBTFLD32 15 /* BPP=32 */
#define FB_FMT_RGBA16 16 /* BPP=16 Raw RGB with alpha */
#define FB_FMT_RGBA32 17 /* BPP=32 Raw RGB with alpha */
/* Raw RGB with a transparency field. Layout is as for stanadard RGB at 16 and
* 32 bits per pixel but the msb in each pixel indicates whether the pixel is
* transparent or not.
*/
#define FB_FMT_RGBT16 17 /* BPP=16 */
#define FB_FMT_RGBT32 18 /* BPP=32 */
#define FB_FMT_RGBT16 18 /* BPP=16 */
#define FB_FMT_RGBT32 19 /* BPP=32 */
#define FB_ISRGB(f) ((f) >= FB_FMT_RGB1) && (f) <= FB_FMT_RGBT32)
/* Packed YUV Formats *******************************************************/
#define FB_FMT_AYUV 19 /* BPP=32 Combined YUV and alpha */
#define FB_FMT_CLJR 20 /* BPP=8 4 pixels packed into a uint32_t.
#define FB_FMT_AYUV 20 /* BPP=32 Combined YUV and alpha */
#define FB_FMT_CLJR 21 /* BPP=8 4 pixels packed into a uint32_t.
* YUV 4:1:1 with l< 8 bits per YUV sample */
#define FB_FMT_CYUV 21 /* BPP=16 UYVY except that height is reversed */
#define FB_FMT_IRAW 22 /* BPP=? Intel uncompressed YUV.
#define FB_FMT_IUYV 23 /* BPP=16 Interlaced UYVY (line order
* 0,2,4,.., 1,3,5...)
#define FB_FMT_IY41 24 /* BPP=12 Interlaced Y41P (line order
* 0,2,4,.., 1,3,5...)
#define FB_FMT_IYU2 25 /* BPP=24 */
#define FB_FMT_HDYC 26 /* BPP=16 UYVY except uses the BT709 color space */
#define FB_FMT_UYVP 27 /* BPP=24? YCbCr 4:2:2, 10-bits per component in U0Y0V0Y1 order */
#define FB_FMT_UYVY 28 /* BPP=16 YUV 4:2:2 */
#define FB_FMT_CYUV 22 /* BPP=16 UYVY except that height is reversed */
#define FB_FMT_IRAW 23 /* BPP=? Intel uncompressed YUV */
#define FB_FMT_IUYV 24 /* BPP=16 Interlaced UYVY (line order
* 0,2,4,.., 1,3,5...) */
#define FB_FMT_IY41 25 /* BPP=12 Interlaced Y41P (line order
* 0,2,4,.., 1,3,5...) */
#define FB_FMT_IYU2 26 /* BPP=24 */
#define FB_FMT_HDYC 27 /* BPP=16 UYVY except uses the BT709 color space */
#define FB_FMT_UYVP 28 /* BPP=24? YCbCr 4:2:2, 10-bits per component in U0Y0V0Y1 order */
#define FB_FMT_UYVY 29 /* BPP=16 YUV 4:2:2 */
#define FB_FMT_UYNV FB_FMT_UYVY /* BPP=16 */
#define FB_FMT_Y422 FB_FMT_UYVY /* BPP=16 */
#define FB_FMT_V210 29 /* BPP=32 10-bit 4:2:2 YCrCb */
#define FB_FMT_V422 30 /* BPP=16 Upside down version of UYVY.
#define FB_FMT_V655 31 /* BPP=16? 16-bit YUV 4:2:2 */
#define FB_FMT_VYUY 32 /* BPP=? ATI Packed YUV Data
#define FB_FMT_YUYV 33 /* BPP=16 YUV 4:2:2 */
#define FB_FMT_V210 30 /* BPP=32 10-bit 4:2:2 YCrCb */
#define FB_FMT_V422 31 /* BPP=16 Upside down version of UYVY */
#define FB_FMT_V655 32 /* BPP=16? 16-bit YUV 4:2:2 */
#define FB_FMT_VYUY 33 /* BPP=? ATI Packed YUV Data */
#define FB_FMT_YUYV 34 /* BPP=16 YUV 4:2:2 */
#define FB_FMT_YUY2 FB_FMT_YUYV /* BPP=16 YUV 4:2:2 */
#define FB_FMT_YUNV FB_FMT_YUYV /* BPP=16 YUV 4:2:2 */
#define FB_FMT_YVYU 34 /* BPP=16 YUV 4:2:2 */
#define FB_FMT_Y41P 35 /* BPP=12 YUV 4:1:1 */
#define FB_FMT_Y411 36 /* BPP=12 YUV 4:1:1 */
#define FB_FMT_Y211 37 /* BPP=8 */
#define FB_FMT_Y41T 38 /* BPP=12 Y41P LSB for transparency */
#define FB_FMT_Y42T 39 /* BPP=16 UYVY LSB for transparency */
#define FB_FMT_YUVP 40 /* BPP=24? YCbCr 4:2:2 Y0U0Y1V0 order */
#define FB_FMT_YVYU 35 /* BPP=16 YUV 4:2:2 */
#define FB_FMT_Y41P 36 /* BPP=12 YUV 4:1:1 */
#define FB_FMT_Y411 37 /* BPP=12 YUV 4:1:1 */
#define FB_FMT_Y211 38 /* BPP=8 */
#define FB_FMT_Y41T 39 /* BPP=12 Y41P LSB for transparency */
#define FB_FMT_Y42T 40 /* BPP=16 UYVY LSB for transparency */
#define FB_FMT_YUVP 41 /* BPP=24? YCbCr 4:2:2 Y0U0Y1V0 order */
#define FB_ISYUVPACKED(f) ((f) >= FB_FMT_AYUV) && (f) <= FB_FMT_YUVP)
/* Packed Planar YUV Formats ************************************************/
#define FB_FMT_YVU9 41 /* BPP=9 8-bit Y followed by 8-bit 4x4 VU */
#define FB_FMT_YUV9 42 /* BPP=9? */
#define FB_FMT_IF09 43 /* BPP=9.5 YVU9 + 4x4 plane of delta relative to tframe. */
#define FB_FMT_YV16 44 /* BPP=16 8-bit Y followed by 8-bit 2x1 VU */
#define FB_FMT_YV12 45 /* BPP=12 8-bit Y followed by 8-bit 2x2 VU */
#define FB_FMT_I420 46 /* BPP=12 8-bit Y followed by 8-bit 2x2 UV */
#define FB_FMT_YVU9 42 /* BPP=9 8-bit Y followed by 8-bit 4x4 VU */
#define FB_FMT_YUV9 43 /* BPP=9? */
#define FB_FMT_IF09 44 /* BPP=9.5 YVU9 + 4x4 plane of delta relative to tframe. */
#define FB_FMT_YV16 45 /* BPP=16 8-bit Y followed by 8-bit 2x1 VU */
#define FB_FMT_YV12 46 /* BPP=12 8-bit Y followed by 8-bit 2x2 VU */
#define FB_FMT_I420 47 /* BPP=12 8-bit Y followed by 8-bit 2x2 UV */
#define FB_FMT_IYUV FB_FMT_I420 /* BPP=12 */
#define FB_FMT_NV12 47 /* BPP=12 8-bit Y followed by an interleaved 2x2 UV */
#define FB_FMT_NV21 48 /* BPP=12 NV12 with UV reversed */
#define FB_FMT_IMC1 49 /* BPP=12 YV12 except UV planes ame stride as Y */
#define FB_FMT_IMC2 50 /* BPP=12 IMC1 except UV lines interleaved at half stride boundaries */
#define FB_FMT_IMC3 51 /* BPP=12 As IMC1 except that UV swapped */
#define FB_FMT_IMC4 52 /* BPP=12 As IMC2 except that UV swapped */
#define FB_FMT_CLPL 53 /* BPP=12 YV12 but including a level of indirection. */
#define FB_FMT_Y41B 54 /* BPP=12? 4:1:1 planar. */
#define FB_FMT_Y42B 55 /* BPP=16? YUV 4:2:2 planar. */
#define FB_FMT_CXY1 56 /* BPP=12 */
#define FB_FMT_CXY2 57 /* BPP=16 */
#define FB_FMT_NV12 48 /* BPP=12 8-bit Y followed by an interleaved 2x2 UV */
#define FB_FMT_NV21 49 /* BPP=12 NV12 with UV reversed */
#define FB_FMT_IMC1 50 /* BPP=12 YV12 except UV planes ame stride as Y */
#define FB_FMT_IMC2 51 /* BPP=12 IMC1 except UV lines interleaved at half stride boundaries */
#define FB_FMT_IMC3 52 /* BPP=12 As IMC1 except that UV swapped */
#define FB_FMT_IMC4 53 /* BPP=12 As IMC2 except that UV swapped */
#define FB_FMT_CLPL 54 /* BPP=12 YV12 but including a level of indirection. */
#define FB_FMT_Y41B 55 /* BPP=12? 4:1:1 planar. */
#define FB_FMT_Y42B 56 /* BPP=16? YUV 4:2:2 planar. */
#define FB_FMT_CXY1 57 /* BPP=12 */
#define FB_FMT_CXY2 58 /* BPP=16 */
#define FB_ISYUVPLANAR(f) ((f) >= FB_FMT_AYUV) && (f) <= FB_FMT_YUVP)
#define FB_ISYUV(f) (FB_ISYUVPACKED(f) || FB_ISYUVPLANAR(f))
@ -162,7 +163,7 @@
/* Hardware cursor control **************************************************/
#ifdef CONFIG_FB_HWCURSOR
#define FB_CUR_ENABLE 0x01 /* Enable the cursor
#define FB_CUR_ENABLE 0x01 /* Enable the cursor */
#define FB_CUR_SETIMAGE 0x02 /* Set the cursor image */
#define FB_CUR_SETPOSITION 0x04 /* Set the position of the cursor */
#define FB_CUR_SETSIZE 0x08 /* Set the size of the cursor */

View file

@ -98,7 +98,7 @@ struct lcd_planeinfo_s
/* This is working memory allocated by the LCD driver for each LCD device
* and for each color plane. This memory will hold one raster line of data.
* The size of the allocated run buffer must therefor be at least
* The size of the allocated run buffer must therefore be at least
* (bpp * xres / 8). Actual alignment of the buffer must conform to the
* bitwidth of the underlying pixel type.
*