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Resync new repository with old repo r5166

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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5154 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2012-09-17 18:35:37 +00:00
parent d9a4327c04
commit 5acf2fe3e1
32 changed files with 391 additions and 239 deletions
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4
arch/8051/src/up_assert.c
View file

@ -1,7 +1,7 @@
/************************************************************************
* up_assert.c
*
* Copyright (C) 2007, 2009 Gregory Nutt. All rights reserved.
* Copyright (C) 2007, 2009, 2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -65,7 +65,7 @@
* Name: _up_assert
************************************************************************/
static void _up_assert(int errorcode) /* __attribute__ ((noreturn)) */
static void _up_assert(int errorcode) /* noreturn_function */
{
/* Are we in an interrupt handler or the idle task? */

9
arch/Kconfig
View file

@ -153,13 +153,14 @@ config ARCH_HAVE_INTERRUPTSTACK
bool
config ARCH_INTERRUPTSTACK
bool "Use interrupt stack"
int "Interrupt Stack Size"
depends on ARCH_HAVE_INTERRUPTSTACK
default y
default 0
---help---
This architecture supports an interrupt stack. If defined, this symbol
is the size of the interrupt stack in bytes. If not defined, the user
task stacks will be used during interrupt handling.
will be the size of the interrupt stack in bytes. If not defined (or
defined to be zero), the user task stacks will be used during interrupt
handling.
comment "Boot options"

1
arch/arm/Kconfig
View file

@ -103,6 +103,7 @@ config ARCH_CHIP_STM32
bool "STMicro STM32"
select ARCH_HAVE_CMNVECTOR
select ARCH_HAVE_MPU
select ARCH_HAVE_I2CRESET
---help---
STMicro STM32 architectures (ARM Cortex-M3/4).

21
arch/arm/include/armv7-m/irq.h
View file

@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/include/armv7-m/irq.h
*
* Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved.
* Copyright (C) 2009, 2011-2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -48,6 +48,7 @@
#include <nuttx/irq.h>
#ifndef __ASSEMBLY__
# include <nuttx/compiler.h>
# include <stdint.h>
#endif
@ -131,6 +132,7 @@ struct xcptcontext
/* Disable IRQs */
static inline void irqdisable(void) inline_function;
static inline void irqdisable(void)
{
__asm__ __volatile__ ("\tcpsid i\n");
@ -138,6 +140,7 @@ static inline void irqdisable(void)
/* Save the current primask state & disable IRQs */
static inline irqstate_t irqsave(void) inline_function;
static inline irqstate_t irqsave(void)
{
unsigned short primask;
@ -153,11 +156,13 @@ static inline irqstate_t irqsave(void)
: "=r" (primask)
:
: "memory");
return primask;
}
/* Enable IRQs */
static inline void irqenable(void) inline_function;
static inline void irqenable(void)
{
__asm__ __volatile__ ("\tcpsie i\n");
@ -165,6 +170,7 @@ static inline void irqenable(void)
/* Restore saved primask state */
static inline void irqrestore(irqstate_t primask) inline_function;
static inline void irqrestore(irqstate_t primask)
{
/* If bit 0 of the primask is 0, then we need to restore
@ -184,6 +190,7 @@ static inline void irqrestore(irqstate_t primask)
/* Get/set the primask register */
static inline uint8_t getprimask(void) inline_function;
static inline uint8_t getprimask(void)
{
uint32_t primask;
@ -193,9 +200,11 @@ static inline uint8_t getprimask(void)
: "=r" (primask)
:
: "memory");
return (uint8_t)primask;
}
static inline void setprimask(uint32_t primask) inline_function;
static inline void setprimask(uint32_t primask)
{
__asm__ __volatile__
@ -208,18 +217,22 @@ static inline void setprimask(uint32_t primask)
/* Get/set the basepri register */
static inline uint8_t getbasepri(void) inline_function;
static inline uint8_t getbasepri(void)
{
uint32_t basepri;
__asm__ __volatile__
(
"\tmrs %0, basepri\n"
: "=r" (basepri)
:
: "memory");
return (uint8_t)basepri;
}
static inline void setbasepri(uint32_t basepri) inline_function;
static inline void setbasepri(uint32_t basepri)
{
__asm__ __volatile__
@ -232,6 +245,7 @@ static inline void setbasepri(uint32_t basepri)
/* Get/set IPSR */
static inline uint32_t getipsr(void) inline_function;
static inline uint32_t getipsr(void)
{
uint32_t ipsr;
@ -241,9 +255,11 @@ static inline uint32_t getipsr(void)
: "=r" (ipsr)
:
: "memory");
return ipsr;
}
static inline void setipsr(uint32_t ipsr) inline_function;
static inline void setipsr(uint32_t ipsr)
{
__asm__ __volatile__
@ -256,6 +272,7 @@ static inline void setipsr(uint32_t ipsr)
/* Get/set CONTROL */
static inline uint32_t getcontrol(void) inline_function;
static inline uint32_t getcontrol(void)
{
uint32_t control;
@ -265,9 +282,11 @@ static inline uint32_t getcontrol(void)
: "=r" (control)
:
: "memory");
return control;
}
static inline void setcontrol(uint32_t control) inline_function;
static inline void setcontrol(uint32_t control)
{
__asm__ __volatile__

4
arch/arm/src/arm/up_assert.c
View file

@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/arm/up_assert.c
*
* Copyright (C) 2007-2010 Gregory Nutt. All rights reserved.
* Copyright (C) 2007-2010, 2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -252,7 +252,7 @@ static void up_dumpstate(void)
* Name: _up_assert
****************************************************************************/
static void _up_assert(int errorcode) /* __attribute__ ((noreturn)) */
static void _up_assert(int errorcode) /* noreturn_function */
{
/* Are we in an interrupt handler or the idle task? */

2
arch/arm/src/armv7-m/svcall.h
View file

@ -74,7 +74,7 @@
/* SYS call 1:
*
* void up_fullcontextrestore(uint32_t *restoreregs) __attribute__ ((noreturn));
* void up_fullcontextrestore(uint32_t *restoreregs) noreturn_function;
*/
#define SYS_restore_context (1)

4
arch/arm/src/armv7-m/up_assert.c
View file

@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/armv7-m/up_assert.c
*
* Copyright (C) 2009-2010 Gregory Nutt. All rights reserved.
* Copyright (C) 2009-2010, 2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -262,7 +262,7 @@ static void up_dumpstate(void)
* Name: _up_assert
****************************************************************************/
static void _up_assert(int errorcode) /* __attribute__ ((noreturn)) */
static void _up_assert(int errorcode) /* noreturn_function */
{
/* Are we in an interrupt handler or the idle task? */

2
arch/arm/src/armv7-m/up_fullcontextrestore.S
View file

@ -69,7 +69,7 @@
* Description:
* Restore the current thread context. Full prototype is:
*
* void up_fullcontextrestore(uint32_t *restoreregs) __attribute__ ((noreturn));
* void up_fullcontextrestore(uint32_t *restoreregs) noreturn_function;
*
* Return:
* None

2
arch/arm/src/armv7-m/up_svcall.c
View file

@ -280,7 +280,7 @@ int up_svcall(int irq, FAR void *context)
/* R0=SYS_restore_context: This a restore context command:
*
* void up_fullcontextrestore(uint32_t *restoreregs) __attribute__ ((noreturn));
* void up_fullcontextrestore(uint32_t *restoreregs) noreturn_function;
*
* At this point, the following values are saved in context:
*

5
arch/arm/src/common/up_internal.h
View file

@ -40,7 +40,10 @@
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#ifndef __ASSEMBLY__
# include <nuttx/compiler.h>
# include <sys/types.h>
# include <stdint.h>
#endif
@ -223,7 +226,7 @@ extern void up_boot(void);
extern void up_copystate(uint32_t *dest, uint32_t *src);
extern void up_decodeirq(uint32_t *regs);
extern int up_saveusercontext(uint32_t *saveregs);
extern void up_fullcontextrestore(uint32_t *restoreregs) __attribute__ ((noreturn));
extern void up_fullcontextrestore(uint32_t *restoreregs) noreturn_function;
extern void up_switchcontext(uint32_t *saveregs, uint32_t *restoreregs);
/* Signal handling **********************************************************/

69
arch/arm/src/stm32/Kconfig
View file

@ -191,14 +191,17 @@ menu "STM32 Peripheral Support"
config STM32_ADC1
bool "ADC1"
default n
select STM32_ADC
config STM32_ADC2
bool "ADC2"
default n
select STM32_ADC
config STM32_ADC3
bool "ADC3"
default n
select STM32_ADC
config STM32_CRC
bool "CRC"
@ -228,12 +231,14 @@ config STM32_CAN1
bool "CAN1"
default n
select CAN
select STM32_CAN
config STM32_CAN2
bool "CAN2"
default n
depends on STM32_STM32F20XX || STM32_STM32F40XX
select CAN
select STM32_CAN
config STM32_CCMDATARAM
bool "CMD/DATA RAM"
@ -248,10 +253,12 @@ config STM32_CRYP
config STM32_DAC1
bool "DAC1"
default n
select STM32_DAC
config STM32_DAC2
bool "DAC2"
default n
select STM32_DAC
config STM32_DCMI
bool "DCMI"
@ -276,15 +283,18 @@ config STM32_HASH
config STM32_I2C1
bool "I2C1"
default n
select STM32_I2C
config STM32_I2C2
bool "I2C2"
default n
select STM32_I2C
config STM32_I2C3
bool "I2C3"
default n
depends on STM32_STM32F20XX || STM32_STM32F40XX
select STM32_I2C
config STM32_IWDG
bool "IWDG"
@ -319,23 +329,27 @@ config STM32_SPI1
bool "SPI1"
default n
select SPI
select STM32_SPI
config STM32_SPI2
bool "SPI2"
default n
select SPI
select STM32_SPI
config STM32_SPI3
bool "SPI3"
default n
depends on STM32_STM32F20XX || STM32_STM32F40XX
select SPI
select STM32_SPI
config STM32_SPI4
bool "SPI4"
default n
depends on STM32_STM32F10XX
select SPI
select STM32_SPI
config STM32_SYSCFG
bool "SYSCFG"
@ -450,19 +464,18 @@ endmenu
config STM32_ADC
bool
default y if STM32_ADC1 || STM32_ADC2 || STM32_ADC3
config STM32_DAC
bool
default y if STM32_DAC1 || STM32_ADC2
config STM32_SPI
bool
default y if STM32_SPI1 || STM32_SPI2 || STM32_SPI3 || STM32_SPI4
config STM32_I2C
bool
config STM32_CAN
bool
default y if STM32_CAN1 || STM32_CAN2
menu "Alternate Pin Mapping"
@ -571,10 +584,10 @@ choice
config STM32_CAN1_NO_REMAP
bool "No pin remapping"
config CONFIG_STM32_CAN1_REMAP1
config STM32_CAN1_REMAP1
bool "CAN1 alternate pin remapping #1"
config CONFIG_STM32_CAN1_REMAP2
config STM32_CAN1_REMAP2
bool "CAN1 alternate pin remapping #2"
endchoice
@ -1600,6 +1613,46 @@ config STM32_SPI_DMA
endmenu
menu "I2C Configuration"
depends on STM32_I2C
config STM32_I2C_DYNTIMEO
bool "Use dynamic timeouts"
default n
depends on STM32_I2C
config STM32_I2C_DYNTIMEO_USECPERBYTE
int "Timeout Microseconds per Byte"
default 0
depends on STM32_I2C_DYNTIMEO
config STM32_I2C_DYNTIMEO_STARTSTOP
int "Timeout for Start/Stop (Milliseconds)"
default 5000
depends on STM32_I2C_DYNTIMEO
config STM32_I2CTIMEOSEC
int "Timeout seconds"
default 0
depends on STM32_I2C
config STM32_I2CTIMEOMS
int "Timeout Milliseconds"
default 500
depends on STM32_I2C && !STM32_I2C_DYNTIMEO
config STM32_I2CTIMEOTICKS
int "Timeout for Done and Stop (ticks)"
default 500
depends on STM32_I2C && !STM32_I2C_DYNTIMEO
config STM32_I2C_DUTY16_9
bool "Frequency with Tlow/Thigh = 16/9 "
default n
depends on STM32_I2C
endmenu
menu "SDIO Configuration"
depends on STM32_SDIO
@ -1826,13 +1879,13 @@ config STM32_USBHOST_REGDEBUG
default n
depends on USBHOST && STM32_OTGFS
---help---
Enable very low-level register access debug. Depends on CONFIG_DEBUG.
Enable very low-level register access debug. Depends on DEBUG.
config STM32_USBHOST_PKTDUMP
bool "Packet Dump Debug"
default n
depends on USBHOST && STM32_OTGFS
---help---
Dump all incoming and outgoing USB packets. Depends on CONFIG_DEBUG.
Dump all incoming and outgoing USB packets. Depends on DEBUG.
endmenu

389
arch/arm/src/stm32/stm32_i2c.c
View file

@ -107,11 +107,11 @@
#if !defined(CONFIG_STM32_I2CTIMEOSEC) && !defined(CONFIG_STM32_I2CTIMEOMS)
# define CONFIG_STM32_I2CTIMEOSEC 0
# define CONFIG_STM32_I2CTIMEOMS 500 /* Default is 500 milliseconds */
# define CONFIG_STM32_I2CTIMEOMS 500 /* Default is 500 milliseconds */
#elif !defined(CONFIG_STM32_I2CTIMEOSEC)
# define CONFIG_STM32_I2CTIMEOSEC 0 /* User provided milliseconds */
#elif !defined(CONFIG_STM32_I2CTIMEOMS)
# define CONFIG_STM32_I2CTIMEOMS 0 /* User provided seconds */
# define CONFIG_STM32_I2CTIMEOMS 0 /* User provided seconds */
#endif
/* Interrupt wait time timeout in system timer ticks */
@ -119,6 +119,10 @@
#define CONFIG_STM32_I2CTIMEOTICKS \
(SEC2TICK(CONFIG_STM32_I2CTIMEOSEC) + MSEC2TICK(CONFIG_STM32_I2CTIMEOMS))
#ifndef CONFIG_STM32_I2C_DYNTIMEO_STARTSTOP
# define CONFIG_STM32_I2C_DYNTIMEO_STARTSTOP TICK2USEC(CONFIG_STM32_I2CTIMEOTICKS)
#endif
/* On the STM32F103ZE, there is an internal conflict between I2C1 and FSMC. In that
* case, it is necessary to disable FSMC before each I2C1 access and re-enable FSMC
* when the I2C access completes.
@ -129,6 +133,18 @@
# define I2C1_FSMC_CONFLICT
#endif
/* Macros to convert a I2C pin to a GPIO output */
#if defined(CONFIG_STM32_STM32F10XX)
# define I2C_OUTPUT (GPIO_OUTPUT | GPIO_OUTPUT_SET | GPIO_CNF_OUTOD | \
GPIO_MODE_50MHz)
#elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX)
# define I2C_OUTPUT (GPIO_OUTPUT | GPIO_FLOAT | GPIO_OPENDRAIN |\
GPIO_SPEED_50MHz | GPIO_OUTPUT_SET)
#endif
#define MKI2C_OUTPUT(p) (((p) & (GPIO_PORT_MASK | GPIO_PIN_MASK)) | I2C_OUTPUT)
/* Debug ****************************************************************************/
/* CONFIG_DEBUG_I2C + CONFIG_DEBUG enables general I2C debug output. */
@ -196,36 +212,52 @@ struct stm32_trace_s
uint32_t time; /* First of event or first status */
};
/* I2C Device hardware configuration */
struct stm32_i2c_config_s
{
uint32_t base; /* I2C base address */
uint32_t clk_bit; /* Clock enable bit */
uint32_t reset_bit; /* Reset bit */
uint32_t scl_pin; /* GPIO configuration for SCL as SCL */
uint32_t sda_pin; /* GPIO configuration for SDA as SDA */
#ifndef CONFIG_I2C_POLLED
int (*isr)(int, void *); /* Interrupt handler */
uint32_t ev_irq; /* Event IRQ */
uint32_t er_irq; /* Error IRQ */
#endif
};
/* I2C Device Private Data */
struct stm32_i2c_priv_s
{
uint32_t base; /* I2C base address */
int refs; /* Referernce count */
sem_t sem_excl; /* Mutual exclusion semaphore */
const struct stm32_i2c_config_s *config; /* Port configuration */
int refs; /* Referernce count */
sem_t sem_excl; /* Mutual exclusion semaphore */
#ifndef CONFIG_I2C_POLLED
sem_t sem_isr; /* Interrupt wait semaphore */
sem_t sem_isr; /* Interrupt wait semaphore */
#endif
volatile uint8_t intstate; /* Interrupt handshake (see enum stm32_intstate_e) */
volatile uint8_t intstate; /* Interrupt handshake (see enum stm32_intstate_e) */
uint8_t msgc; /* Message count */
struct i2c_msg_s *msgv; /* Message list */
uint8_t *ptr; /* Current message buffer */
int dcnt; /* Current message length */
uint16_t flags; /* Current message flags */
uint8_t msgc; /* Message count */
struct i2c_msg_s *msgv; /* Message list */
uint8_t *ptr; /* Current message buffer */
int dcnt; /* Current message length */
uint16_t flags; /* Current message flags */
/* I2C trace support */
#ifdef CONFIG_I2C_TRACE
int tndx; /* Trace array index */
uint32_t start_time; /* Time when the trace was started */
int tndx; /* Trace array index */
uint32_t start_time; /* Time when the trace was started */
/* The actual trace data */
struct stm32_trace_s trace[CONFIG_I2C_NTRACE];
#endif
uint32_t status; /* End of transfer SR2|SR1 status */
uint32_t status; /* End of transfer SR2|SR1 status */
};
/* I2C Device, Instance */
@ -252,6 +284,9 @@ static inline void stm32_i2c_modifyreg(FAR struct stm32_i2c_priv_s *priv,
uint8_t offset, uint16_t clearbits,
uint16_t setbits);
static inline void stm32_i2c_sem_wait(FAR struct i2c_dev_s *dev);
#ifdef CONFIG_STM32_I2C_DYNTIMEO
static useconds_t stm32_i2c_tousecs(int msgc, FAR struct i2c_msg_s *msgs);
#endif /* CONFIG_STM32_I2C_DYNTIMEO */
static inline int stm32_i2c_sem_waitdone(FAR struct stm32_i2c_priv_s *priv);
static inline void stm32_i2c_sem_waitstop(FAR struct stm32_i2c_priv_s *priv);
static inline void stm32_i2c_sem_post(FAR struct i2c_dev_s *dev);
@ -263,7 +298,7 @@ static void stm32_i2c_tracenew(FAR struct stm32_i2c_priv_s *priv, uint32_t statu
static void stm32_i2c_traceevent(FAR struct stm32_i2c_priv_s *priv,
enum stm32_trace_e event, uint32_t parm);
static void stm32_i2c_tracedump(FAR struct stm32_i2c_priv_s *priv);
#endif
#endif /* CONFIG_I2C_TRACE */
static void stm32_i2c_setclock(FAR struct stm32_i2c_priv_s *priv,
uint32_t frequency);
static inline void stm32_i2c_sendstart(FAR struct stm32_i2c_priv_s *priv);
@ -273,7 +308,7 @@ static inline uint32_t stm32_i2c_getstatus(FAR struct stm32_i2c_priv_s *priv);
#ifdef I2C1_FSMC_CONFLICT
static inline uint32_t stm32_i2c_disablefsmc(FAR struct stm32_i2c_priv_s *priv);
static inline void stm32_i2c_enablefsmc(uint32_t ahbenr);
#endif
#endif /* I2C1_FSMC_CONFLICT */
static int stm32_i2c_isr(struct stm32_i2c_priv_s * priv);
#ifndef CONFIG_I2C_POLLED
#ifdef CONFIG_STM32_I2C1
@ -311,9 +346,23 @@ static int stm32_i2c_transfer(FAR struct i2c_dev_s *dev, FAR struct i2c_msg_s *m
************************************************************************************/
#ifdef CONFIG_STM32_I2C1
struct stm32_i2c_priv_s stm32_i2c1_priv =
static const struct stm32_i2c_config_s stm32_i2c1_config =
{
.base = STM32_I2C1_BASE,
.clk_bit = RCC_APB1ENR_I2C1EN,
.reset_bit = RCC_APB1RSTR_I2C1RST,
.scl_pin = GPIO_I2C1_SCL,
.sda_pin = GPIO_I2C1_SDA,
#ifndef CONFIG_I2C_POLLED
.isr = stm32_i2c1_isr,
.ev_irq = STM32_IRQ_I2C1EV,
.er_irq = STM32_IRQ_I2C1ER
#endif
};
struct stm32_i2c_priv_s stm32_i2c1_priv =
{
.config = &stm32_i2c1_config,
.refs = 0,
.intstate = INTSTATE_IDLE,
.msgc = 0,
@ -326,9 +375,23 @@ struct stm32_i2c_priv_s stm32_i2c1_priv =
#endif
#ifdef CONFIG_STM32_I2C2
struct stm32_i2c_priv_s stm32_i2c2_priv =
static const struct stm32_i2c_config_s stm32_i2c2_config =
{
.base = STM32_I2C2_BASE,
.clk_bit = RCC_APB1ENR_I2C2EN,
.reset_bit = RCC_APB1RSTR_I2C2RST,
.scl_pin = GPIO_I2C2_SCL,
.sda_pin = GPIO_I2C2_SDA,
#ifndef CONFIG_I2C_POLLED
.isr = stm32_i2c2_isr,
.ev_irq = STM32_IRQ_I2C2EV,
.er_irq = STM32_IRQ_I2C2ER
#endif
};
struct stm32_i2c_priv_s stm32_i2c2_priv =
{
.config = &stm32_i2c2_config,
.refs = 0,
.intstate = INTSTATE_IDLE,
.msgc = 0,
@ -341,9 +404,23 @@ struct stm32_i2c_priv_s stm32_i2c2_priv =
#endif
#ifdef CONFIG_STM32_I2C3
struct stm32_i2c_priv_s stm32_i2c3_priv =
static const struct stm32_i2c_config_s stm32_i2c3_config =
{
.base = STM32_I2C3_BASE,
.clk_bit = RCC_APB1ENR_I2C3EN,
.reset_bit = RCC_APB1RSTR_I2C3RST,
.scl_pin = GPIO_I2C3_SCL,
.sda_pin = GPIO_I2C3_SDA,
#ifndef CONFIG_I2C_POLLED
.isr = stm32_i2c3_isr,
.ev_irq = STM32_IRQ_I2C3EV,
.er_irq = STM32_IRQ_I2C3ER
#endif
};
struct stm32_i2c_priv_s stm32_i2c3_priv =
{
.config = &stm32_i2c3_config,
.refs = 0,
.intstate = INTSTATE_IDLE,
.msgc = 0,
@ -355,7 +432,6 @@ struct stm32_i2c_priv_s stm32_i2c3_priv =
};
#endif
/* Device Structures, Instantiation */
struct i2c_ops_s stm32_i2c_ops =
@ -391,7 +467,7 @@ struct i2c_ops_s stm32_i2c_ops =
static inline uint16_t stm32_i2c_getreg(FAR struct stm32_i2c_priv_s *priv,
uint8_t offset)
{
return getreg16(priv->base + offset);
return getreg16(priv->config->base + offset);
}
/************************************************************************************
@ -405,7 +481,7 @@ static inline uint16_t stm32_i2c_getreg(FAR struct stm32_i2c_priv_s *priv,
static inline void stm32_i2c_putreg(FAR struct stm32_i2c_priv_s *priv, uint8_t offset,
uint16_t value)
{
putreg16(value, priv->base + offset);
putreg16(value, priv->config->base + offset);
}
/************************************************************************************
@ -420,7 +496,7 @@ static inline void stm32_i2c_modifyreg(FAR struct stm32_i2c_priv_s *priv,
uint8_t offset, uint16_t clearbits,
uint16_t setbits)
{
modifyreg16(priv->base + offset, clearbits, setbits);
modifyreg16(priv->config->base + offset, clearbits, setbits);
}
/************************************************************************************
@ -439,6 +515,35 @@ static inline void stm32_i2c_sem_wait(FAR struct i2c_dev_s *dev)
}
}
/************************************************************************************
* Name: stm32_i2c_tousecs
*
* Description:
* Return a micro-second delay based on the number of bytes left to be processed.
*
************************************************************************************/
#ifdef CONFIG_STM32_I2C_DYNTIMEO
static useconds_t stm32_i2c_tousecs(int msgc, FAR struct i2c_msg_s *msgs)
{
size_t bytecount = 0;
int i;
/* Count the number of bytes left to process */
for (i = 0; i < msgc; i++)
{
bytecount += msgs[i].length;
}
/* Then return a number of microseconds based on a user provided scaling
* factor.
*/
return (useconds_t)(CONFIG_STM32_I2C_DYNTIMEO_USECPERBYTE * bytecount);
}
#endif
/************************************************************************************
* Name: stm32_i2c_sem_waitdone
*
@ -480,7 +585,18 @@ static inline int stm32_i2c_sem_waitdone(FAR struct stm32_i2c_priv_s *priv)
#if CONFIG_STM32_I2CTIMEOSEC > 0
abstime.tv_sec += CONFIG_STM32_I2CTIMEOSEC;
#endif
#if CONFIG_STM32_I2CTIMEOMS > 0
/* Add a value proportional to the number of bytes in the transfer */
#ifdef CONFIG_STM32_I2C_DYNTIMEO
abstime.tv_nsec += 1000 * stm32_i2c_tousecs(priv->msgc, priv->msgv);
if (abstime.tv_nsec > 1000 * 1000 * 1000)
{
abstime.tv_sec++;
abstime.tv_nsec -= 1000 * 1000 * 1000;
}
#elif CONFIG_STM32_I2CTIMEOMS > 0
abstime.tv_nsec += CONFIG_STM32_I2CTIMEOMS * 1000 * 1000;
if (abstime.tv_nsec > 1000 * 1000 * 1000)
{
@ -520,12 +636,21 @@ static inline int stm32_i2c_sem_waitdone(FAR struct stm32_i2c_priv_s *priv)
return ret;
}
#else
static inline int stm32_i2c_sem_waitdone(FAR struct stm32_i2c_priv_s *priv )
static inline int stm32_i2c_sem_waitdone(FAR struct stm32_i2c_priv_s *priv)
{
uint32_t timeout;
uint32_t start;
uint32_t elapsed;
int ret;
/* Get the timeout value */
#ifdef CONFIG_STM32_I2C_DYNTIMEO
timeout = USEC2TICK(stm32_i2c_tousecs(priv->msgc, priv->msgv));
#else
timeout = CONFIG_STM32_I2CTIMEOTICKS;
#endif
/* Signal the interrupt handler that we are waiting. NOTE: Interrupts
* are currently disabled but will be temporarily re-enabled below when
* sem_timedwait() sleeps.
@ -533,6 +658,7 @@ static inline int stm32_i2c_sem_waitdone(FAR struct stm32_i2c_priv_s *priv )
priv->intstate = INTSTATE_WAITING;
start = clock_systimer();
do
{
/* Poll by simply calling the timer interrupt handler until it
@ -548,10 +674,10 @@ static inline int stm32_i2c_sem_waitdone(FAR struct stm32_i2c_priv_s *priv )
/* Loop until the transfer is complete. */
while (priv->intstate != INTSTATE_DONE && elapsed < CONFIG_STM32_I2CTIMEOTICKS);
while (priv->intstate != INTSTATE_DONE && elapsed < timeout);
i2cvdbg("intstate: %d elapsed: %d threshold: %d status: %08x\n",
priv->intstate, elapsed, CONFIG_STM32_I2CTIMEOTICKS, priv->status);
priv->intstate, elapsed, timeout, priv->status);
/* Set the interrupt state back to IDLE */
@ -573,9 +699,18 @@ static inline void stm32_i2c_sem_waitstop(FAR struct stm32_i2c_priv_s *priv)
{
uint32_t start;
uint32_t elapsed;
uint32_t timeout;
uint32_t cr1;
uint32_t sr1;
/* Select a timeout */
#ifdef CONFIG_STM32_I2C_DYNTIMEO
timeout = USEC2TICK(CONFIG_STM32_I2C_DYNTIMEO_STARTSTOP);
#else
timeout = CONFIG_STM32_I2CTIMEOTICKS;
#endif
/* Wait as stop might still be in progress; but stop might also
* be set because of a timeout error: "The [STOP] bit is set and
* cleared by software, cleared by hardware when a Stop condition is
@ -608,7 +743,7 @@ static inline void stm32_i2c_sem_waitstop(FAR struct stm32_i2c_priv_s *priv)
/* Loop until the stop is complete or a timeout occurs. */
while (elapsed < CONFIG_STM32_I2CTIMEOTICKS);
while (elapsed < timeout);
/* If we get here then a timeout occurred with the STOP condition
* still pending.
@ -828,7 +963,7 @@ static void stm32_i2c_setclock(FAR struct stm32_i2c_priv_s *priv, uint32_t frequ
{
/* Fast mode speed calculation with Tlow/Thigh = 16/9 */
#ifdef CONFIG_I2C_DUTY16_9
#ifdef CONFIG_STM32_I2C_DUTY16_9
speed = (uint16_t)(STM32_PCLK1_FREQUENCY / (frequency * 25));
/* Set DUTY and fast speed bits */
@ -967,8 +1102,8 @@ static inline uint32_t stm32_i2c_disablefsmc(FAR struct stm32_i2c_priv_s *priv)
/* Is this I2C1 */
#ifdef CONFIG_STM32_I2C2
if (priv->base == STM32_I2C1_BASE)
#if defined(CONFIG_STM32_I2C2) || defined(CONFIG_STM32_I2C3)
if (priv->config->base == STM32_I2C1_BASE)
#endif
{
/* Disable FSMC unconditionally */
@ -1094,6 +1229,14 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
{
stm32_i2c_traceevent(priv, I2CEVENT_RCVBYTE, priv->dcnt);
/* No interrupts or context switches may occur in the following
* sequence. Otherwise, additional bytes may be sent by the
* device.
*/
#ifdef CONFIG_I2C_POLLED
irqstate_t state = irqsave();
#endif
/* Receive a byte */
*priv->ptr++ = stm32_i2c_getreg(priv, STM32_I2C_DR_OFFSET);
@ -1105,6 +1248,10 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
stm32_i2c_modifyreg(priv, STM32_I2C_CR1_OFFSET, I2C_CR1_ACK, 0);
}
priv->dcnt--;
#ifdef CONFIG_I2C_POLLED
irqrestore(state);
#endif
}
}
@ -1292,114 +1439,34 @@ static int stm32_i2c_init(FAR struct stm32_i2c_priv_s *priv)
{
/* Power-up and configure GPIOs */
switch (priv->base)
{
#ifdef CONFIG_STM32_I2C1
case STM32_I2C1_BASE:
/* Enable power and reset the peripheral */
/* Enable power and reset the peripheral */
modifyreg32(STM32_RCC_APB1ENR, 0, priv->config->clk_bit);
modifyreg32(STM32_RCC_APB1RSTR, 0, priv->config->reset_bit);
modifyreg32(STM32_RCC_APB1RSTR, priv->config->reset_bit, 0);
modifyreg32(STM32_RCC_APB1ENR, 0, RCC_APB1ENR_I2C1EN);
modifyreg32(STM32_RCC_APB1RSTR, 0, RCC_APB1RSTR_I2C1RST);
modifyreg32(STM32_RCC_APB1RSTR, RCC_APB1RSTR_I2C1RST, 0);
/* Configure pins */
if (stm32_configgpio(GPIO_I2C1_SCL) < 0)
{
return ERROR;
}
if (stm32_configgpio(GPIO_I2C1_SDA) < 0)
{
stm32_unconfiggpio(GPIO_I2C1_SCL);
return ERROR;
}
/* Attach ISRs */
#ifndef CONFIG_I2C_POLLED
irq_attach(STM32_IRQ_I2C1EV, stm32_i2c1_isr);
irq_attach(STM32_IRQ_I2C1ER, stm32_i2c1_isr);
up_enable_irq(STM32_IRQ_I2C1EV);
up_enable_irq(STM32_IRQ_I2C1ER);
#endif
break;
#endif
/* Configure pins */
#ifdef CONFIG_STM32_I2C2
case STM32_I2C2_BASE:
/* Enable power and reset the peripheral */
modifyreg32(STM32_RCC_APB1ENR, 0, RCC_APB1ENR_I2C2EN);
modifyreg32(STM32_RCC_APB1RSTR, 0, RCC_APB1RSTR_I2C2RST);
modifyreg32(STM32_RCC_APB1RSTR, RCC_APB1RSTR_I2C2RST, 0);
/* Configure pins */
if (stm32_configgpio(GPIO_I2C2_SCL) < 0)
{
return ERROR;
}
if (stm32_configgpio(GPIO_I2C2_SDA) < 0)
{
stm32_unconfiggpio(GPIO_I2C2_SCL);
return ERROR;
}
/* Attach ISRs */
#ifndef CONFIG_I2C_POLLED
irq_attach(STM32_IRQ_I2C2EV, stm32_i2c2_isr);
irq_attach(STM32_IRQ_I2C2ER, stm32_i2c2_isr);
up_enable_irq(STM32_IRQ_I2C2EV);
up_enable_irq(STM32_IRQ_I2C2ER);
#endif
break;
#endif
#ifdef CONFIG_STM32_I2C3
case STM32_I2C3_BASE:
/* Enable power and reset the peripheral */
modifyreg32(STM32_RCC_APB1ENR, 0, RCC_APB1ENR_I2C3EN);
modifyreg32(STM32_RCC_APB1RSTR, 0, RCC_APB1RSTR_I2C3RST);
modifyreg32(STM32_RCC_APB1RSTR, RCC_APB1RSTR_I2C3RST, 0);
/* Configure pins */
if (stm32_configgpio(GPIO_I2C3_SCL) < 0)
{
return ERROR;
}
if (stm32_configgpio(GPIO_I2C3_SDA) < 0)
{
stm32_unconfiggpio(GPIO_I2C3_SCL);
return ERROR;
}
/* Attach ISRs */
#ifndef CONFIG_I2C_POLLED
irq_attach(STM32_IRQ_I2C3EV, stm32_i2c3_isr);
irq_attach(STM32_IRQ_I2C3ER, stm32_i2c3_isr);
up_enable_irq(STM32_IRQ_I2C3EV);
up_enable_irq(STM32_IRQ_I2C3ER);
#endif
break;
#endif
default:
return ERROR;
if (stm32_configgpio(priv->config->scl_pin) < 0)
{
return ERROR;
}
if (stm32_configgpio(priv->config->sda_pin) < 0)
{
stm32_unconfiggpio(priv->config->scl_pin);
return ERROR;
}
/* Attach ISRs */
#ifndef CONFIG_I2C_POLLED
irq_attach(priv->config->ev_irq, priv->config->isr);
irq_attach(priv->config->er_irq, priv->config->isr);
up_enable_irq(priv->config->ev_irq);
up_enable_irq(priv->config->er_irq);
#endif
/* Set peripheral frequency, where it must be at least 2 MHz for 100 kHz
* or 4 MHz for 400 kHz. This also disables all I2C interrupts.
*/
@ -1427,42 +1494,23 @@ static int stm32_i2c_deinit(FAR struct stm32_i2c_priv_s *priv)
stm32_i2c_putreg(priv, STM32_I2C_CR1_OFFSET, 0);
switch (priv->base)
{
#ifdef CONFIG_STM32_I2C1
case STM32_I2C1_BASE:
stm32_unconfiggpio(GPIO_I2C1_SCL);
stm32_unconfiggpio(GPIO_I2C1_SDA);
/* Unconfigure GPIO pins */
stm32_unconfiggpio(priv->config->scl_pin);
stm32_unconfiggpio(priv->config->sda_pin);
/* Disable and detach interrupts */
#ifndef CONFIG_I2C_POLLED
up_disable_irq(STM32_IRQ_I2C1EV);
up_disable_irq(STM32_IRQ_I2C1ER);
irq_detach(STM32_IRQ_I2C1EV);
irq_detach(STM32_IRQ_I2C1ER);
up_disable_irq(priv->config->ev_irq);
up_disable_irq(priv->config->er_irq);
irq_detach(priv->config->ev_irq);
irq_detach(priv->config->er_irq);
#endif
modifyreg32(STM32_RCC_APB1ENR, RCC_APB1ENR_I2C1EN, 0);
break;
#endif
#ifdef CONFIG_STM32_I2C2
case STM32_I2C2_BASE:
stm32_unconfiggpio(GPIO_I2C2_SCL);
stm32_unconfiggpio(GPIO_I2C2_SDA);
#ifndef CONFIG_I2C_POLLED
up_disable_irq(STM32_IRQ_I2C2EV);
up_disable_irq(STM32_IRQ_I2C2ER);
irq_detach(STM32_IRQ_I2C2EV);
irq_detach(STM32_IRQ_I2C2ER);
#endif
modifyreg32(STM32_RCC_APB1ENR, RCC_APB1ENR_I2C2EN, 0);
break;
#endif
default:
return ERROR;
}
/* Disable clocking */
modifyreg32(STM32_RCC_APB1ENR, priv->config->clk_bit, 0);
return OK;
}
@ -1524,14 +1572,13 @@ static int stm32_i2c_process(FAR struct i2c_dev_s *dev, FAR struct i2c_msg_s *ms
struct stm32_i2c_inst_s *inst = (struct stm32_i2c_inst_s *)dev;
FAR struct stm32_i2c_priv_s *priv = inst->priv;
uint32_t status = 0;
uint32_t ahbenr;
int errval = 0;
ASSERT(count);
/* Disable FSMC that shares a pin with I2C1 (LBAR) */
ahbenr = stm32_i2c_disablefsmc(priv);
(void)stm32_i2c_disablefsmc(priv);
/* Wait for any STOP in progress. NOTE: If we have to disable the FSMC
* then we cannot do this at the top of the loop, unfortunately. The STOP
@ -1594,6 +1641,10 @@ static int stm32_i2c_process(FAR struct i2c_dev_s *dev, FAR struct i2c_msg_s *ms
*/
stm32_i2c_clrstart(priv);
/* Clear busy flag in case of timeout */
status = priv->status & 0xffff;
}
else
{
@ -1914,4 +1965,4 @@ int up_i2cuninitialize(FAR struct i2c_dev_s * dev)
return OK;
}
#endif /* defined(CONFIG_STM32_I2C1) && defined(CONFIG_STM32_I2C2) */
#endif /* CONFIG_STM32_I2C1 || CONFIG_STM32_I2C2 || CONFIG_STM32_I2C3 */

31
arch/arm/src/stm32/stm32_spi.c
View file

@ -49,7 +49,7 @@
* 3. Add a calls to up_spiinitialize() in your low level application
* initialization logic
* 4. The handle returned by up_spiinitialize() may then be used to bind the
* SPI driver to higher level logic (e.g., calling
* SPI driver to higher level logic (e.g., calling
* mmcsd_spislotinitialize(), for example, will bind the SPI driver to
* the SPI MMC/SD driver).
*
@ -881,7 +881,7 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
else
{
/* Less than fPCLK/128. This is as slow as we can go */
setbits = SPI_CR1_FPCLCKd256; /* 111: fPCLK/256 */
actual = priv->spiclock >> 8;
}
@ -941,22 +941,22 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
setbits = 0;
clrbits = SPI_CR1_CPOL|SPI_CR1_CPHA;
break;
case SPIDEV_MODE1: /* CPOL=0; CPHA=1 */
setbits = SPI_CR1_CPHA;
clrbits = SPI_CR1_CPOL;
break;
case SPIDEV_MODE2: /* CPOL=1; CPHA=0 */
setbits = SPI_CR1_CPOL;
clrbits = SPI_CR1_CPHA;
break;
case SPIDEV_MODE3: /* CPOL=1; CPHA=1 */
setbits = SPI_CR1_CPOL|SPI_CR1_CPHA;
clrbits = 0;
break;
default:
return;
}
@ -1008,7 +1008,7 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
setbits = 0;
clrbits = SPI_CR1_DFF;
break;
case 16:
setbits = SPI_CR1_DFF;
clrbits = 0;
@ -1111,7 +1111,7 @@ static void spi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
}
/* Exchange one word */
word = spi_send(dev, word);
/* Is there a buffer to receive the return value? */
@ -1120,7 +1120,7 @@ static void spi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
{
*dest++ = word;
}
}
}
}
else
{
@ -1144,7 +1144,7 @@ static void spi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
}
/* Exchange one word */
word = (uint8_t)spi_send(dev, (uint16_t)word);
/* Is there a buffer to receive the return value? */
@ -1152,7 +1152,7 @@ static void spi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
if (dest)
{
*dest++ = word;
}
}
}
}
}
@ -1331,7 +1331,7 @@ static void spi_portinitialize(FAR struct stm32_spidev_s *priv)
priv->txdma = stm32_dmachannel(priv->txch);
DEBUGASSERT(priv->rxdma && priv->txdma);
#endif
/* Enable spi */
spi_modifycr1(priv, SPI_CR1_SPE, 0);
@ -1360,7 +1360,7 @@ FAR struct spi_dev_s *up_spiinitialize(int port)
FAR struct stm32_spidev_s *priv = NULL;
irqstate_t flags = irqsave();
#ifdef CONFIG_STM32_SPI1
if (port == 1)
{
@ -1431,7 +1431,12 @@ FAR struct spi_dev_s *up_spiinitialize(int port)
spi_portinitialize(priv);
}
}
else
#endif
{
spidbg("ERROR: Unsupported SPI port: %d\n", port);
return NULL;
}
irqrestore(flags);
return (FAR struct spi_dev_s *)priv;

7
arch/avr/src/avr/avr_internal.h
View file

@ -1,7 +1,7 @@
/****************************************************************************
* arch/avr/src/avr/avr_internal.h
*
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
* Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -40,7 +40,10 @@
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#ifndef __ASSEMBLY__
# include <nuttx/compiler.h>
# include <sys/types.h>
# include <stdint.h>
# include <stdbool.h>
@ -111,7 +114,7 @@ extern void up_copystate(uint8_t *dest, uint8_t *src);
*
************************************************************************************/
extern void up_fullcontextrestore(uint8_t *restoreregs) __attribute__ ((noreturn));
extern void up_fullcontextrestore(uint8_t *restoreregs) noreturn_function;
/************************************************************************************
* Name: up_switchcontext

7
arch/avr/src/avr32/avr32_internal.h
View file

@ -1,7 +1,7 @@
/****************************************************************************
* arch/avr/src/avr32/up_internal.h
*
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
* Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -40,7 +40,10 @@
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#ifndef __ASSEMBLY__
# include <nuttx/compiler.h>
# include <stdint.h>
#endif
@ -109,7 +112,7 @@ extern void up_copystate(uint32_t *dest, uint32_t *src);
*
************************************************************************************/
extern void up_fullcontextrestore(uint32_t *restoreregs) __attribute__ ((noreturn));
extern void up_fullcontextrestore(uint32_t *restoreregs) noreturn_function;
/************************************************************************************
* Name: up_switchcontext

2
arch/avr/src/common/up_assert.c
View file

@ -90,7 +90,7 @@
* Name: _up_assert
****************************************************************************/
static void _up_assert(int errorcode) /* __attribute__ ((noreturn)) */
static void _up_assert(int errorcode) /* noreturn_function */
{
/* Are we in an interrupt handler or the idle task? */

4
arch/hc/src/common/up_internal.h
View file

@ -41,7 +41,9 @@
****************************************************************************/
#include <nuttx/config.h>
#ifndef __ASSEMBLY__
# include <nuttx/compiler.h>
# include <stdint.h>
#endif
@ -152,7 +154,7 @@ extern void up_copystate(uint8_t *dest, uint8_t *src);
extern void up_decodeirq(uint8_t *regs);
extern void up_irqinitialize(void);
extern int up_saveusercontext(uint8_t *saveregs);
extern void up_fullcontextrestore(uint8_t *restoreregs) __attribute__ ((noreturn));
extern void up_fullcontextrestore(uint8_t *restoreregs) noreturn_function;
extern void up_switchcontext(uint8_t *saveregs, uint8_t *restoreregs);
/* Interrupt handling */

4
arch/hc/src/m9s12/m9s12_assert.c
View file

@ -1,7 +1,7 @@
/****************************************************************************
* arch/hc/src/m9s12/m9s12_assert.c
*
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
* Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -247,7 +247,7 @@ static void up_dumpstate(void)
* Name: _up_assert
****************************************************************************/
static void _up_assert(int errorcode) /* __attribute__ ((noreturn)) */
static void _up_assert(int errorcode) /* noreturn_function */
{
/* Are we in an interrupt handler or the idle task? */

4
arch/mips/include/mips32/syscall.h
View file

@ -1,7 +1,7 @@
/****************************************************************************
* arch/mips/include/mips32/syscall.h
*
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
* Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -150,7 +150,7 @@
/* SYS call 1:
*
* void up_fullcontextrestore(uint32_t *restoreregs) __attribute__ ((noreturn));
* void up_fullcontextrestore(uint32_t *restoreregs) noreturn_function;
*/
#define SYS_restore_context (1)

4
arch/mips/src/mips32/up_assert.c
View file

@ -1,7 +1,7 @@
/****************************************************************************
* arch/mips/src/mips32/up_assert.c
*
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
* Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -90,7 +90,7 @@
* Name: _up_assert
****************************************************************************/
static void _up_assert(int errorcode) /* __attribute__ ((noreturn)) */
static void _up_assert(int errorcode) /* noreturn_function */
{
/* Are we in an interrupt handler or the idle task? */

4
arch/mips/src/mips32/up_swint0.c
View file

@ -1,7 +1,7 @@
/****************************************************************************
* arch/mips/src/mips32/up_swint0.c
*
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
* Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -290,7 +290,7 @@ int up_swint0(int irq, FAR void *context)
{
/* R4=SYS_restore_context: This a restore context command:
*
* void up_fullcontextrestore(uint32_t *restoreregs) __attribute__ ((noreturn));
* void up_fullcontextrestore(uint32_t *restoreregs) noreturn_function;
*
* At this point, the following values are saved in context:
*

4
arch/sh/src/common/up_assert.c
View file

@ -1,7 +1,7 @@
/****************************************************************************
* arch/sh/src/common/up_assert.c
*
* Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
* Copyright (C) 2008-2009, 2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -76,7 +76,7 @@
* Name: _up_assert
****************************************************************************/
static void _up_assert(int errorcode) /* __attribute__ ((noreturn)) */
static void _up_assert(int errorcode) /* noreturn_function */
{
/* Are we in an interrupt handler or the idle task? */

5
arch/sh/src/common/up_internal.h
View file

@ -40,7 +40,10 @@
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#ifndef __ASSEMBLY__
# include <nuttx/compiler.h>
# include <stdint.h>
#endif
@ -144,7 +147,7 @@ extern void up_copystate(uint32_t *dest, uint32_t *src);
extern void up_dataabort(uint32_t *regs);
extern void up_decodeirq(uint32_t *regs);
extern uint32_t *up_doirq(int irq, uint32_t *regs);
extern void up_fullcontextrestore(uint32_t *regs) __attribute__ ((noreturn));
extern void up_fullcontextrestore(uint32_t *regs) noreturn_function;
extern void up_irqinitialize(void);
extern void up_prefetchabort(uint32_t *regs);
extern int up_saveusercontext(uint32_t *regs);

3
arch/sim/src/up_internal.h
View file

@ -41,6 +41,7 @@
**************************************************************************/
#include <nuttx/config.h>
#include <nuttx/compiler.h>
#include <sys/types.h>
#include <nuttx/irq.h>
@ -150,7 +151,7 @@ extern volatile int g_eventloop;
/* up_setjmp.S ************************************************************/
extern int up_setjmp(int *jb);
extern void up_longjmp(int *jb, int val) __attribute__ ((noreturn));
extern void up_longjmp(int *jb, int val) noreturn_function;
/* up_devconsole.c ********************************************************/

10
arch/x86/include/i486/arch.h
View file

@ -45,7 +45,9 @@
****************************************************************************/
#include <nuttx/config.h>
#ifndef __ASSEMBLY__
# include <nuttx/compiler.h>
# include <stdint.h>
#endif
@ -323,7 +325,7 @@ struct gdt_entry_s
uint8_t access; /* Access flags, determine ring segment can be used in */
uint8_t granularity;
uint8_t hibase; /* The last 8 bits of the base */
} __attribute__((packed));
} packed_struct;
/* This structure refers to the array of GDT entries, and is in the format
* required by the lgdt instruction.
@ -333,7 +335,7 @@ struct gdt_ptr_s
{
uint16_t limit; /* The upper 16 bits of all selector limits */
uint32_t base; /* The address of the first GDT entry */
} __attribute__((packed));
} packed_struct;
/* IDT data structures ******************************************************
*
@ -349,7 +351,7 @@ struct idt_entry_s
uint8_t zero; /* This must always be zero */
uint8_t flags; /* (See documentation) */
uint16_t hibase; /* Upper 16-bits of vector address for interrupt */
} __attribute__((packed));
} packed_struct;
/* A struct describing a pointer to an array of interrupt handlers. This is
* in a format suitable for giving to 'lidt'.
@ -359,7 +361,7 @@ struct idt_ptr_s
{
uint16_t limit;
uint32_t base; /* The address of the first GDT entry */
} __attribute__((packed));
} packed_struct;
/****************************************************************************
* Inline functions

4
arch/x86/src/common/up_assert.c
View file

@ -1,7 +1,7 @@
/****************************************************************************
* arch/x86/src/common/up_assert.c
*
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
* Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -209,7 +209,7 @@ static void up_dumpstate(void)
* Name: _up_assert
****************************************************************************/
static void _up_assert(int errorcode) /* __attribute__ ((noreturn)) */
static void _up_assert(int errorcode) /* noreturn_function */
{
/* Are we in an interrupt handler or the idle task? */

5
arch/x86/src/common/up_internal.h
View file

@ -40,7 +40,10 @@
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#ifndef __ASSEMBLY__
# include <nuttx/compiler.h>
# include <stdint.h>
#endif
@ -174,7 +177,7 @@ extern void up_irqinitialize(void);
extern void weak_function up_dmainitialize(void);
#endif
extern int up_saveusercontext(uint32_t *saveregs);
extern void up_fullcontextrestore(uint32_t *restoreregs) __attribute__ ((noreturn));
extern void up_fullcontextrestore(uint32_t *restoreregs) noreturn_function;
extern void up_switchcontext(uint32_t *saveregs, uint32_t *restoreregs);
extern void up_sigdeliver(void);
extern void up_lowputc(char ch);

3
arch/x86/src/i486/up_irq.c
View file

@ -39,6 +39,7 @@
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/compiler.h>
#include <stdint.h>
#include <string.h>
@ -62,7 +63,7 @@
* Private Function Prototypes
****************************************************************************/
static void idt_outb(uint8_t val, uint16_t addr) __attribute__((noinline));
static void idt_outb(uint8_t val, uint16_t addr) noinline_function;
static void up_remappic(void);
static void up_idtentry(unsigned int index, uint32_t base, uint16_t sel,
uint8_t flags);

4
arch/x86/src/qemu/qemu_fullcontextrestore.S
View file

@ -1,7 +1,7 @@
/**************************************************************************
* arch/x86/src/qemu/qemu_fullcontextrestore.S
*
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
* Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -89,7 +89,7 @@
* Name: up_fullcontextrestore
*
* Full C prototype:
* void up_fullcontextrestore(uint32_t *regs) __attribute__ ((noreturn));
* void up_fullcontextrestore(uint32_t *regs) noreturn_function;
*
**************************************************************************/

5
arch/x86/src/qemu/qemu_handlers.c
View file

@ -1,7 +1,7 @@
/****************************************************************************
* arch/x86/src/qemu/qemu_handlers.c
*
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
* Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -38,6 +38,7 @@
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/compiler.h>
#include <nuttx/arch.h>
#include <arch/io.h>
@ -52,7 +53,7 @@
* Private Function Prototypes
****************************************************************************/
static void idt_outb(uint8_t val, uint16_t addr) __attribute__((noinline));
static void idt_outb(uint8_t val, uint16_t addr) noinline_function;
/****************************************************************************
* Private Data

4
arch/z16/src/common/up_assert.c
View file

@ -1,7 +1,7 @@
/****************************************************************************
* common/up_assert.c
*
* Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
* Copyright (C) 2008-2009, 2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -77,7 +77,7 @@
* Name: _up_assert
****************************************************************************/
static void _up_assert(int errorcode) /* __attribute__ ((noreturn)) */
static void _up_assert(int errorcode) /* noreturn_function */
{
/* Are we in an interrupt handler or the idle task? */

4
arch/z80/src/common/up_assert.c
View file

@ -1,7 +1,7 @@
/****************************************************************************
* common/up_assert.c
*
* Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
* Copyright (C) 2007-2009, 2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -77,7 +77,7 @@
* Name: _up_assert
****************************************************************************/
static void _up_assert(int errorcode) /* __attribute__ ((noreturn)) */
static void _up_assert(int errorcode) /* noreturn_function */
{
/* Are we in an interrupt handler or the idle task? */