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basic support of STM32L4VG Discovery board. Functioning nsh, leds, buttons. Also compatible with, but not requiring, RNG code in 'arch'.

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ziggurat29 2016-03-25 15:21:24 -05:00
parent 1652052f52
commit 5df125cf9c
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15
configs/Kconfig
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@ -974,6 +974,17 @@ config ARCH_BOARD_STM32F746G_DISCO
MCU. The STM32F746NGH6 is a 216MHz Cortex-M7 operation with 1024Kb Flash
memory and 300Kb SRAM.
config ARCH_BOARD_STM32L476VG_DISCO
bool "STMicro STM32F746VG-Discovery board"
depends on ARCH_CHIP_STM32L476RG
select ARCH_HAVE_LEDS
select ARCH_HAVE_BUTTONS
select ARCH_HAVE_IRQBUTTONS
---help---
STMicro STM32L476VG_DISCO development board featuring the STM32L476VG
MCU. The STM32L476VG is a Cortex-M4 optimised for low-power operation
at up to 80MHz operation with 1024Kb Flash memory and 96+32Kb SRAM.
config ARCH_BOARD_STM32L_DISCOVERY
bool "STMicro STM32L-Discovery board"
depends on ARCH_CHIP_STM32L152RB
@ -1405,6 +1416,7 @@ config ARCH_BOARD
default "stm32f4discovery" if ARCH_BOARD_STM32F4_DISCOVERY
default "stm32f429i-disco" if ARCH_BOARD_STM32F429I_DISCO
default "stm32f746g-disco" if ARCH_BOARD_STM32F746G_DISCO
default "stm32l476vg-disco" if ARCH_BOARD_STM32L476VG_DISCO
default "stm32ldiscovery" if ARCH_BOARD_STM32L_DISCOVERY
default "stm32vldiscovery" if ARCH_BOARD_STM32VL_DISCOVERY
default "mikroe-stm32f4" if ARCH_BOARD_MIKROE_STM32F4
@ -1773,6 +1785,9 @@ endif
if ARCH_BOARD_STM32F746G_DISCO
source "configs/stm32f746g-disco/Kconfig"
endif
if ARCH_BOARD_STM32L476VG_DISCO
source "configs/stm32l476vg-disco/Kconfig"
endif
if ARCH_BOARD_STM32L_DISCOVERY
source "configs/stm32ldiscovery/Kconfig"
endif

8
configs/stm32l476vg-disco/Kconfig Normal file
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@ -0,0 +1,8 @@
#
# For a description of the syntax of this configuration file,
# see the file kconfig-language.txt in the NuttX tools repository.
#
if ARCH_BOARD_STM32L476VG_DISCO
endif # ARCH_BOARD_STM32L476VG_DISCO

611
configs/stm32l476vg-disco/README.txt Normal file
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@ -0,0 +1,611 @@
XXX all this needs review and update
README
======
This README discusses issues unique to NuttX configurations for the ST
STM32L476VG Discovery board from ST Micro. See
http://www.st.com/stm32l476g-disco
STM32L476VG:
Microprocessor: 32-bit ARM Cortex M4 at 80MHz STM32F476VGT6
Memory: 1024 KB Flash and 96+32 KB SRAM
ADC: 3x12-bit, 2.4 MSPS A/D converter: up to 24 channels
DMA: 16-stream DMA controllers with FIFOs and burst support
Timers: Up to 11 timers: up to eight 16-bit, two 32-bit timers, two
watchdog timers, and a SysTick timer
GPIO: Up to 51 I/O ports with interrupt capability
I2C: Up to 3 x I2C interfaces
USARTs: Up to 3 USARTs, 2 UARTs, 1 LPUART
SPIs: Up to 3 SPIs
SAIs: Up to 2 dual-channel audio interfaces
CAN interface
SDIO interface
QSPI interface
USB: USB 2.0 full-speed device/host/OTG controller with on-chip PHY
CRC calculation unit
RTC
Board features:
Peripherals: 2 led, 1 d-pad joystick, 2 x LED, LCD, USC OTG FS, SAI stereo
Digital Microphone, MEMS Accelerometer, Magnetometer,
Gyroscope, 128 Mbit QSPI Flash, current ammeter
Debug: Serial wire debug and JTAG interfaces
Uses a STM32F103 to provide a ST-Link for programming, debug similar to the
OpenOcd FTDI function - USB to JTAG front-end.
See http://mbed.org/platforms/ST-Nucleo-L476RG for more
information about these boards.
Contents
========
- Development Environment
- GNU Toolchain Options
- IDEs
- NuttX EABI "buildroot" Toolchain
- NXFLAT Toolchain
- Hardware
- Button
- LED
- USARTs and Serial Consoles
- LQFP64
- mbed
- Shields
- Configurations
Development Environment
=======================
Either Linux or Cygwin on Windows can be used for the development environment.
The source has been built only using the GNU toolchain (see below). Other
toolchains will likely cause problems.
GNU Toolchain Options
=====================
Toolchain Configurations
------------------------
The NuttX make system has been modified to support the following different
toolchain options.
1. The CodeSourcery GNU toolchain,
2. The Atollic Toolchain,
3. The devkitARM GNU toolchain,
4. Raisonance GNU toolchain, or
5. The NuttX buildroot Toolchain (see below).
All testing has been conducted using the CodeSourcery toolchain for Linux.
To use the Atollic, devkitARM, Raisonance GNU, or NuttX buildroot toolchain,
you simply need to add one of the following configuration options to your
.config (or defconfig) file:
CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=n : CodeSourcery under Windows
CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux
CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC=y : The Atollic toolchain under Windows
CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM=n : devkitARM under Windows
CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE=y : Raisonance RIDE7 under Windows
CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=n : NuttX buildroot under Linux or Cygwin (default)
If you change the default toolchain, then you may also have to modify the PATH in
the setenv.h file if your make cannot find the tools.
NOTE: There are several limitations to using a Windows based toolchain in a
Cygwin environment. The three biggest are:
1. The Windows toolchain cannot follow Cygwin paths. Path conversions are
performed automatically in the Cygwin makefiles using the 'cygpath' utility
but you might easily find some new path problems. If so, check out 'cygpath -w'
2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic links
are used in Nuttx (e.g., include/arch). The make system works around these
problems for the Windows tools by copying directories instead of linking them.
But this can also cause some confusion for you: For example, you may edit
a file in a "linked" directory and find that your changes had no effect.
That is because you are building the copy of the file in the "fake" symbolic
directory. If you use a Windows toolchain, you should get in the habit of
making like this:
V=1 make clean_context all 2>&1 |tee mout
An alias in your .bashrc file might make that less painful.
3. Dependencies are not made when using Windows versions of the GCC. This is
because the dependencies are generated using Windows pathes which do not
work with the Cygwin make.
MKDEP = $(TOPDIR)/tools/mknulldeps.sh
The Atollic "Pro" and "Lite" Toolchain
--------------------------------------
One problem that I had with the Atollic toolchains is that the provide a gcc.exe
and g++.exe in the same bin/ file as their ARM binaries. If the Atollic bin/ path
appears in your PATH variable before /usr/bin, then you will get the wrong gcc
when you try to build host executables. This will cause to strange, uninterpretable
errors build some host binaries in tools/ when you first make.
Also, the Atollic toolchains are the only toolchains that have built-in support for
the FPU in these configurations. If you plan to use the Cortex-M4 FPU, you will
need to use the Atollic toolchain for now. See the FPU section below for more
information.
The Atollic "Lite" Toolchain
----------------------------
The free, "Lite" version of the Atollic toolchain does not support C++ nor
does it support ar, nm, objdump, or objdcopy. If you use the Atollic "Lite"
toolchain, you will have to set:
CONFIG_HAVE_CXX=n
In order to compile successfully. Otherwise, you will get errors like:
"C++ Compiler only available in TrueSTUDIO Professional"
The make may then fail in some of the post link processing because of some of
the other missing tools. The Make.defs file replaces the ar and nm with
the default system x86 tool versions and these seem to work okay. Disable all
of the following to avoid using objcopy:
CONFIG_RRLOAD_BINARY=n
CONFIG_INTELHEX_BINARY=n
CONFIG_MOTOROLA_SREC=n
CONFIG_RAW_BINARY=n
devkitARM
---------
The devkitARM toolchain includes a version of MSYS make. Make sure that the
the paths to Cygwin's /bin and /usr/bin directories appear BEFORE the devkitARM
path or will get the wrong version of make.
IDEs
====
NuttX is built using command-line make. It can be used with an IDE, but some
effort will be required to create the project.
Makefile Build
--------------
Under Eclipse, it is pretty easy to set up an "empty makefile project" and
simply use the NuttX makefile to build the system. That is almost for free
under Linux. Under Windows, you will need to set up the "Cygwin GCC" empty
makefile project in order to work with Windows (Google for "Eclipse Cygwin" -
there is a lot of help on the internet).
Using Sourcery CodeBench from http://www.mentor.com/embedded-software/sourcery-tools/sourcery-codebench/overview
Download and install the latest version (as of this writting it was
sourceryg++-2013.05-64-arm-none-eabi)
Import the project from git.
File->import->Git-URI, then import a Exiting code as a Makefile progject
from the working directory the git clone was done to.
Select the Sourcery CodeBench for ARM EABI. N.B. You must do one command line
build, before the make will work in CodeBench.
Native Build
------------
Here are a few tips before you start that effort:
1) Select the toolchain that you will be using in your .config file
2) Start the NuttX build at least one time from the Cygwin command line
before trying to create your project. This is necessary to create
certain auto-generated files and directories that will be needed.
3) Set up include pathes: You will need include/, arch/arm/src/stm32,
arch/arm/src/common, arch/arm/src/armv7-m, and sched/.
4) All assembly files need to have the definition option -D __ASSEMBLY__
on the command line.
Startup files will probably cause you some headaches. The NuttX startup file
is arch/arm/src/stm32/stm32_vectors.S. With RIDE, I have to build NuttX
one time from the Cygwin command line in order to obtain the pre-built
startup object needed by RIDE.
NuttX EABI "buildroot" Toolchain
================================
A GNU GCC-based toolchain is assumed. The files */setenv.sh should
be modified to point to the correct path to the Cortex-M3 GCC toolchain (if
different from the default in your PATH variable).
If you have no Cortex-M3 toolchain, one can be downloaded from the NuttX
Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/).
This GNU toolchain builds and executes in the Linux or Cygwin environment.
1. You must have already configured Nuttx in <some-dir>/nuttx.
$ (cd tools; ./configure.sh nucleo-f4x1re/f401-nsh)
$ make qconfig
$ V=1 make context all 2>&1 | tee mout
Use the f411-nsh configuration if you have the Nucleo-F411RE board.
2. Download the latest buildroot package into <some-dir>
3. unpack the buildroot tarball. The resulting directory may
have versioning information on it like buildroot-x.y.z. If so,
rename <some-dir>/buildroot-x.y.z to <some-dir>/buildroot.
4. cd <some-dir>/buildroot
5. cp configs/cortexm3-eabi-defconfig-4.6.3 .config
6. make oldconfig
7. make
8. Edit setenv.h, if necessary, so that the PATH variable includes
the path to the newly built binaries.
See the file configs/README.txt in the buildroot source tree. That has more
details PLUS some special instructions that you will need to follow if you are
building a Cortex-M3 toolchain for Cygwin under Windows.
NOTE: Unfortunately, the 4.6.3 EABI toolchain is not compatible with the
the NXFLAT tools. See the top-level TODO file (under "Binary loaders") for
more information about this problem. If you plan to use NXFLAT, please do not
use the GCC 4.6.3 EABI toolchain; instead use the GCC 4.3.3 EABI toolchain.
NXFLAT Toolchain
================
If you are *not* using the NuttX buildroot toolchain and you want to use
the NXFLAT tools, then you will still have to build a portion of the buildroot
tools -- just the NXFLAT tools. The buildroot with the NXFLAT tools can
be downloaded from the NuttX Bitbucket download site
(https://bitbucket.org/patacongo/nuttx/downloads/).
This GNU toolchain builds and executes in the Linux or Cygwin environment.
1. You must have already configured Nuttx in <some-dir>/nuttx.
cd tools
./configure.sh lpcxpresso-lpc1768/<sub-dir>
2. Download the latest buildroot package into <some-dir>
3. unpack the buildroot tarball. The resulting directory may
have versioning information on it like buildroot-x.y.z. If so,
rename <some-dir>/buildroot-x.y.z to <some-dir>/buildroot.
4. cd <some-dir>/buildroot
5. cp configs/cortexm3-defconfig-nxflat .config
6. make oldconfig
7. make
8. Edit setenv.h, if necessary, so that the PATH variable includes
the path to the newly builtNXFLAT binaries.
mbed
====
The Nucleo-F401RE includes boot loader from mbed:
https://mbed.org/platforms/ST-Nucleo-F401RE/
https://mbed.org/handbook/Homepage
Using the mbed loader:
1. Connect the Nucleo-F4x1RE to the host PC using the USB connector.
2. A new file system will appear called NUCLEO; open it with Windows
Explorer (assuming that you are using Windows).
3. Drag and drop nuttx.bin into the MBED window. This will load the
nuttx.bin binary into the Nucleo-F4x1RE. The NUCLEO window will
close then re-open and the Nucleo-F4x1RE will be running the new code.
Hardware
========
GPIO
----
SERIAL_TX=PA_2 USER_BUTTON=PC_13
SERIAL_RX=PA_3 LED1 =PA_5
A0=PA_0 USART2RX D0=PA_3 D8 =PA_9
A1=PA_1 USART2TX D1=PA_2 D9 =PC_7
A2=PA_4 D2=PA_10 WIFI_CS=D10=PB_6 SPI_CS
A3=PB_0 WIFI_INT=D3=PB_3 D11=PA_7 SPI_MOSI
A4=PC_1 SDCS=D4=PB_5 D12=PA_6 SPI_MISO
A5=PC_0 WIFI_EN=D5=PB_4 LED1=D13=PA_5 SPI_SCK
LED2=D6=PB_10 I2C1_SDA=D14=PB_9 Probe
D7=PA_8 I2C1_SCL=D15=PB_8 Probe
From: https://mbed.org/platforms/ST-Nucleo-F401RE/
Buttons
-------
B1 USER: the user button is connected to the I/O PC13 (pin 2) of the STM32
microcontroller.
LEDs
----
The Nucleo F401RE and Nucleo F411RE provide a single user LED, LD2. LD2
is the green LED connected to Arduino signal D13 corresponding to MCU I/O
PA5 (pin 21) or PB13 (pin 34) depending on the STM32target.
- When the I/O is HIGH value, the LED is on.
- When the I/O is LOW, the LED is off.
These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is
defined. In that case, the usage by the board port is defined in
include/board.h and src/sam_leds.c. The LEDs are used to encode OS-related
events as follows when the red LED (PE24) is available:
SYMBOL Meaning LD2
------------------- ----------------------- -----------
LED_STARTED NuttX has been started OFF
LED_HEAPALLOCATE Heap has been allocated OFF
LED_IRQSENABLED Interrupts enabled OFF
LED_STACKCREATED Idle stack created ON
LED_INIRQ In an interrupt No change
LED_SIGNAL In a signal handler No change
LED_ASSERTION An assertion failed No change
LED_PANIC The system has crashed Blinking
LED_IDLE MCU is is sleep mode Not used
Thus if LD2, NuttX has successfully booted and is, apparently, running
normally. If LD2 is flashing at approximately 2Hz, then a fatal error
has been detected and the system has halted.
Serial Consoles
===============
USART1
------
Pins and Connectors:
RXD: PA11 CN10 pin 14
PB7 CN7 pin 21
TXD: PA10 CN9 pin 3, CN10 pin 33
PB6 CN5 pin 3, CN10 pin 17
NOTE: You may need to edit the include/board.h to select different USART1
pin selections.
TTL to RS-232 converter connection:
Nucleo CN10 STM32F4x1RE
----------- ------------
Pin 21 PA9 USART1_RX *Warning you make need to reverse RX/TX on
Pin 33 PA10 USART1_TX some RS-232 converters
Pin 20 GND
Pin 8 U5V
To configure USART1 as the console:
CONFIG_STM32_USART1=y
CONFIG_USART1_ISUART=y
CONFIG_USART1_SERIAL_CONSOLE=y
CONFIG_USART1_RXBUFSIZE=256
CONFIG_USART1_TXBUFSIZE=256
CONFIG_USART1_BAUD=115200
CONFIG_USART1_BITS=8
CONFIG_USART1_PARITY=0
CONFIG_USART1_2STOP=0
USART2
-----
Pins and Connectors:
RXD: PA3 CN9 pin 1 (See SB13, 14, 62, 63). CN10 pin 37
PD6
TXD: PA2 CN9 pin 2(See SB13, 14, 62, 63). CN10 pin 35
PD5
UART2 is the default in all of these configurations.
TTL to RS-232 converter connection:
Nucleo CN9 STM32F4x1RE
----------- ------------
Pin 1 PA3 USART2_RX *Warning you make need to reverse RX/TX on
Pin 2 PA2 USART2_TX some RS-232 converters
Solder Bridges. This configuration requires:
- SB62 and SB63 Closed: PA2 and PA3 on STM32 MCU are connected to D1 and D0
(pin 7 and pin 8) on Arduino connector CN9 and ST Morpho connector CN10
as USART signals. Thus SB13 and SB14 should be OFF.
- SB13 and SB14 Open: PA2 and PA3 on STM32F103C8T6 (ST-LINK MCU) are
disconnected to PA3 and PA2 on STM32 MCU.
To configure USART2 as the console:
CONFIG_STM32_USART2=y
CONFIG_USART2_ISUART=y
CONFIG_USART2_SERIAL_CONSOLE=y
CONFIG_USART2_RXBUFSIZE=256
CONFIG_USART2_TXBUFSIZE=256
CONFIG_USART2_BAUD=115200
CONFIG_USART2_BITS=8
CONFIG_USART2_PARITY=0
CONFIG_USART2_2STOP=0
USART6
------
Pins and Connectors:
RXD: PC7 CN5 pin2, CN10 pin 19
PA12 CN10, pin 12
TXD: PC6 CN10, pin 4
PA11 CN10, pin 14
To configure USART6 as the console:
CONFIG_STM32_USART6=y
CONFIG_USART6_ISUART=y
CONFIG_USART6_SERIAL_CONSOLE=y
CONFIG_USART6_RXBUFSIZE=256
CONFIG_USART6_TXBUFSIZE=256
CONFIG_USART6_BAUD=115200
CONFIG_USART6_BITS=8
CONFIG_USART6_PARITY=0
CONFIG_USART6_2STOP=0
Virtual COM Port
----------------
Yet another option is to use UART2 and the USB virtual COM port. This
option may be more convenient for long term development, but is painful
to use during board bring-up.
Solder Bridges. This configuration requires:
- SB62 and SB63 Open: PA2 and PA3 on STM32 MCU are disconnected to D1
and D0 (pin 7 and pin 8) on Arduino connector CN9 and ST Morpho
connector CN10.
- SB13 and SB14 Closed: PA2 and PA3 on STM32F103C8T6 (ST-LINK MCU) are
connected to PA3 and PA2 on STM32 MCU to have USART communication
between them. Thus SB61, SB62 and SB63 should be OFF.
Configuring USART2 is the same as given above.
Question: What BAUD should be configure to interface with the Virtual
COM port? 115200 8N1?
Default
-------
As shipped, SB62 and SB63 are open and SB13 and SB14 closed, so the
virtual COM port is enabled.
Shields
=======
RS-232 from Cutedigi.com
------------------------
Supports a single RS-232 connected via
Nucleo CN9 STM32F4x1RE Cutedigi
----------- ------------ --------
Pin 1 PA3 USART2_RX RXD
Pin 2 PA2 USART2_TX TXD
Support for this shield is enabled by selecting USART2 and configuring
SB13, 14, 62, and 63 as described above under "Serial Consoles"
Itead Joystick Shield
---------------------
See http://imall.iteadstudio.com/im120417014.html for more information
about this joystick.
Itead Joystick Connection:
--------- ----------------- ---------------------------------
ARDUINO ITEAD NUCLEO-F4x1
PIN NAME SIGNAL SIGNAL
--------- ----------------- ---------------------------------
D3 Button E Output PB3
D4 Button D Output PB5
D5 Button C Output PB4
D6 Button B Output PB10
D7 Button A Output PA8
D8 Button F Output PA9
D9 Button G Output PC7
A0 Joystick Y Output PA0 ADC1_0
A1 Joystick X Output PA1 ADC1_1
--------- ----------------- ---------------------------------
All buttons are pulled on the shield. A sensed low value indicates
when the button is pressed.
NOTE: Button F cannot be used with the default USART1 configuration
because PA9 is configured for USART1_RX by default. Use select
different USART1 pins in the board.h file or select a different
USART or select CONFIG_NUCLEO_F401RE_AJOY_MINBUTTONS which will
eliminate all but buttons A, B, and C.
Itead Joystick Signal interpretation:
--------- ----------------------- ---------------------------
BUTTON TYPE NUTTX ALIAS
--------- ----------------------- ---------------------------
Button A Large button A JUMP/BUTTON 3
Button B Large button B FIRE/BUTTON 2
Button C Joystick select button SELECT/BUTTON 1
Button D Tiny Button D BUTTON 6
Button E Tiny Button E BUTTON 7
Button F Large Button F BUTTON 4
Button G Large Button G BUTTON 5
--------- ----------------------- ---------------------------
Itead Joystick configuration settings:
System Type -> STM32 Peripheral Support
CONFIG_STM32_ADC1=y : Enable ADC1 driver support
Drivers
CONFIG_ANALOG=y : Should be automatically selected
CONFIG_ADC=y : Should be automatically selected
CONFIG_INPUT=y : Select input device support
CONFIG_AJOYSTICK=y : Select analog joystick support
There is nothing in the configuration that currently uses the joystick.
For testing, you can add the following configuration options to enable the
analog joystick example at apps/examples/ajoystick:
CONFIG_NSH_ARCHINIT=y
CONFIG_EXAMPLES_AJOYSTICK=y
CONFIG_EXAMPLES_AJOYSTICK_DEVNAME="/dev/ajoy0"
CONFIG_EXAMPLES_AJOYSTICK_SIGNO=13
STATUS:
2014-12-04:
- Without ADC DMA support, it is not possible to sample both X and Y
with a single ADC. Right now, only one axis is being converted.
- There is conflicts with some of the Arduino data pins and the
default USART1 configuration. I am currently running with USART1
but with CONFIG_NUCLEO_F401RE_AJOY_MINBUTTONS to eliminate the
conflict.
- Current showstopper: I appear to be getting infinite interrupts as
soon as joystick button interrupts are enabled.
Configurations
==============
f401-nsh:
---------
Configures the NuttShell (nsh) located at apps/examples/nsh for the
Nucleo-F401RE board. The Configuration enables the serial interfaces
on UART2. Support for builtin applications is enabled, but in the base
configuration no builtin applications are selected (see NOTES below).
NOTES:
1. This configuration uses the mconf-based configuration tool. To
change this configuration using that tool, you should:
a. Build and install the kconfig-mconf tool. See nuttx/README.txt
see additional README.txt files in the NuttX tools repository.
b. Execute 'make menuconfig' in nuttx/ in order to start the
reconfiguration process.
2. By default, this configuration uses the CodeSourcery toolchain
for Linux. That can easily be reconfigured, of course.
CONFIG_HOST_LINUX=y : Builds under Linux
CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery for Linux
3. Although the default console is USART2 (which would correspond to
the Virtual COM port) I have done all testing with the console
device configured for USART1 (see instruction above under "Serial
Consoles). I have been using a TTL-to-RS-232 converter connected
as shown below:
Nucleo CN10 STM32F4x1RE
----------- ------------
Pin 21 PA9 USART1_RX *Warning you make need to reverse RX/TX on
Pin 33 PA10 USART1_TX some RS-232 converters
Pin 20 GND
Pin 8 U5V
f411-nsh
--------
This configuration is the same as the f401-nsh configuration, except
that it is configured to support the Nucleo-F411RE.

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/************************************************************************************
* configs/stm32l476vg-disco/include/board.h
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Author: dev@ziggurat29.com
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
#ifndef __CONFIGS_STM32L476VG_DISCO_INCLUDE_BOARD_H
#define __CONFIGS_STM32L476VG_DISCO_INCLUDE_BOARD_H
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#ifndef __ASSEMBLY__
# include <stdint.h>
#endif
#include <stm32l4.h>
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* Clocking *************************************************************************/
#include <arch/board/stm32l476vg-disco-clocking.h>
/* DMA Channel/Stream Selections ****************************************************/
/* Stream selections are arbitrary for now but might become important in the future
* is we set aside more DMA channels/streams.
*/
/* Values defined in arch/arm/src/stm32l4/chip/stm32l4x6xx_dma.h */
/*XXX are these used on disco? */
#if 0
#define DMACHAN_SDMMC DMACHAN_SDMMC_1 /* 2 choices * /
#define DMACHAN_SPI1_RX DMACHAN_SPI1_RX_1 /* 2 choices * /
#define DMACHAN_SPI1_TX DMACHAN_SPI1_TX_1 /* 2 choices * /
/* UART RX DMA configurations */
#define DMACHAN_USART1_RX DMACHAN_USART1_RX_2
#endif
/* Alternate function pin selections ************************************************/
/* USART1:
* RXD: PB7
* TXD: PA6
*
* these pins are shared with the I2C1, which is used for some onboard
* devices, so I am disabling USART1, however I'm leaving the declarations
* here for documentation for anyone who might want to use it instead of
* those onboard devices.
*/
#if 0
#define GPIO_USART1_RX GPIO_USART1_RX_2 / * PB7 * /
#define GPIO_USART1_TX GPIO_USART1_TX_2 / * PB6 * /
#endif
/* USART2: Connected to STLink Debug via PD5, PD6
* RXD: PD6
* TXD: PD5
*/
#define GPIO_USART2_RX GPIO_USART2_RX_2 /* PD6 */
#define GPIO_USART2_TX GPIO_USART2_TX_2 /* PD5 */
/* I2C
*
* The optional _GPIO configurations allow the I2C driver to manually
* reset the bus to clear stuck slaves. They match the pin configuration,
* but are normally-high GPIOs.
*
* I2C1 connects to devices on the Discovery board, including the
* CS43L22 (addr 0x94) stereo DAC and amplifier. It shares the
* pins with USART1, so that port is disabled so we can access the
* onboard device.
*
*/
#define GPIO_I2C1_SCL GPIO_I2C1_SCL_1
#define GPIO_I2C1_SDA GPIO_I2C1_SDA_1
#define GPIO_I2C1_SCL_GPIO \
(GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN6)
#define GPIO_I2C1_SDA_GPIO \
(GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN7)
/*
* XXX Is I2C2 used on Disco?
*/
#if 0
#define GPIO_I2C2_SCL GPIO_I2C2_SCL_1
#define GPIO_I2C2_SDA GPIO_I2C2_SDA_1
#define GPIO_I2C2_SCL_GPIO \
(GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN10)
#define GPIO_I2C2_SDA_GPIO \
(GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN11)
#endif
/* SPI
*/
/*
* XXX is SPI1 used on Disco?
*/
#if 0
#define GPIO_SPI1_MISO GPIO_SPI1_MISO_1
#define GPIO_SPI1_MOSI GPIO_SPI1_MOSI_1
#define GPIO_SPI1_SCK GPIO_SPI1_SCK_1
#endif
/*
* SPI2 is used for several peripherals on the Discovery board, including
* L3GD20 - 3 axis Gyroscope
* LSM303CTR - eCompass, comprising an accelerometer and magnetometer
*/
#define GPIO_SPI2_MISO GPIO_SPI2_MISO_3
#define GPIO_SPI2_MOSI GPIO_SPI2_MOSI_3
#define GPIO_SPI2_SCK GPIO_SPI2_SCK_3
/*
* PD7; gyroscope CS
*/
#define GPIO_SPI_CS_GYRO_OFF \
(GPIO_INPUT | GPIO_PULLDOWN | GPIO_SPEED_2MHz | \
GPIO_PORTD | GPIO_PIN7)
#define GPIO_SPI_CS_GYRO \
(GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_2MHz | \
GPIO_OUTPUT_SET | GPIO_PORTD | GPIO_PIN7)
/*
* PE0; accelerometer CS
*/
#define GPIO_SPI_CS_ACCEL_OFF \
(GPIO_INPUT | GPIO_PULLDOWN | GPIO_SPEED_2MHz | \
GPIO_PORTE | GPIO_PIN0)
#define GPIO_SPI_CS_ACCEL \
(GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_2MHz | \
GPIO_OUTPUT_SET | GPIO_PORTE | GPIO_PIN0)
/*
* PC0; magnetometer CS
*/
#define GPIO_SPI_CS_MAGNETO_OFF \
(GPIO_INPUT | GPIO_PULLDOWN | GPIO_SPEED_2MHz | \
GPIO_PORTC | GPIO_PIN0)
#define GPIO_SPI_CS_MAGNETO \
(GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_2MHz | \
GPIO_OUTPUT_SET | GPIO_PORTC | GPIO_PIN0)
/*
XXX these will need to be set up when these get implemented:
PD2 gyro INT1
PB8 gyro INT2/DRDY
PE1 accel INT
PC2 magneto DRDY
PC1 magneto INT
*/
/* LEDs
*
* The STM32L476VG-DISCO board provides two user LEDs, LD4 (red) and LD5 (green).
*
* PB2 is LD4 (red)
* PE8 is LD5 (green)
* - When the I/O is HIGH value, the LED is on.
* - When the I/O is LOW, the LED is off.
*/
/* LED index values for use with board_userled() */
#define BOARD_LED_RED 0
#define BOARD_LED_GRN 1
#define BOARD_NLEDS 2
/* LED bits for use with board_userled_all() */
#define BOARD_LED_RED_BIT (1 << BOARD_LED_RED)
#define BOARD_LED_GRN_BIT (1 << BOARD_LED_GRN)
/* These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is
* defined. In that case, the usage by the board port is defined in
* include/board.h and src/stm32_autoleds.c. The LEDs are used to encode
* OS-related events as follows when the red and green LEDs are available:
*
* SYMBOL Meaning BOARD_LED_GRN BOARD_LED_RED
* ------------------- ----------------------- ----------- ------------
* LED_STARTED NuttX has been started
* LED_HEAPALLOCATE Heap has been allocated
* LED_IRQSENABLED Interrupts enabled
* LED_STACKCREATED Idle stack created
* LED_INIRQ In an interrupt
* LED_SIGNAL In a signal handler
* LED_ASSERTION An assertion failed
* LED_PANIC The system has crashed Blinking
* LED_IDLE MCU is is sleep mode ON
*
* Thus if BOARD_LED_GRN, NuttX has successfully booted and is, apparently, running
* normally. If BOARD_LED_RED is flashing at approximately 2Hz, then a fatal error
* has been detected and the system has halted.
*/
#define LED_STARTED 0
#define LED_HEAPALLOCATE 1
#define LED_IRQSENABLED 2
#define LED_STACKCREATED 3
#define LED_INIRQ 4
#define LED_SIGNAL 5
#define LED_ASSERTION 6
#define LED_PANIC 7
#define LED_IDLE 8
/* Buttons
*
* There is a 4 way d-pad 'joystick' with center button
* connected to PA0,1,5,2,3
* C L D R U
*/
#define BUTTON_CENTER 0
#define BUTTON_LEFT 1
#define BUTTON_DOWN 2
#define BUTTON_RIGHT 3
#define BUTTON_UP 4
#define NUM_BUTTONS 5
#define BUTTON_CENTER_BIT (1 << BUTTON_CENTER)
#define BUTTON_LEFT_BIT (1 << BUTTON_LEFT)
#define BUTTON_DOWN_BIT (1 << BUTTON_DOWN)
#define BUTTON_TIGHT_BIT (1 << BUTTON_RIGHT)
#define BUTTON_UP_BIT (1 << BUTTON_UP)
/************************************************************************************
* Public Data
************************************************************************************/
#ifndef __ASSEMBLY__
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/************************************************************************************
* Public Function Prototypes
************************************************************************************/
/************************************************************************************
* Name: stm32l4_boardinitialize
*
* Description:
* All STM32L4 architectures must provide the following entry point. This entry point
* is called early in the initialization -- after all memory has been configured
* and mapped but before any devices have been initialized.
*
************************************************************************************/
void stm32l4_boardinitialize(void);
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __CONFIGS_STM32L476VG_DISCO_INCLUDE_BOARD_H */

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/************************************************************************************
* configs/stm32l476vg-disco/include/stm32l476vg-disco-clocking.h
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Author: dev@ziggurat29.com
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
#ifndef __CONFIGS_STM32L476VG_DISCO_INCLUDE_STM32L476VG_DISCO_CLOCKING_H
#define __CONFIGS_STM32L476VG_DISCO_INCLUDE_STM32L476VG_DISCO_CLOCKING_H
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#ifndef __ASSEMBLY__
# include <stdint.h>
#endif
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* Clocking *************************************************************************/
/* The stm32l476vg-disco supports both HSE and LSE crystals (X2 and X3). However, as
* shipped, the HSE X2 crystal is not populated. Therefore the stm32l476vg-disco
* will need to run off the 16MHz HSI clock, or the 32khz-synced MSI.
*/
/* HSI - 16 MHz RC factory-trimmed
* LSI - 32 KHz RC
* MSI - variable up to 48 MHz, synchronized to LSE
* HSE - not installed
* LSE - 32.768 kHz installed
*/
#define STM32L4_HSI_FREQUENCY 16000000ul
#define STM32L4_LSI_FREQUENCY 32000
#define STM32L4_LSE_FREQUENCY 32768
/* XXX review the STM32L4_BOARD_USEHSI usage, it has too much influence in
stm32l4x6xx_rcc.c. I suspect it is fine for it to turn on and off that
ocillator, but really that's all it should do (e.g. it also controls
input of teh PLLs. Also, it should be fine/desireable to support things
like turning on both HSI and MSI, because they plausibly can both be
used at the same time; currently those choices HSE/HSI16/MSI are
mutually exclusive.
*/
#define STM32L4_BOARD_USEHSI 1
/* prescaler common to all PLL inputs; will be 1 (XXX source is implicitly
as per comment above HSI) */
#define STM32L4_PLLCFG_PLLM RCC_PLLCFG_PLLM(1)
/* 'main' PLL config; we use this to generate our system clock via the R
output. We set it up as
16 MHz / 1 * 10 / 2 = 80 MHz
XXX NOTE: currently the main PLL is implicitly turned on and is implicitly
the system clock; this should be configurable since not all applications may
want things done this way.
*/
#define STM32L4_PLLCFG_PLLN RCC_PLLCFG_PLLN(10)
#define STM32L4_PLLCFG_PLLP 0
#undef STM32L4_PLLCFG_PLLP_ENABLED
#define STM32L4_PLLCFG_PLLQ RCC_PLLCFG_PLLQ_2
#define STM32L4_PLLCFG_PLLQ_ENABLED
#define STM32L4_PLLCFG_PLLR RCC_PLLCFG_PLLR_2
#define STM32L4_PLLCFG_PLLR_ENABLED
/* 'SAIPLL1' is used to generate the 48 MHz clock, since we can't
do that with the main PLL's N value. We set N = 13, and enable
the Q output (ultimately for CLK48) with /4. So,
16 MHz / 1 * 12 / 4 = 48 MHz
XXX NOTE: currently the SAIPLL /must/ be explicitly selected in the
menuconfig, or else all this is a moot point, and the various 48 MHz
peripherals will not work (RNG at present). I would suggest removing
that option from Kconfig altogether, and simply making it an option
that is selected via a #define here, like all these other params.
*/
#define STM32L4_PLLSAI1CFG_PLLN RCC_PLLSAI1CFG_PLLN(12)
#define STM32L4_PLLSAI1CFG_PLLP 0
#undef STM32L4_PLLSAI1CFG_PLLP_ENABLED
#define STM32L4_PLLSAI1CFG_PLLQ RCC_PLLSAI1CFG_PLLQ_4
#define STM32L4_PLLSAI1CFG_PLLQ_ENABLED
#define STM32L4_PLLSAI1CFG_PLLR 0
#undef STM32L4_PLLSAI1CFG_PLLR_ENABLED
/* 'SAIPLL2' is not used in this application */
#define STM32L4_PLLSAI2CFG_PLLN RCC_PLLSAI2CFG_PLLN(8)
#define STM32L4_PLLSAI2CFG_PLLP 0
#undef STM32L4_PLLSAI2CFG_PLLP_ENABLED
#define STM32L4_PLLSAI2CFG_PLLR 0
#undef STM32L4_PLLSAI2CFG_PLLR_ENABLED
#define STM32L4_SYSCLK_FREQUENCY 80000000ul
/* CLK48 will come from PLLSAI1 (implicitly Q) */
#define STM32L4_USE_CLK48
#define STM32L4_CLK48_SEL RCC_CCIPR_CLK48SEL_PLLSAI1
/* AHB clock (HCLK) is SYSCLK (80MHz) */
#define STM32L4_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */
#define STM32L4_HCLK_FREQUENCY STM32L4_SYSCLK_FREQUENCY
#define STM32L4_BOARD_HCLK STM32L4_HCLK_FREQUENCY /* Same as above, to satisfy compiler */
/* APB1 clock (PCLK1) is HCLK/1 (80MHz) */
#define STM32L4_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLK /* PCLK1 = HCLK / 1 */
#define STM32L4_PCLK1_FREQUENCY (STM32L4_HCLK_FREQUENCY/1)
/* Timers driven from APB1 will be twice PCLK1 */
/* REVISIT : this can be configured */
#define STM32L4_APB1_TIM2_CLKIN (2*STM32L4_PCLK1_FREQUENCY)
#define STM32L4_APB1_TIM3_CLKIN (2*STM32L4_PCLK1_FREQUENCY)
#define STM32L4_APB1_TIM4_CLKIN (2*STM32L4_PCLK1_FREQUENCY)
#define STM32L4_APB1_TIM5_CLKIN (2*STM32L4_PCLK1_FREQUENCY)
#define STM32L4_APB1_TIM6_CLKIN (2*STM32L4_PCLK1_FREQUENCY)
#define STM32L4_APB1_TIM7_CLKIN (2*STM32L4_PCLK1_FREQUENCY)
/* APB2 clock (PCLK2) is HCLK (80MHz) */
#define STM32L4_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK /* PCLK2 = HCLK / 1 */
#define STM32L4_PCLK2_FREQUENCY (STM32L4_HCLK_FREQUENCY/1)
/* Timers driven from APB2 will be twice PCLK2 */
/* REVISIT : this can be configured */
#define STM32L4_APB2_TIM1_CLKIN (2*STM32L4_PCLK2_FREQUENCY)
#define STM32L4_APB2_TIM8_CLKIN (2*STM32L4_PCLK2_FREQUENCY)
/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx
* otherwise frequency is 2xAPBx.
* Note: TIM1,8 are on APB2, others on APB1
*/
/* REVISIT : this can be configured */
/************************************************************************************
* Public Data
************************************************************************************/
#ifndef __ASSEMBLY__
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/************************************************************************************
* Public Function Prototypes
************************************************************************************/
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __CONFIGS_STM32L476VG_DISCO_INCLUDE_STM32L476VG_DISCO_CLOCKING_H */

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############################################################################
# configs/stm32l476vg-disco/nsh/Make.defs
#
# Copyright (C) 2014 Gregory Nutt. All rights reserved.
# Author: dev@ziggurat29.com
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in
# the documentation and/or other materials provided with the
# distribution.
# 3. Neither the name NuttX nor the names of its contributors may be
# used to endorse or promote products derived from this software
# without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
############################################################################
include ${TOPDIR}/.config
include ${TOPDIR}/tools/Config.mk
include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
LDSCRIPT = ld.script
ifeq ($(WINTOOL),y)
# Windows-native toolchains
DIRLINK = $(TOPDIR)/tools/copydir.sh
DIRUNLINK = $(TOPDIR)/tools/unlink.sh
MKDEP = $(TOPDIR)/tools/mknulldeps.sh
ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
else
# Linux/Cygwin-native toolchain
MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
endif
CC = $(CROSSDEV)gcc
CXX = $(CROSSDEV)g++
CPP = $(CROSSDEV)gcc -E
LD = $(CROSSDEV)ld
AR = $(ARCROSSDEV)ar rcs
NM = $(ARCROSSDEV)nm
OBJCOPY = $(CROSSDEV)objcopy
OBJDUMP = $(CROSSDEV)objdump
ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
ARCHOPTIMIZATION = -g
endif
ifneq ($(CONFIG_DEBUG_NOOPT),y)
ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
endif
ARCHCFLAGS = -fno-builtin
ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
ARCHWARNINGSXX = -Wall -Wshadow -Wundef
ARCHDEFINES =
ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
AFLAGS = $(CFLAGS) -D__ASSEMBLY__
NXFLATLDFLAGS1 = -r -d -warn-common
NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
LDNXFLATFLAGS = -e main -s 2048
ASMEXT = .S
OBJEXT = .o
LIBEXT = .a
EXEEXT =
ifneq ($(CROSSDEV),arm-nuttx-elf-)
LDFLAGS += -nostartfiles -nodefaultlibs
endif
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
LDFLAGS += -g
endif
HOSTCC = gcc
HOSTINCLUDES = -I.
HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
HOSTLDFLAGS =

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#
# Automatically generated file; DO NOT EDIT.
# Nuttx/ Configuration
#
#
# Build Setup
#
# CONFIG_EXPERIMENTAL is not set
# CONFIG_DEFAULT_SMALL is not set
CONFIG_HOST_LINUX=y
# CONFIG_HOST_OSX is not set
# CONFIG_HOST_WINDOWS is not set
# CONFIG_HOST_OTHER is not set
#
# Build Configuration
#
CONFIG_APPS_DIR="../apps"
CONFIG_BUILD_FLAT=y
# CONFIG_BUILD_2PASS is not set
#
# Binary Output Formats
#
# CONFIG_RRLOAD_BINARY is not set
CONFIG_INTELHEX_BINARY=y
# CONFIG_MOTOROLA_SREC is not set
CONFIG_RAW_BINARY=y
# CONFIG_UBOOT_UIMAGE is not set
#
# Customize Header Files
#
# CONFIG_ARCH_STDINT_H is not set
# CONFIG_ARCH_STDBOOL_H is not set
# CONFIG_ARCH_MATH_H is not set
# CONFIG_ARCH_FLOAT_H is not set
# CONFIG_ARCH_STDARG_H is not set
# CONFIG_ARCH_DEBUG_H is not set
#
# Debug Options
#
CONFIG_DEBUG=y
CONFIG_ARCH_HAVE_HEAPCHECK=y
CONFIG_DEBUG_VERBOSE=y
#
# Subsystem Debug Options
#
CONFIG_DEBUG_AUDIO=y
CONFIG_DEBUG_BINFMT=y
CONFIG_DEBUG_FS=y
CONFIG_DEBUG_GRAPHICS=y
CONFIG_DEBUG_LIB=y
# CONFIG_DEBUG_MM is not set
# CONFIG_DEBUG_SCHED is not set
#
# OS Function Debug Options
#
# CONFIG_DEBUG_HEAP is not set
# CONFIG_DEBUG_IRQ is not set
#
# Driver Debug Options
#
CONFIG_DEBUG_LEDS=y
CONFIG_DEBUG_ANALOG=y
CONFIG_DEBUG_GPIO=y
CONFIG_DEBUG_SPI=y
CONFIG_ARCH_HAVE_STACKCHECK=y
# CONFIG_STACK_COLORATION is not set
CONFIG_DEBUG_SYMBOLS=y
CONFIG_ARCH_HAVE_CUSTOMOPT=y
CONFIG_DEBUG_NOOPT=y
# CONFIG_DEBUG_CUSTOMOPT is not set
# CONFIG_DEBUG_FULLOPT is not set
#
# System Type
#
CONFIG_ARCH_ARM=y
# CONFIG_ARCH_AVR is not set
# CONFIG_ARCH_HC is not set
# CONFIG_ARCH_MIPS is not set
# CONFIG_ARCH_RGMP is not set
# CONFIG_ARCH_SH is not set
# CONFIG_ARCH_SIM is not set
# CONFIG_ARCH_X86 is not set
# CONFIG_ARCH_Z16 is not set
# CONFIG_ARCH_Z80 is not set
CONFIG_ARCH="arm"
#
# ARM Options
#
# CONFIG_ARCH_CHIP_A1X is not set
# CONFIG_ARCH_CHIP_C5471 is not set
# CONFIG_ARCH_CHIP_CALYPSO is not set
# CONFIG_ARCH_CHIP_DM320 is not set
# CONFIG_ARCH_CHIP_EFM32 is not set
# CONFIG_ARCH_CHIP_IMX is not set
# CONFIG_ARCH_CHIP_KINETIS is not set
# CONFIG_ARCH_CHIP_KL is not set
# CONFIG_ARCH_CHIP_LM is not set
# CONFIG_ARCH_CHIP_TIVA is not set
# CONFIG_ARCH_CHIP_LPC11XX is not set
# CONFIG_ARCH_CHIP_LPC17XX is not set
# CONFIG_ARCH_CHIP_LPC214X is not set
# CONFIG_ARCH_CHIP_LPC2378 is not set
# CONFIG_ARCH_CHIP_LPC31XX is not set
# CONFIG_ARCH_CHIP_LPC43XX is not set
# CONFIG_ARCH_CHIP_NUC1XX is not set
# CONFIG_ARCH_CHIP_SAMA5 is not set
# CONFIG_ARCH_CHIP_SAMD is not set
# CONFIG_ARCH_CHIP_SAML is not set
# CONFIG_ARCH_CHIP_SAM34 is not set
# CONFIG_ARCH_CHIP_SAMV7 is not set
# CONFIG_ARCH_CHIP_STM32 is not set
# CONFIG_ARCH_CHIP_STM32F7 is not set
CONFIG_ARCH_CHIP_STM32L4=y
# CONFIG_ARCH_CHIP_STR71X is not set
# CONFIG_ARCH_CHIP_TMS570 is not set
# CONFIG_ARCH_CHIP_MOXART is not set
# CONFIG_ARCH_ARM7TDMI is not set
# CONFIG_ARCH_ARM926EJS is not set
# CONFIG_ARCH_ARM920T is not set
# CONFIG_ARCH_CORTEXM0 is not set
# CONFIG_ARCH_CORTEXM3 is not set
CONFIG_ARCH_CORTEXM4=y
# CONFIG_ARCH_CORTEXM7 is not set
# CONFIG_ARCH_CORTEXA5 is not set
# CONFIG_ARCH_CORTEXA8 is not set
# CONFIG_ARCH_CORTEXR4 is not set
# CONFIG_ARCH_CORTEXR4F is not set
# CONFIG_ARCH_CORTEXR5 is not set
# CONFIG_ARCH_CORTEX5F is not set
# CONFIG_ARCH_CORTEXR7 is not set
# CONFIG_ARCH_CORTEXR7F is not set
CONFIG_ARCH_FAMILY="armv7-m"
CONFIG_ARCH_CHIP="stm32l4"
# CONFIG_ARMV7M_USEBASEPRI is not set
CONFIG_ARCH_HAVE_CMNVECTOR=y
CONFIG_ARMV7M_CMNVECTOR=y
# CONFIG_ARMV7M_LAZYFPU is not set
CONFIG_ARCH_HAVE_FPU=y
CONFIG_ARCH_HAVE_DPFPU=y
# CONFIG_ARCH_FPU is not set
CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARM_MPU is not set
# CONFIG_DEBUG_HARDFAULT is not set
#
# ARMV7M Configuration Options
#
# CONFIG_ARMV7M_HAVE_ICACHE is not set
# CONFIG_ARMV7M_HAVE_DCACHE is not set
CONFIG_ARMV7M_HAVE_ITCM=y
CONFIG_ARMV7M_HAVE_DTCM=y
# CONFIG_ARMV7M_ITCM is not set
# CONFIG_ARMV7M_DTCM is not set
# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y
CONFIG_ARMV7M_HAVE_STACKCHECK=y
# CONFIG_ARMV7M_STACKCHECK is not set
# CONFIG_ARMV7M_ITMSYSLOG is not set
# CONFIG_SERIAL_TERMIOS is not set
# CONFIG_USART2_RS485 is not set
# CONFIG_SERIAL_DISABLE_REORDERING is not set
#
# STM32L4 Configuration Options
#
CONFIG_ARCH_CHIP_STM32L476RG=y
# CONFIG_ARCH_CHIP_STM32L476RE is not set
# CONFIG_ARCH_CHIP_STM32L486 is not set
CONFIG_STM32L4_STM32L476XX=y
# CONFIG_STM32L4_STM32L486XX is not set
# CONFIG_STM32L4_FLASH_256KB is not set
# CONFIG_STM32L4_FLASH_512KB is not set
CONFIG_STM32L4_FLASH_1024KB=y
#
# STM32L4 Peripheral Support
#
# CONFIG_STM32L4_HAVE_LTDC is not set
# CONFIG_STM32L4_ADC is not set
# CONFIG_STM32L4_CAN is not set
# CONFIG_STM32L4_DAC is not set
# CONFIG_STM32L4_DMA is not set
# CONFIG_STM32L4_I2C is not set
CONFIG_STM32L4_SAI1PLL=y
# CONFIG_STM32L4_SPI is not set
CONFIG_STM32L4_USART=y
# CONFIG_STM32L4_LPTIM is not set
#
# AHB1 Peripherals
#
# CONFIG_STM32L4_DMA1 is not set
# CONFIG_STM32L4_DMA2 is not set
# CONFIG_STM32L4_CRC is not set
# CONFIG_STM32L4_TSC is not set
#
# AHB2 Peripherals
#
# CONFIG_STM32L4_OTGFS is not set
# CONFIG_STM32L4_ADC1 is not set
# CONFIG_STM32L4_ADC2 is not set
# CONFIG_STM32L4_ADC3 is not set
# CONFIG_STM32L4_AES is not set
CONFIG_STM32L4_RNG=y
#
# AHB3 Peripherals
#
# CONFIG_STM32L4_FMC is not set
# CONFIG_STM32L4_QUADSPI is not set
#
# APB1 Peripherals
#
# CONFIG_STM32L4_TIM2 is not set
# CONFIG_STM32L4_TIM3 is not set
# CONFIG_STM32L4_TIM4 is not set
# CONFIG_STM32L4_TIM5 is not set
# CONFIG_STM32L4_TIM6 is not set
# CONFIG_STM32L4_TIM7 is not set
# CONFIG_STM32L4_LCD is not set
# CONFIG_STM32L4_SPI2 is not set
# CONFIG_STM32L4_SPI3 is not set
# CONFIG_STM32L4_USART1 is not set
CONFIG_STM32L4_USART2=y
# CONFIG_STM32L4_USART3 is not set
# CONFIG_STM32L4_UART4 is not set
# CONFIG_STM32L4_UART5 is not set
# CONFIG_STM32L4_I2C1 is not set
# CONFIG_STM32L4_I2C2 is not set
# CONFIG_STM32L4_I2C3 is not set
# CONFIG_STM32L4_CAN1 is not set
# CONFIG_STM32L4_DAC1 is not set
# CONFIG_STM32L4_DAC2 is not set
# CONFIG_STM32L4_OPAMP is not set
# CONFIG_STM32L4_LPTIM1 is not set
# CONFIG_STM32L4_LPUART1 is not set
# CONFIG_STM32L4_SWPMI is not set
# CONFIG_STM32L4_LPTIM2 is not set
#
# APB2 Peripherals
#
CONFIG_STM32L4_SYSCFG=y
CONFIG_STM32L4_FIREWALL=y
# CONFIG_STM32L4_SDMMC1 is not set
# CONFIG_STM32L4_TIM1 is not set
# CONFIG_STM32L4_SPI1 is not set
# CONFIG_STM32L4_TIM8 is not set
# CONFIG_STM32L4_TIM15 is not set
# CONFIG_STM32L4_TIM16 is not set
# CONFIG_STM32L4_TIM17 is not set
# CONFIG_STM32L4_SAI1 is not set
# CONFIG_STM32L4_SAI2 is not set
# CONFIG_STM32L4_DFSDM is not set
#
# Other Peripherals
#
# CONFIG_STM32L4_BKPSRAM is not set
# CONFIG_STM32L4_IWDG is not set
# CONFIG_STM32L4_WWDG is not set
CONFIG_STM32L4_FLASH_PREFETCH=y
CONFIG_STM32L4_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
# CONFIG_STM32L4_CUSTOM_CLOCKCONFIG is not set
# CONFIG_STM32L4_SAI1PLL is not set
# CONFIG_STM32L4_SAI2PLL is not set
#
# U[S]ART Configuration
#
# CONFIG_STM32L4_FLOWCONTROL_BROKEN is not set
#
# Architecture Options
#
# CONFIG_ARCH_NOINTC is not set
# CONFIG_ARCH_VECNOTIRQ is not set
# CONFIG_ARCH_DMA is not set
CONFIG_ARCH_HAVE_IRQPRIO=y
# CONFIG_ARCH_L2CACHE is not set
# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
# CONFIG_ARCH_HAVE_ADDRENV is not set
# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
CONFIG_ARCH_HAVE_VFORK=y
# CONFIG_ARCH_HAVE_MMU is not set
CONFIG_ARCH_HAVE_MPU=y
# CONFIG_ARCH_NAND_HWECC is not set
# CONFIG_ARCH_HAVE_EXTCLK is not set
# CONFIG_ARCH_HAVE_POWEROFF is not set
CONFIG_ARCH_HAVE_RESET=y
# CONFIG_ARCH_USE_MPU is not set
# CONFIG_ARCH_IRQPRIO is not set
CONFIG_ARCH_STACKDUMP=y
# CONFIG_ENDIAN_BIG is not set
# CONFIG_ARCH_IDLE_CUSTOM is not set
# CONFIG_ARCH_HAVE_RAMFUNCS is not set
CONFIG_ARCH_HAVE_RAMVECTORS=y
# CONFIG_ARCH_RAMVECTORS is not set
#
# Board Settings
#
CONFIG_BOARD_LOOPSPERMSEC=8499
# CONFIG_ARCH_CALIBRATION is not set
#
# Interrupt options
#
CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
CONFIG_ARCH_INTERRUPTSTACK=2048
CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y
# CONFIG_ARCH_HIPRI_INTERRUPT is not set
#
# Boot options
#
# CONFIG_BOOT_RUNFROMEXTSRAM is not set
CONFIG_BOOT_RUNFROMFLASH=y
# CONFIG_BOOT_RUNFROMISRAM is not set
# CONFIG_BOOT_RUNFROMSDRAM is not set
# CONFIG_BOOT_COPYTORAM is not set
#
# Boot Memory Configuration
#
CONFIG_RAM_START=0x20000000
CONFIG_RAM_SIZE=98304
# CONFIG_ARCH_HAVE_SDRAM is not set
#
# Board Selection
#
CONFIG_ARCH_BOARD_STM32L476VG_DISCO=y
# CONFIG_ARCH_BOARD_CUSTOM is not set
CONFIG_ARCH_BOARD="stm32l476vg-disco"
#
# Common Board Options
#
CONFIG_ARCH_HAVE_LEDS=y
CONFIG_ARCH_LEDS=y
CONFIG_ARCH_HAVE_BUTTONS=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_HAVE_IRQBUTTONS=y
CONFIG_PM_ALARM_SEC=15
CONFIG_PM_ALARM_NSEC=0
# CONFIG_PM_SLEEP_WAKEUP is not set
CONFIG_PM_SLEEP_WAKEUP_SEC=10
CONFIG_PM_SLEEP_WAKEUP_NSEC=0
CONFIG_PM_BUTTONS=y
CONFIG_PM_BUTTON_ACTIVITY=10
# CONFIG_LIB_BOARDCTL is not set
#
# Board-Specific Options
#
# CONFIG_LIB_BOARDCTL is not set
# CONFIG_ARCH_BOARD_STM32L4_CUSTOM_CLOCKCONFIG is not set (and I don't know how you can anyway)
#
# RTOS Features
#
CONFIG_DISABLE_OS_API=y
# CONFIG_DISABLE_POSIX_TIMERS is not set
# CONFIG_DISABLE_PTHREAD is not set
# CONFIG_DISABLE_SIGNALS is not set
# CONFIG_DISABLE_MQUEUE is not set
# CONFIG_DISABLE_ENVIRON is not set
#
# Clocks and Timers
#
CONFIG_USEC_PER_TICK=10000
# CONFIG_SYSTEM_TIME64 is not set
# CONFIG_CLOCK_MONOTONIC is not set
# CONFIG_JULIAN_TIME is not set
CONFIG_START_YEAR=2014
CONFIG_START_MONTH=5
CONFIG_START_DAY=5
CONFIG_MAX_WDOGPARMS=2
CONFIG_PREALLOC_WDOGS=8
CONFIG_WDOG_INTRESERVE=1
CONFIG_PREALLOC_TIMERS=4
#
# Tasks and Scheduling
#
# CONFIG_INIT_NONE is not set
CONFIG_INIT_ENTRYPOINT=y
# CONFIG_INIT_FILEPATH is not set
CONFIG_USER_ENTRYPOINT="nsh_main"
CONFIG_RR_INTERVAL=200
# CONFIG_SCHED_SPORADIC is not set
CONFIG_TASK_NAME_SIZE=0
CONFIG_MAX_TASKS=16
# CONFIG_SCHED_HAVE_PARENT is not set
CONFIG_SCHED_WAITPID=y
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
CONFIG_NPTHREAD_KEYS=4
#
# Performance Monitoring
#
# CONFIG_SCHED_CPULOAD is not set
# CONFIG_SCHED_INSTRUMENTATION is not set
#
# Files and I/O
#
CONFIG_DEV_CONSOLE=y
# CONFIG_FDCLONE_DISABLE is not set
# CONFIG_FDCLONE_STDIO is not set
CONFIG_SDCLONE_DISABLE=y
CONFIG_NFILE_DESCRIPTORS=8
CONFIG_NFILE_STREAMS=8
CONFIG_NAME_MAX=32
# CONFIG_PRIORITY_INHERITANCE is not set
#
# RTOS hooks
#
# CONFIG_BOARD_INITIALIZE is not set
# CONFIG_SCHED_STARTHOOK is not set
# CONFIG_SCHED_ATEXIT is not set
# CONFIG_SCHED_ONEXIT is not set
#
# Signal Numbers
#
CONFIG_SIG_SIGUSR1=1
CONFIG_SIG_SIGUSR2=2
CONFIG_SIG_SIGALARM=3
CONFIG_SIG_SIGCONDTIMEDOUT=16
#
# POSIX Message Queue Options
#
CONFIG_PREALLOC_MQ_MSGS=4
CONFIG_MQ_MAXMSGSIZE=32
# CONFIG_MODULE is not set
#
# Work queue support
#
# CONFIG_SCHED_WORKQUEUE is not set
# CONFIG_SCHED_HPWORK is not set
# CONFIG_SCHED_LPWORK is not set
#
# Stack and heap information
#
CONFIG_IDLETHREAD_STACKSIZE=1024
CONFIG_USERMAIN_STACKSIZE=2048
CONFIG_PTHREAD_STACK_MIN=256
CONFIG_PTHREAD_STACK_DEFAULT=2048
# CONFIG_LIB_SYSCALL is not set
#
# Device Drivers
#
CONFIG_DISABLE_POLL=y
CONFIG_DEV_NULL=y
CONFIG_DEV_ZERO=y
# CONFIG_DEV_LOOP is not set
#
# Buffering
#
# CONFIG_DRVR_WRITEBUFFER is not set
# CONFIG_DRVR_READAHEAD is not set
# CONFIG_RAMDISK is not set
# CONFIG_CAN is not set
# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
# CONFIG_PWM is not set
CONFIG_ARCH_HAVE_I2CRESET=y
# CONFIG_I2C is not set
CONFIG_SPI=y
# CONFIG_SPI_SLAVE is not set
CONFIG_SPI_EXCHANGE=y
# CONFIG_SPI_CMDDATA is not set
# CONFIG_SPI_CALLBACK is not set
# CONFIG_SPI_BITBANG is not set
# CONFIG_SPI_HWFEATURES is not set
# CONFIG_SPI_CRCGENERATION is not set
# CONFIG_I2S is not set
#
# Timer Driver Support
#
# CONFIG_TIMER is not set
# CONFIG_RTC is not set
# CONFIG_WATCHDOG is not set
# CONFIG_ANALOG is not set
# CONFIG_AUDIO_DEVICES is not set
# CONFIG_VIDEO_DEVICES is not set
# CONFIG_BCH is not set
# CONFIG_INPUT is not set
# CONFIG_IOEXPANDER is not set
# CONFIG_LCD is not set
#
# LED Support
#
# CONFIG_USERLED is not set
# CONFIG_PCA9635PW is not set
# CONFIG_MMCSD is not set
# CONFIG_MODEM is not set
# CONFIG_MTD is not set
# CONFIG_EEPROM is not set
# CONFIG_PIPES is not set
# CONFIG_PM is not set
# CONFIG_POWER is not set
# CONFIG_SENSORS is not set
# CONFIG_SERCOMM_CONSOLE is not set
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
# CONFIG_ARCH_HAVE_UART is not set
# CONFIG_ARCH_HAVE_UART0 is not set
# CONFIG_ARCH_HAVE_UART1 is not set
# CONFIG_ARCH_HAVE_UART2 is not set
# CONFIG_ARCH_HAVE_UART3 is not set
# CONFIG_ARCH_HAVE_UART4 is not set
# CONFIG_ARCH_HAVE_UART5 is not set
# CONFIG_ARCH_HAVE_UART6 is not set
# CONFIG_ARCH_HAVE_UART7 is not set
# CONFIG_ARCH_HAVE_UART8 is not set
# CONFIG_ARCH_HAVE_SCI0 is not set
# CONFIG_ARCH_HAVE_SCI1 is not set
# CONFIG_ARCH_HAVE_USART0 is not set
# CONFIG_ARCH_HAVE_USART1 is not set
CONFIG_ARCH_HAVE_USART2=y
# CONFIG_ARCH_HAVE_USART3 is not set
# CONFIG_ARCH_HAVE_USART4 is not set
# CONFIG_ARCH_HAVE_USART5 is not set
# CONFIG_ARCH_HAVE_USART6 is not set
# CONFIG_ARCH_HAVE_USART7 is not set
# CONFIG_ARCH_HAVE_USART8 is not set
# CONFIG_ARCH_HAVE_OTHER_UART is not set
#
# USART Configuration
#
CONFIG_USART2_ISUART=y
CONFIG_MCU_SERIAL=y
CONFIG_STANDARD_SERIAL=y
# CONFIG_SERIAL_IFLOWCONTROL is not set
# CONFIG_SERIAL_OFLOWCONTROL is not set
# CONFIG_SERIAL_DMA is not set
# CONFIG_SERIAL_TIOCSERGSTRUCT is not set
CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
CONFIG_USART2_SERIAL_CONSOLE=y
# CONFIG_OTHER_SERIAL_CONSOLE is not set
# CONFIG_NO_SERIAL_CONSOLE is not set
#
# USART2 Configuration
#
CONFIG_USART2_RXBUFSIZE=256
CONFIG_USART2_TXBUFSIZE=256
CONFIG_USART2_BAUD=115200
CONFIG_USART2_BITS=8
CONFIG_USART2_PARITY=0
CONFIG_USART2_2STOP=0
# CONFIG_USART2_IFLOWCONTROL is not set
# CONFIG_USART2_OFLOWCONTROL is not set
# CONFIG_USART2_DMA is not set
# CONFIG_USBDEV is not set
# CONFIG_USBHOST is not set
# CONFIG_WIRELESS is not set
#
# System Logging Device Options
#
#
# System Logging
#
# CONFIG_RAMLOG is not set
# CONFIG_SYSLOG_CONSOLE is not set
#
# Networking Support
#
# CONFIG_ARCH_HAVE_NET is not set
# CONFIG_ARCH_HAVE_PHY is not set
# CONFIG_NET is not set
#
# Crypto API
#
# CONFIG_CRYPTO is not set
#
# File Systems
#
#
# File system configuration
#
# CONFIG_DISABLE_MOUNTPOINT is not set
# CONFIG_FS_AUTOMOUNTER is not set
# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
# CONFIG_FS_READABLE is not set
# CONFIG_FS_WRITABLE is not set
# CONFIG_FS_NAMED_SEMAPHORES is not set
CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
# CONFIG_FS_RAMMAP is not set
# CONFIG_FS_FAT is not set
# CONFIG_FS_NXFFS is not set
# CONFIG_FS_ROMFS is not set
# CONFIG_FS_TMPFS is not set
# CONFIG_FS_SMARTFS is not set
# CONFIG_FS_BINFS is not set
# CONFIG_FS_PROCFS is not set
# CONFIG_FS_UNIONFS is not set
#
# System Logging
#
# CONFIG_SYSLOG is not set
# CONFIG_SYSLOG_TIMESTAMP is not set
#
# Graphics Support
#
# CONFIG_NX is not set
#
# Memory Management
#
# CONFIG_MM_SMALL is not set
CONFIG_MM_REGIONS=1
# CONFIG_ARCH_HAVE_HEAP2 is not set
# CONFIG_GRAN is not set
#
# Audio Support
#
# CONFIG_AUDIO is not set
#
# Binary Loader
#
# CONFIG_BINFMT_DISABLE is not set
# CONFIG_BINFMT_EXEPATH is not set
# CONFIG_NXFLAT is not set
# CONFIG_ELF is not set
CONFIG_BUILTIN=y
# CONFIG_PIC is not set
# CONFIG_SYMTAB_ORDEREDBYNAME is not set
#
# Library Routines
#
#
# Standard C Library Options
#
CONFIG_STDIO_BUFFER_SIZE=64
CONFIG_STDIO_LINEBUFFER=y
CONFIG_NUNGET_CHARS=2
CONFIG_LIB_HOMEDIR="/"
# CONFIG_LIBM is not set
# CONFIG_NOPRINTF_FIELDWIDTH is not set
# CONFIG_LIBC_FLOATINGPOINT is not set
CONFIG_LIBC_LONG_LONG=y
# CONFIG_LIBC_IOCTL_VARIADIC is not set
CONFIG_LIB_RAND_ORDER=1
# CONFIG_EOL_IS_CR is not set
# CONFIG_EOL_IS_LF is not set
# CONFIG_EOL_IS_BOTH_CRLF is not set
CONFIG_EOL_IS_EITHER_CRLF=y
# CONFIG_LIBC_EXECFUNCS is not set
CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
# CONFIG_LIBC_STRERROR is not set
# CONFIG_LIBC_PERROR_STDOUT is not set
CONFIG_ARCH_LOWPUTC=y
# CONFIG_LIBC_LOCALTIME is not set
# CONFIG_TIME_EXTENDED is not set
CONFIG_LIB_SENDFILE_BUFSIZE=512
# CONFIG_ARCH_ROMGETC is not set
# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
# CONFIG_LIBC_NETDB is not set
#
# Non-standard Library Support
#
# CONFIG_LIB_KBDCODEC is not set
# CONFIG_LIB_SLCDCODEC is not set
#
# Basic CXX Support
#
# CONFIG_C99_BOOL8 is not set
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
# CONFIG_CXX_NEWLONG is not set
#
# uClibc++ Standard C++ Library
#
# CONFIG_UCLIBCXX is not set
#
# Application Configuration
#
#
# Built-In Applications
#
CONFIG_BUILTIN_PROXY_STACKSIZE=1024
#
# CAN Utilities
#
#
# Examples
#
# CONFIG_EXAMPLES_CONFIGDATA is not set
# CONFIG_EXAMPLES_CPUHOG is not set
# CONFIG_EXAMPLES_CXXTEST is not set
# CONFIG_EXAMPLES_DHCPD is not set
# CONFIG_EXAMPLES_ELF is not set
# CONFIG_EXAMPLES_FTPC is not set
# CONFIG_EXAMPLES_FTPD is not set
# CONFIG_EXAMPLES_HELLO is not set
# CONFIG_EXAMPLES_HELLOXX is not set
# CONFIG_EXAMPLES_JSON is not set
# CONFIG_EXAMPLES_HIDKBD is not set
# CONFIG_EXAMPLES_KEYPADTEST is not set
# CONFIG_EXAMPLES_IGMP is not set
# CONFIG_EXAMPLES_MEDIA is not set
# CONFIG_EXAMPLES_MM is not set
# CONFIG_EXAMPLES_MODBUS is not set
# CONFIG_EXAMPLES_MOUNT is not set
# CONFIG_EXAMPLES_NRF24L01TERM is not set
CONFIG_EXAMPLES_NSH=y
CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
# CONFIG_EXAMPLES_NULL is not set
# CONFIG_EXAMPLES_NX is not set
# CONFIG_EXAMPLES_NXTERM is not set
# CONFIG_EXAMPLES_NXFFS is not set
# CONFIG_EXAMPLES_NXHELLO is not set
# CONFIG_EXAMPLES_NXIMAGE is not set
# CONFIG_EXAMPLES_NXLINES is not set
# CONFIG_EXAMPLES_NXTEXT is not set
CONFIG_EXAMPLES_OSTEST=y
CONFIG_EXAMPLES_OSTEST_LOOPS=1
CONFIG_EXAMPLES_OSTEST_STACKSIZE=8192
CONFIG_EXAMPLES_OSTEST_NBARRIER_THREADS=8
CONFIG_EXAMPLES_OSTEST_RR_RANGE=10000
CONFIG_EXAMPLES_OSTEST_RR_RUNS=10
CONFIG_EXAMPLES_OSTEST_WAITRESULT=y
# CONFIG_EXAMPLES_PCA9635 is not set
# CONFIG_EXAMPLES_PIPE is not set
# CONFIG_EXAMPLES_PPPD is not set
# CONFIG_EXAMPLES_POSIXSPAWN is not set
# CONFIG_EXAMPLES_QENCODER is not set
# CONFIG_EXAMPLES_RGMP is not set
# CONFIG_EXAMPLES_SENDMAIL is not set
# CONFIG_EXAMPLES_SERIALBLASTER is not set
# CONFIG_EXAMPLES_SERIALRX is not set
# CONFIG_EXAMPLES_SERLOOP is not set
# CONFIG_EXAMPLES_SLCD is not set
# CONFIG_EXAMPLES_SMART_TEST is not set
# CONFIG_EXAMPLES_SMART is not set
# CONFIG_EXAMPLES_TCPECHO is not set
# CONFIG_EXAMPLES_TELNETD is not set
# CONFIG_EXAMPLES_TIFF is not set
# CONFIG_EXAMPLES_TOUCHSCREEN is not set
# CONFIG_EXAMPLES_WEBSERVER is not set
# CONFIG_EXAMPLES_USBSERIAL is not set
# CONFIG_EXAMPLES_USBTERM is not set
# CONFIG_EXAMPLES_WATCHDOG is not set
#
# File System Utilities
#
#
# Graphics Support
#
# CONFIG_TIFF is not set
# CONFIG_GRAPHICS_TRAVELER is not set
#
# Interpreters
#
# CONFIG_INTERPRETERS_FICL is not set
# CONFIG_INTERPRETERS_PCODE is not set
# CONFIG_INTERPRETERS_MICROPYTHON is not set
#
# FreeModBus
#
# CONFIG_MODBUS is not set
#
# Network Utilities
#
# CONFIG_NETUTILS_CODECS is not set
# CONFIG_NETUTILS_FTPC is not set
# CONFIG_NETUTILS_JSON is not set
# CONFIG_NETUTILS_SMTP is not set
#
# NSH Library
#
CONFIG_NSH_LIBRARY=y
#
# Command Line Configuration
#
CONFIG_NSH_READLINE=y
# CONFIG_NSH_CLE is not set
CONFIG_NSH_LINELEN=64
# CONFIG_NSH_DISABLE_SEMICOLON is not set
# CONFIG_NSH_CMDPARMS is not set
CONFIG_NSH_MAXARGUMENTS=6
# CONFIG_NSH_ARGCAT is not set
CONFIG_NSH_NESTDEPTH=3
# CONFIG_NSH_DISABLEBG is not set
CONFIG_NSH_BUILTIN_APPS=y
#
# Disable Individual commands
#
# CONFIG_NSH_DISABLE_ADDROUTE is not set
# CONFIG_NSH_DISABLE_BASENAME is not set
# CONFIG_NSH_DISABLE_CAT is not set
# CONFIG_NSH_DISABLE_CD is not set
# CONFIG_NSH_DISABLE_CP is not set
# CONFIG_NSH_DISABLE_CMP is not set
CONFIG_NSH_DISABLE_DATE=y
# CONFIG_NSH_DISABLE_DD is not set
# CONFIG_NSH_DISABLE_DF is not set
# CONFIG_NSH_DISABLE_DELROUTE is not set
# CONFIG_NSH_DISABLE_DIRNAME is not set
# CONFIG_NSH_DISABLE_ECHO is not set
# CONFIG_NSH_DISABLE_EXEC is not set
# CONFIG_NSH_DISABLE_EXIT is not set
# CONFIG_NSH_DISABLE_FREE is not set
# CONFIG_NSH_DISABLE_GET is not set
# CONFIG_NSH_DISABLE_HELP is not set
# CONFIG_NSH_DISABLE_HEXDUMP is not set
# CONFIG_NSH_DISABLE_IFCONFIG is not set
CONFIG_NSH_DISABLE_IFUPDOWN=y
# CONFIG_NSH_DISABLE_KILL is not set
# CONFIG_NSH_DISABLE_LOSETUP is not set
CONFIG_NSH_DISABLE_LOSMART=y
# CONFIG_NSH_DISABLE_LS is not set
# CONFIG_NSH_DISABLE_MB is not set
# CONFIG_NSH_DISABLE_MKDIR is not set
# CONFIG_NSH_DISABLE_MKFIFO is not set
# CONFIG_NSH_DISABLE_MKRD is not set
# CONFIG_NSH_DISABLE_MH is not set
# CONFIG_NSH_DISABLE_MOUNT is not set
# CONFIG_NSH_DISABLE_MV is not set
# CONFIG_NSH_DISABLE_MW is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_NSH_DISABLE_PUT is not set
# CONFIG_NSH_DISABLE_PWD is not set
# CONFIG_NSH_DISABLE_RM is not set
# CONFIG_NSH_DISABLE_RMDIR is not set
# CONFIG_NSH_DISABLE_SET is not set
# CONFIG_NSH_DISABLE_SH is not set
# CONFIG_NSH_DISABLE_SLEEP is not set
# CONFIG_NSH_DISABLE_TIME is not set
# CONFIG_NSH_DISABLE_TEST is not set
# CONFIG_NSH_DISABLE_UMOUNT is not set
# CONFIG_NSH_DISABLE_UNAME is not set
# CONFIG_NSH_DISABLE_UNSET is not set
# CONFIG_NSH_DISABLE_USLEEP is not set
# CONFIG_NSH_DISABLE_WGET is not set
# CONFIG_NSH_DISABLE_XD is not set
#
# Configure Command Options
#
# CONFIG_NSH_CMDOPT_DF_H is not set
CONFIG_NSH_CODECS_BUFSIZE=128
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
CONFIG_NSH_FILEIOSIZE=512
#
# Scripting Support
#
# CONFIG_NSH_DISABLESCRIPT is not set
# CONFIG_NSH_DISABLE_ITEF is not set
# CONFIG_NSH_DISABLE_LOOPS is not set
#
# Console Configuration
#
CONFIG_NSH_CONSOLE=y
# CONFIG_NSH_ALTCONDEV is not set
# CONFIG_NSH_ARCHINIT is not set
#
# NxWidgets/NxWM
#
#
# Platform-specific Support
#
# CONFIG_PLATFORM_CONFIGDATA is not set
#
# System Libraries and NSH Add-Ons
#
# CONFIG_SYSTEM_FREE is not set
# CONFIG_SYSTEM_CLE is not set
# CONFIG_SYSTEM_CUTERM is not set
# CONFIG_SYSTEM_INSTALL is not set
# CONFIG_SYSTEM_HEX2BIN is not set
# CONFIG_SYSTEM_INIFILE is not set
# CONFIG_SYSTEM_HEXED is not set
# CONFIG_SYSTEM_RAMTEST is not set
CONFIG_READLINE_HAVE_EXTMATCH=y
CONFIG_SYSTEM_READLINE=y
CONFIG_READLINE_ECHO=y
# CONFIG_READLINE_TABCOMPLETION is not set
# CONFIG_READLINE_CMD_HISTORY is not set
# CONFIG_SYSTEM_RAMTRON is not set
# CONFIG_SYSTEM_SDCARD is not set
# CONFIG_SYSTEM_SUDOKU is not set
# CONFIG_SYSTEM_VI is not set
# CONFIG_SYSTEM_ZMODEM is not set

64
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#!/bin/bash
# configs/stm32l476vg-disco/nsh/setenv.sh
#
# Copyright (C) 2014 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <gnutt@nuttx.org>
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in
# the documentation and/or other materials provided with the
# distribution.
# 3. Neither the name NuttX nor the names of its contributors may be
# used to endorse or promote products derived from this software
# without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
if [ "$_" = "$0" ] ; then
echo "You must source this script, not run it!" 1>&2
exit 1
fi
WD=`pwd`
if [ ! -x "setenv.sh" ]; then
echo "This script must be executed from the top-level NuttX build directory"
exit 1
fi
if [ -z "${PATH_ORIG}" ]; then
export PATH_ORIG="${PATH}"
fi
# This the Cygwin path to the location where I installed the CodeSourcery
# toolchain under windows. You will also have to edit this if you install
# the CodeSourcery toolchain in any other location
#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
# This the Cygwin path to the location where I build the buildroot
# toolchain.
#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin"
# Add the path to the toolchain to the PATH varialble
export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"
echo "PATH : ${PATH}"

125
configs/stm32l476vg-disco/scripts/ld.script Normal file
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/****************************************************************************
* configs/stm32l476vg-disco/scripts/l476rg.ld
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
* Sebastien Lorquet <sebastien@lorquet.fr>
* dev@ziggurat29.com
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/* The STM32L476VG has 1024Kb of FLASH beginning at address 0x0800:0000,
* 96Kb of SRAM beginning at address 0x2000:0000, and 32Kb of SRAM2 beginning
* at address 0x1000:0000. The SRAM2 has special properties (e.g. parity
* check, separate power domain for retention in low power modes, write
* protection). Alas, it is non-contiguous with main SRAM.
* When booting from FLASH,
* FLASH memory is aliased to address 0x0000:0000 where the code expects to
* begin execution by jumping to the entry point in the 0x0800:0000 address
* range.
*/
MEMORY
{
flash (rx) : ORIGIN = 0x08000000, LENGTH = 512K
sram (rwx) : ORIGIN = 0x20000000, LENGTH = 96K
sram2 (rwx) : ORIGIN = 0x10000000, LENGTH = 32K
}
OUTPUT_ARCH(arm)
ENTRY(_stext)
SECTIONS
{
.text : {
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
_etext = ABSOLUTE(.);
} > flash
.init_section : {
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > flash
.ARM.extab : {
*(.ARM.extab*)
} > flash
__exidx_start = ABSOLUTE(.);
.ARM.exidx : {
*(.ARM.exidx*)
} > flash
__exidx_end = ABSOLUTE(.);
_eronly = ABSOLUTE(.);
/* The STM32L476RG has 96Kb of SRAM beginning at the following address */
.data : {
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
_edata = ABSOLUTE(.);
} > sram AT > flash
.bss : {
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
_ebss = ABSOLUTE(.);
} > sram
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}

74
configs/stm32l476vg-disco/src/Makefile Normal file
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############################################################################
# configs/nucleo-l476rg/src/Makefile
#
# Copyright (C) 2014 Gregory Nutt. All rights reserved.
# Author: dev@ziggurat29.com
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in
# the documentation and/or other materials provided with the
# distribution.
# 3. Neither the name NuttX nor the names of its contributors may be
# used to endorse or promote products derived from this software
# without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
############################################################################
-include $(TOPDIR)/Make.defs
ASRCS =
CSRCS = stm32_boot.c stm32_spi.c
ifeq ($(CONFIG_ARCH_BOARD_STM32L4_CUSTOM_CLOCKCONFIG),y)
CSRCS += stm32_clockconfig.c
endif
ifeq ($(CONFIG_STM32_OTGFS),y)
CSRCS += stm32_usb.c
endif
ifeq ($(CONFIG_HAVE_CXX),y)
CSRCS += stm32_cxxinitialize.c
endif
ifeq ($(CONFIG_ARCH_LEDS),y)
CSRCS += stm32_autoleds.c
else
CSRCS += stm32_userleds.c
endif
ifeq ($(CONFIG_ARCH_BUTTONS),y)
CSRCS += stm32_buttons.c
endif
ifeq ($(CONFIG_ADC),y)
#CSRCS += stm32_adc.c
ifeq ($(CONFIG_AJOYSTICK),y)
#CSRCS += stm32_ajoystick.c
endif
endif
ifeq ($(CONFIG_NSH_LIBRARY),y)
CSRCS += stm32_nsh.c
endif
include $(TOPDIR)/configs/Board.mk

194
configs/stm32l476vg-disco/src/stm32_autoleds.c Normal file
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/****************************************************************************
* configs/stm32l476vg-disco/src/stm32_autoleds.c
*
* Copyright (C) 2014-2015 Gregory Nutt. All rights reserved.
* Author: dev@ziggurat29.com
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include <debug.h>
#include <nuttx/board.h>
#include <arch/board/board.h>
#include "chip.h"
#include "up_arch.h"
#include "up_internal.h"
#include "stm32l4.h"
#include "stm32l476vg-disco.h"
#ifdef CONFIG_ARCH_LEDS
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
* with CONFIG_DEBUG_VERBOSE too)
*/
#ifdef CONFIG_DEBUG_LEDS
# define leddbg lldbg
# define ledvdbg llvdbg
#else
# define leddbg(x...)
# define ledvdbg(x...)
#endif
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_autoled_initialize
****************************************************************************/
void board_autoled_initialize(void)
{
/* Configure LD4,5 GPIO for output */
stm32l4_configgpio(GPIO_LED_RED);
stm32l4_configgpio(GPIO_LED_GRN);
}
/****************************************************************************
* Name: board_autoled_on
****************************************************************************/
void board_autoled_on(int led)
{
switch (led)
{
/* 0: LED_STARTED, LED_HEAPALLOCATE, LED_IRQSENABLED
*
* Since the LEDs were initially all OFF and since this state only
* occurs one time, nothing need be done.
*/
default:
case LED_STARTED:
case LED_HEAPALLOCATE:
case LED_IRQSENABLED:
break;
/* 1: LED_STACKCREATED
*
* This case will also occur only once.
*/
case LED_STACKCREATED:
break;
/* 2: LED_INIRQ, LED_SIGNAL, LED_ASSERTION
*
* This case will occur many times.
*/
case LED_INIRQ:
case LED_SIGNAL:
case LED_ASSERTION:
stm32l4_gpiowrite(GPIO_LED_RED, true);
break;
/* 3: LED_PANIC: GPIO_LED_GRN=OFF RX=ON
*
* This case will also occur many times.
*/
case LED_PANIC:
stm32l4_gpiowrite(GPIO_LED_GRN, false);
stm32l4_gpiowrite(GPIO_LED_RED, true);
break;
case LED_IDLE:
stm32l4_gpiowrite(GPIO_LED_GRN, true);
stm32l4_gpiowrite(GPIO_LED_RED, false);
break;
}
}
/****************************************************************************
* Name: board_autoled_off
****************************************************************************/
void board_autoled_off(int led)
{
switch (led)
{
/* 0: LED_STARTED, LED_HEAPALLOCATE, LED_IRQSENABLED:
* 1: LED_STACKCREATED:
*
* These cases should never happen.
*/
default:
case LED_STARTED:
case LED_HEAPALLOCATE:
case LED_IRQSENABLED:
case LED_STACKCREATED:
break;
/* 2: LED_INIRQ, LED_SIGNAL, LED_ASSERTION:
*
* This case will occur many times.
*/
case LED_INIRQ:
case LED_SIGNAL:
case LED_ASSERTION:
stm32l4_gpiowrite(GPIO_LED_RED, false);
break;
/* 3: LED_PANIC: GPIO_LED_GRN=OFF RX=OFF
*
* This case will also occur many times.
*/
case LED_PANIC:
stm32l4_gpiowrite(GPIO_LED_GRN, false);
stm32l4_gpiowrite(GPIO_LED_RED, false);
break;
case LED_IDLE:
stm32l4_gpiowrite(GPIO_LED_GRN, false);
stm32l4_gpiowrite(GPIO_LED_RED, false);
break;
}
}
#endif /* CONFIG_ARCH_LEDS */

128
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/************************************************************************************
* configs/stm32l476vg-disco/src/stm32_boot.c
*
* Copyright (C) 2014-2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
* dev@ziggurat29.com
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <debug.h>
#include <nuttx/arch.h>
#include <nuttx/board.h>
#include <nuttx/spi/spi.h>
#include <arch/board/board.h>
#include "up_arch.h"
#include "stm32l476vg-disco.h"
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/************************************************************************************
* Private Data
************************************************************************************/
/************************************************************************************
* Public Functions
************************************************************************************/
/************************************************************************************
* Name: stm32l4_boardinitialize
*
* Description:
* All STM32L4 architectures must provide the following entry point. This entry point
* is called early in the initialization -- after all memory has been configured
* and mapped but before any devices have been initialized.
*
************************************************************************************/
void stm32l4_boardinitialize(void)
{
/* Configure on-board LEDs if LED support has been selected. */
#ifdef CONFIG_ARCH_LEDS
board_autoled_initialize();
#endif
/* Configure SPI chip selects if 1) SP2 is not disabled, and 2) the weak function
* stm32_spiinitialize() has been brought into the link.
*/
#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3)
stm32l4_spiinitialize();
#endif
/* Initialize USB is 1) USBDEV is selected, 2) the USB controller is not
* disabled, and 3) the weak function stm32_usbinitialize() has been brought
* into the build.
*/
#if defined(CONFIG_USBDEV) && defined(CONFIG_STM32_USB)
stm32l4_usbinitialize();
#endif
}
/****************************************************************************
* Name: board_initialize
*
* Description:
* If CONFIG_BOARD_INITIALIZE is selected, then an additional
* initialization call will be performed in the boot-up sequence to a
* function called board_initialize(). board_initialize() will be
* called immediately after up_intiialize() is called and just before the
* initial application is started. This additional initialization phase
* may be used, for example, to initialize board-specific device drivers.
*
****************************************************************************/
#ifdef CONFIG_BOARD_INITIALIZE
void board_initialize(void)
{
/* Perform NSH initialization here instead of from the NSH. This
* alternative NSH initialization is necessary when NSH is ran in user-space
* but the initialization function must run in kernel space.
*/
#if defined(CONFIG_NSH_LIBRARY) && !defined(CONFIG_NSH_ARCHINIT)
board_app_initialize();
#endif
}
#endif

334
configs/stm32l476vg-disco/src/stm32_buttons.c Normal file
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/****************************************************************************
* configs/stm32l476vg-disco/src/stm32_buttons.c
*
* Copyright (C) 2014-2015 Gregory Nutt. All rights reserved.
* Author: dev@ziggurat29.com
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <nuttx/arch.h>
#include <nuttx/board.h>
#include <arch/board/board.h>
#include <nuttx/power/pm.h>
#include "stm32l476vg-disco.h"
#ifdef CONFIG_ARCH_BUTTONS
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#ifndef CONFIG_PM_BUTTON_ACTIVITY
# define CONFIG_PM_BUTTON_ACTIVITY 10
#endif
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
/* Button Power Management */
#ifdef CONFIG_PM
static void button_pm_notify(struct pm_callback_s *cb, enum pm_state_e pmstate);
static int button_pm_prepare(struct pm_callback_s *cb, enum pm_state_e pmstate);
#endif
/****************************************************************************
* Private Data
****************************************************************************/
/* Pin configuration for each STM32L476 Discovery button. This array is indexed by
* the BUTTON_* definitions in board.h
*/
static const uint32_t g_buttons[NUM_BUTTONS] =
{
GPIO_BTN_CENTER,
GPIO_BTN_LEFT,
GPIO_BTN_DOWN,
GPIO_BTN_RIGHT,
GPIO_BTN_UP
};
#ifdef CONFIG_PM
static struct pm_callback_s g_buttonscb =
{
.notify = button_pm_notify,
.prepare = button_pm_prepare,
};
#ifndef CONFIG_PM_BUTTON_ACTIVITY
#define CONFIG_PM_BUTTON_ACTIVITY 10
#endif
#endif
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: button_pm_notify
*
* Description:
* Notify the driver of new power state. This callback is called after
* all drivers have had the opportunity to prepare for the new power state.
*
****************************************************************************/
#ifdef CONFIG_PM
static void button_pm_notify(struct pm_callback_s *cb , enum pm_state_e pmstate)
{
switch (pmstate)
{
case(PM_NORMAL):
{
/* Restore normal buttons operation */
//XXX turn on any GPIO
}
break;
case(PM_IDLE):
{
/* Entering IDLE mode - buttons */
//XXX turn on any GPIO
}
break;
case(PM_STANDBY):
{
/* Entering STANDBY mode - Logic for PM_STANDBY goes here */
//XXX turn off any GPIO
}
break;
case(PM_SLEEP):
{
/* Entering SLEEP mode - Logic for PM_SLEEP goes here */
//XXX turn off any GPIO
}
break;
default:
{
/* Should not get here */
}
break;
}
}
#endif
/****************************************************************************
* Name: button_handler
*
* Description:
* Handle a button wake-up interrupt
*
****************************************************************************/
/* XXX it's not completely clear to me if this is appropriate; on the one
hand, it seems to make sense that this would be the module to have the ISR
for the buttons. On the other hand, it will conflict with things done in
the buttons example, which registers it's own ISR, and warns if it sees
one already there. I don't know if 'buttons' is overstepping it's bounds
in the interst of providing a compact example, (like the I2C app directly
talking to the bus), or if really that should be an expected thing to do.
*/
#if 0
#ifdef CONFIG_ARCH_IRQBUTTONS
static int button_handler(int irq, FAR void *context)
{
/* At this point the MCU should have already awakened. The state
* change will be handled in the IDLE loop when the system is re-awakened
* The button interrupt handler should be totally ignorant of the PM
* activities and should report button activity as if nothing
* special happened.
*/
#ifdef CONFIG_PM
pm_activity(CONFIG_PM_BUTTON_ACTIVITY);
#endif
return OK;
}
#endif /* CONFIG_ARCH_IRQBUTTONS */
#endif
/****************************************************************************
* Name: button_pm_prepare
*
* Description:
* Request the driver to prepare for a new power state. This is a warning
* that the system is about to enter into a new power state. The driver
* should begin whatever operations that may be required to enter power
* state. The driver may abort the state change mode by returning a
* non-zero value from the callback function.
*
****************************************************************************/
#ifdef CONFIG_PM
static int button_pm_prepare(struct pm_callback_s *cb , enum pm_state_e pmstate)
{
/* No preparation to change power modes is required by the Buttons driver.
* We always accept the state change by returning OK.
*/
return OK;
}
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_button_initialize
*
* Description:
* board_button_initialize() must be called to initialize button resources.
* After that, board_buttons() may be called to collect the current state
* of all buttons or board_button_irq() may be called to register button
* interrupt handlers.
*
****************************************************************************/
void board_button_initialize(void)
{
int i;
/* Configure the GPIO pins as inputs. NOTE that EXTI interrupts are
* configured for all pins.
*/
for (i = 0; i < NUM_BUTTONS; i++)
{
stm32l4_configgpio(g_buttons[i]);
//It's not clear if this is correct; I think so, but then there are
//conflicts with the 'buttons' sample app.
#if 0
#ifdef CONFIG_ARCH_IRQBUTTONS
xcpt_t oldhandler = board_button_irq(i, button_handler);
if (oldhandler != NULL)
{
lowsyslog(LOG_WARNING, "WARNING: oldhandler:%p is not NULL! "
"Button events may be lost or aliased!\n",
oldhandler);
}
#endif
#endif
}
}
/****************************************************************************
* Name: board_buttons
****************************************************************************/
uint8_t board_buttons(void)
{
uint8_t ret = 0;
int i;
/* Check that state of each key */
for (i = 0; i < NUM_BUTTONS; i++)
{
/* A HIGH value means that the key is pressed.
*/
bool pressed = stm32l4_gpioread(g_buttons[i]);
/* Accumulate the set of depressed (not released) keys */
if (pressed)
{
ret |= (1 << i);
}
}
/* if the user pressed any buttons, notify power management system we are active
*/
#ifdef CONFIG_PM
if ( 0 != ret )
{
pm_activity ( CONFIG_PM_BUTTON_ACTIVITY );
}
#endif
return ret;
}
/************************************************************************************
* Button support.
*
* Description:
* board_button_initialize() must be called to initialize button resources. After
* that, board_buttons() may be called to collect the current state of all
* buttons or board_button_irq() may be called to register button interrupt
* handlers.
*
* After board_button_initialize() has been called, board_buttons() may be called to
* collect the state of all buttons. board_buttons() returns an 8-bit bit set
* with each bit associated with a button. See the BUTTON_*_BIT
* definitions in board.h for the meaning of each bit.
*
* board_button_irq() may be called to register an interrupt handler that will
* be called when a button is depressed or released. The ID value is a
* button enumeration value that uniquely identifies a button resource. See the
* BUTTON_* definitions in board.h for the meaning of enumeration
* value. The previous interrupt handler address is returned (so that it may
* restored, if so desired).
*
************************************************************************************/
#ifdef CONFIG_ARCH_IRQBUTTONS
xcpt_t board_button_irq(int id, xcpt_t irqhandler)
{
xcpt_t oldhandler = NULL;
/* The following should be atomic */
if (id >= MIN_IRQBUTTON && id <= MAX_IRQBUTTON)
{
oldhandler = stm32l4_gpiosetevent(g_buttons[id], true, true, true, irqhandler);
}
return oldhandler;
}
#endif
#endif /* CONFIG_ARCH_BUTTONS */

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/************************************************************************************
* configs/stm32l476vg-disco/src/stm32_clockconfig.c
*
* Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
* Author: dev@ziggurat29.com
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <debug.h>
#include <arch/board/board.h>
#include <arch/board/stm32l476vg-disco-clocking.h>
#include "up_arch.h"
#include "stm32l476vg-disco.h"
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/************************************************************************************
* Private Functions
************************************************************************************/
/************************************************************************************
* Public Functions
************************************************************************************/
/************************************************************************************
* Name: stm32_board_clockconfig
*
* Description:
* I provided this module when I was doing some debugging of a problem I had with
* clocking (it was helpful to do A/B tests). I'm leaving it here in the config
* partially because I expect to have similar problems again as I develop more of
* the various peripheral support, but also because it may become necessary in the
* end for certain project configurations which have specialized clock configurations
* that aren't appropriate to expose in the 'arch' default code.
*
************************************************************************************/
#if defined(CONFIG_ARCH_BOARD_STM32L4_CUSTOM_CLOCKCONFIG)
void stm32l4_board_clockconfig(void)
{
uint32_t regval;
/* Enable Internal High-Speed Clock (HSI) */
regval = getreg32(STM32L4_RCC_CR);
regval |= RCC_CR_HSION; /* Enable HSI */
putreg32(regval, STM32L4_RCC_CR);
/* Wait until the HSI is ready */
while ((getreg32(STM32L4_RCC_CR) & RCC_CR_HSIRDY) == 0)
{
}
/* Set the HCLK source/divider */
regval = getreg32(STM32L4_RCC_CFGR);
regval &= ~RCC_CFGR_HPRE_MASK;
regval |= STM32L4_RCC_CFGR_HPRE;
putreg32(regval, STM32L4_RCC_CFGR);
/* Set the PCLK2 divider */
regval = getreg32(STM32L4_RCC_CFGR);
regval &= ~RCC_CFGR_PPRE2_MASK;
regval |= STM32L4_RCC_CFGR_PPRE2;
putreg32(regval, STM32L4_RCC_CFGR);
/* Set the PCLK1 divider */
regval = getreg32(STM32L4_RCC_CFGR);
regval &= ~RCC_CFGR_PPRE1_MASK;
regval |= STM32L4_RCC_CFGR_PPRE1;
putreg32(regval, STM32L4_RCC_CFGR);
/* Set the PLL source and main divider */
regval = getreg32(STM32L4_RCC_PLLCFG);
/* Configure Main PLL */
/* Set the PLL dividers and multipliers to configure the main PLL */
regval = (STM32L4_PLLCFG_PLLM | STM32L4_PLLCFG_PLLN | STM32L4_PLLCFG_PLLP
| STM32L4_PLLCFG_PLLQ | STM32L4_PLLCFG_PLLR);
regval |= RCC_PLLCFG_PLLQEN;
regval |= RCC_PLLCFG_PLLREN;
/* XXX The choice of clock source to PLL (all three) is independent
* of the sys clock source choice, review the STM32L4_BOARD_USEHSI
* name; probably split it into two, one for PLL source and one
* for sys clock source */
regval |= RCC_PLLCFG_PLLSRC_HSI;
putreg32(regval, STM32L4_RCC_PLLCFG);
/* Enable the main PLL */
regval = getreg32(STM32L4_RCC_CR);
regval |= RCC_CR_PLLON;
putreg32(regval, STM32L4_RCC_CR);
/* Wait until the PLL is ready */
while ((getreg32(STM32L4_RCC_CR) & RCC_CR_PLLRDY) == 0)
{
}
/* Configure SAI1 PLL */
regval = getreg32(STM32L4_RCC_PLLSAI1CFG);
/* Set the PLL dividers and multipliers to configure the SAI1 PLL */
regval = (STM32L4_PLLSAI1CFG_PLLN | STM32L4_PLLSAI1CFG_PLLP
| STM32L4_PLLSAI1CFG_PLLQ | STM32L4_PLLSAI1CFG_PLLR);
regval |= RCC_PLLSAI1CFG_PLLQEN;
putreg32(regval, STM32L4_RCC_PLLSAI1CFG);
/* Enable the SAI1 PLL */
regval = getreg32(STM32L4_RCC_CR);
regval |= RCC_CR_PLLSAI1ON;
putreg32(regval, STM32L4_RCC_CR);
/* Wait until the PLL is ready */
while ((getreg32(STM32L4_RCC_CR) & RCC_CR_PLLSAI1RDY) == 0)
{
}
/* Configure SAI2 PLL */
regval = getreg32(STM32L4_RCC_PLLSAI2CFG);
/* Enable the SAI2 PLL */
/* Set the PLL dividers and multipliers to configure the SAI2 PLL */
regval = (STM32L4_PLLSAI2CFG_PLLN | STM32L4_PLLSAI2CFG_PLLP
| STM32L4_PLLSAI2CFG_PLLR);
putreg32(regval, STM32L4_RCC_PLLSAI2CFG);
/* Enable the SAI1 PLL */
regval = getreg32(STM32L4_RCC_CR);
regval |= RCC_CR_PLLSAI2ON;
putreg32(regval, STM32L4_RCC_CR);
/* Wait until the PLL is ready */
while ((getreg32(STM32L4_RCC_CR) & RCC_CR_PLLSAI2RDY) == 0)
{
}
/* Enable FLASH prefetch, instruction cache, data cache, and 5 wait states */
#ifdef CONFIG_STM32L4_FLASH_PREFETCH
regval = (FLASH_ACR_LATENCY_4 | FLASH_ACR_ICEN | FLASH_ACR_DCEN | FLASH_ACR_PRFTEN);
#else
regval = (FLASH_ACR_LATENCY_4 | FLASH_ACR_ICEN | FLASH_ACR_DCEN);
#endif
putreg32(regval, STM32L4_FLASH_ACR);
/* Select the main PLL as system clock source */
regval = getreg32(STM32L4_RCC_CFGR);
regval &= ~RCC_CFGR_SW_MASK;
regval |= RCC_CFGR_SW_PLL;
putreg32(regval, STM32L4_RCC_CFGR);
/* Wait until the PLL source is used as the system clock source */
while ((getreg32(STM32L4_RCC_CFGR) & RCC_CFGR_SWS_MASK) != RCC_CFGR_SWS_PLL)
{
}
#if defined(CONFIG_STM32L4_IWDG) || defined(CONFIG_RTC_LSICLOCK)
/* Low speed internal clock source LSI */
stm32l4_rcc_enablelsi();
#endif
#if defined(CONFIG_RTC_LSECLOCK)
/* Low speed external clock source LSE
*
* TODO: There is another case where the LSE needs to
* be enabled: if the MCO1 pin selects LSE as source.
*/
stm32l4_rcc_enablelse();
#endif
/*XXX sanity if sdmmc1 or usb or rng, then we need to set the clk48 source
* and then we can also do away with STM32L4_USE_CLK48, and give better
* warning messages */
/*XXX sanity if our STM32L4_CLK48_SEL is YYY then we need to have already
* enabled ZZZ */
regval = getreg32(STM32L4_RCC_CCIPR);
regval &= RCC_CCIPR_CLK48SEL_MASK;
regval |= STM32L4_CLK48_SEL;
putreg32(regval, STM32L4_RCC_CCIPR);
}
#endif

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/************************************************************************************
* configs/stm32l476vg-disco/src/stm32_cxxinitialize.c
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <debug.h>
#include <nuttx/arch.h>
#include <arch/stm32l4/chip.h>
#include "chip.h"
#if defined(CONFIG_HAVE_CXX) && defined(CONFIG_HAVE_CXXINITIALIZE)
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* Debug ****************************************************************************/
/* Non-standard debug that may be enabled just for testing the static constructors */
#ifndef CONFIG_DEBUG
# undef CONFIG_DEBUG_CXX
#endif
#ifdef CONFIG_DEBUG_CXX
# define cxxdbg dbg
# define cxxlldbg lldbg
# ifdef CONFIG_DEBUG_VERBOSE
# define cxxvdbg vdbg
# define cxxllvdbg llvdbg
# else
# define cxxvdbg(x...)
# define cxxllvdbg(x...)
# endif
#else
# define cxxdbg(x...)
# define cxxlldbg(x...)
# define cxxvdbg(x...)
# define cxxllvdbg(x...)
#endif
/************************************************************************************
* Private Types
************************************************************************************/
/* This type defines one entry in initialization array */
typedef void (*initializer_t)(void);
/************************************************************************************
* External references
************************************************************************************/
/* _sinit and _einit are symbols exported by the linker script that mark the
* beginning and the end of the C++ initialization section.
*/
extern initializer_t _sinit;
extern initializer_t _einit;
/* _stext and _etext are symbols exported by the linker script that mark the
* beginning and the end of text.
*/
extern uint32_t _stext;
extern uint32_t _etext;
/************************************************************************************
* Private Functions
************************************************************************************/
/************************************************************************************
* Public Functions
************************************************************************************/
/****************************************************************************
* Name: up_cxxinitialize
*
* Description:
* If C++ and C++ static constructors are supported, then this function
* must be provided by board-specific logic in order to perform
* initialization of the static C++ class instances.
*
* This function should then be called in the application-specific
* user_start logic in order to perform the C++ initialization. NOTE
* that no component of the core NuttX RTOS logic is involved; This
* function defintion only provides the 'contract' between application
* specific C++ code and platform-specific toolchain support
*
****************************************************************************/
void up_cxxinitialize(void)
{
initializer_t *initp;
cxxdbg("_sinit: %p _einit: %p _stext: %p _etext: %p\n",
&_sinit, &_einit, &_stext, &_etext);
/* Visit each entry in the initialzation table */
for (initp = &_sinit; initp != &_einit; initp++)
{
initializer_t initializer = *initp;
cxxdbg("initp: %p initializer: %p\n", initp, initializer);
/* Make sure that the address is non-NULL and lies in the text region
* defined by the linker script. Some toolchains may put NULL values
* or counts in the initialization table
*/
if ((void*)initializer > (void*)&_stext && (void*)initializer < (void*)&_etext)
{
cxxdbg("Calling %p\n", initializer);
initializer();
}
}
}
#endif /* CONFIG_HAVE_CXX && CONFIG_HAVE_CXXINITIALIZE */

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/****************************************************************************
* configs/stm32l476vg-disco/src/stm32_nsh.c
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdio.h>
#include <syslog.h>
#include <errno.h>
#include <nuttx/arch.h>
#include <nuttx/board.h>
#include <stm32l4.h>
#include <stm32l4_uart.h>
#include <arch/board/board.h>
#include "stm32l476vg-disco.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_app_initialize
*
* Description:
* Perform architecture specific initialization
*
****************************************************************************/
int board_app_initialize(void)
{
/* Configure CPU load estimation */
#ifdef CONFIG_SCHED_INSTRUMENTATION
cpuload_initialize_once();
#endif
return OK;
}

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/****************************************************************************
* configs/stm32l476vg-disco/src/stm32_spi.c
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include <debug.h>
#include <errno.h>
#include <nuttx/spi/spi.h>
#include <arch/board/board.h>
#include <up_arch.h>
#include <chip.h>
#include <stm32l4.h>
#include "stm32l476vg-disco.h"
#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3)
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* Enables debug output from this file */
#ifndef CONFIG_DEBUG
# undef CONFIG_DEBUG_SPI
# undef CONFIG_DEBUG_VERBOSE
#endif
#ifdef CONFIG_DEBUG_SPI
# define spidbg lldbg
# ifdef CONFIG_DEBUG_VERBOSE
# define spivdbg lldbg
# else
# define spivdbg(x...)
# endif
#else
# define spidbg(x...)
# define spivdbg(x...)
#endif
/************************************************************************************
* Public Data
************************************************************************************/
/* Global driver instances */
#ifdef CONFIG_STM32_SPI1
xxx
struct spi_dev_s *g_spi1;
#endif
#ifdef CONFIG_STM32_SPI2
yyy
struct spi_dev_s *g_spi2;
#endif
/************************************************************************************
* Public Functions
************************************************************************************/
/************************************************************************************
* Name: stm32_spiinitialize
*
* Description:
* Called to configure SPI chip select GPIO pins for the Nucleo-F401RE and
* Nucleo-F411RE boards.
*
************************************************************************************/
void weak_function stm32_spiinitialize(void)
{
#ifdef CONFIG_STM32_SPI1
/* Configure SPI-based devices */
g_spi1 = up_spiinitialize(1);
if (!g_spi1)
{
spidbg("[boot] FAILED to initialize SPI port 1\n");
}
#ifdef CONFIG_WL_CC3000
stm32_configgpio(GPIO_SPI_CS_WIFI);
#endif
#ifdef HAVE_MMCSD
stm32_configgpio(GPIO_SPI_CS_SD_CARD);
#endif
#endif
#ifdef CONFIG_STM32_SPI2
/* Configure SPI-based devices */
g_spi2 = up_spiinitialize(2);
/* Setup CS, EN & IRQ line IOs */
#ifdef CONFIG_WL_CC3000
stm32_configgpio(GPIO_WIFI_CS);
stm32_configgpio(GPIO_WIFI_EN);
stm32_configgpio(GPIO_WIFI_INT);
#endif
#endif
}
/****************************************************************************
* Name: stm32_spi1/2/3select and stm32_spi1/2/3status
*
* Description:
* The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status must be
* provided by board-specific logic. They are implementations of the select
* and status methods of the SPI interface defined by struct spi_ops_s (see
* include/nuttx/spi/spi.h). All other methods (including up_spiinitialize())
* are provided by common STM32 logic. To use this common SPI logic on your
* board:
*
* 1. Provide logic in stm32_boardinitialize() to configure SPI chip select
* pins.
* 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions in your
* board-specific logic. These functions will perform chip selection and
* status operations using GPIOs in the way your board is configured.
* 3. Add a calls to up_spiinitialize() in your low level application
* initialization logic
* 4. The handle returned by up_spiinitialize() may then be used to bind the
* SPI driver to higher level logic (e.g., calling
* mmcsd_spislotinitialize(), for example, will bind the SPI driver to
* the SPI MMC/SD driver).
*
****************************************************************************/
#ifdef CONFIG_STM32_SPI1
void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
#ifdef CONFIG_WL_CC3000
if (devid == SPIDEV_WIRELESS)
{
stm32_gpiowrite(GPIO_SPI_CS_WIFI, !selected);
}
else
#endif
#ifdef HAVE_MMCSD
if (devid == SPIDEV_MMCSD)
{
stm32_gpiowrite(GPIO_SPI_CS_SD_CARD, !selected);
}
#endif
}
uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
{
return 0;
}
#endif
#ifdef CONFIG_STM32_SPI2
void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
#ifdef CONFIG_WL_CC3000
if (devid == SPIDEV_WIRELESS)
{
stm32_gpiowrite(GPIO_WIFI_CS, !selected);
}
#endif
}
uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
{
return 0;
}
#endif
#ifdef CONFIG_STM32_SPI3
void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
}
uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
{
return 0;
}
#endif
/****************************************************************************
* Name: stm32_spi1cmddata
*
* Description:
* Set or clear the SH1101A A0 or SD1306 D/C n bit to select data (true)
* or command (false). This function must be provided by platform-specific
* logic. This is an implementation of the cmddata method of the SPI
* interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h).
*
* Input Parameters:
*
* spi - SPI device that controls the bus the device that requires the CMD/
* DATA selection.
* devid - If there are multiple devices on the bus, this selects which one
* to select cmd or data. NOTE: This design restricts, for example,
* one one SPI display per SPI bus.
* cmd - true: select command; false: select data
*
* Returned Value:
* None
*
****************************************************************************/
#ifdef CONFIG_SPI_CMDDATA
#ifdef CONFIG_STM32_SPI1
int stm32_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
{
return OK;
}
#endif
#ifdef CONFIG_STM32_SPI2
int stm32_spi2cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
{
return OK;
}
#endif
#ifdef CONFIG_STM32_SPI3
int stm32_spi3cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
{
return OK;
}
#endif
#endif /* CONFIG_SPI_CMDDATA */
#endif /* CONFIG_STM32_SPI1 || CONFIG_STM32_SPI2 || CONFIG_STM32_SPI3 */

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/****************************************************************************
* configs/stm32l476vg-disco/src/stm32_userleds.c
*
* Copyright (C) 2014-2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include <debug.h>
#include <arch/board/board.h>
#include <nuttx/power/pm.h>
#include "chip.h"
#include "up_arch.h"
#include "up_internal.h"
#include "stm32l4.h"
#include "stm32l476vg-disco.h"
#ifndef CONFIG_ARCH_LEDS
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
* with CONFIG_DEBUG_VERBOSE too)
*/
#ifdef CONFIG_DEBUG_LEDS
# define leddbg lldbg
# define ledvdbg llvdbg
#else
# define leddbg(x...)
# define ledvdbg(x...)
#endif
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
/* LED Power Management */
#ifdef CONFIG_PM
static void led_pm_notify(struct pm_callback_s *cb, enum pm_state_e pmstate);
static int led_pm_prepare(struct pm_callback_s *cb, enum pm_state_e pmstate);
#endif
/****************************************************************************
* Private Data
****************************************************************************/
#ifdef CONFIG_PM
static struct pm_callback_s g_ledscb =
{
.notify = led_pm_notify,
.prepare = led_pm_prepare,
};
#endif
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: led_pm_notify
*
* Description:
* Notify the driver of new power state. This callback is called after
* all drivers have had the opportunity to prepare for the new power state.
*
****************************************************************************/
#ifdef CONFIG_PM
static void led_pm_notify(struct pm_callback_s *cb , enum pm_state_e pmstate)
{
switch (pmstate)
{
case(PM_NORMAL):
{
/* Restore normal LEDs operation */
//stm32l4_gpiowrite(GPIO_LED_RED, (ledset & BOARD_LED_RED_BIT) != 0);
//stm32l4_gpiowrite(GPIO_LED_GRN, (ledset & BOARD_LED_GRN_BIT) != 0);
}
break;
case(PM_IDLE):
{
/* Entering IDLE mode - Turn leds off */
stm32l4_gpiowrite(GPIO_LED_RED, 0);
stm32l4_gpiowrite(GPIO_LED_GRN, 0);
}
break;
case(PM_STANDBY):
{
/* Entering STANDBY mode - Logic for PM_STANDBY goes here */
stm32l4_gpiowrite(GPIO_LED_RED, 0);
stm32l4_gpiowrite(GPIO_LED_GRN, 0);
}
break;
case(PM_SLEEP):
{
/* Entering SLEEP mode - Logic for PM_SLEEP goes here */
stm32l4_gpiowrite(GPIO_LED_RED, 0);
stm32l4_gpiowrite(GPIO_LED_GRN, 0);
}
break;
default:
{
/* Should not get here */
}
break;
}
}
#endif
/****************************************************************************
* Name: led_pm_prepare
*
* Description:
* Request the driver to prepare for a new power state. This is a warning
* that the system is about to enter into a new power state. The driver
* should begin whatever operations that may be required to enter power
* state. The driver may abort the state change mode by returning a
* non-zero value from the callback function.
*
****************************************************************************/
#ifdef CONFIG_PM
static int led_pm_prepare(struct pm_callback_s *cb , enum pm_state_e pmstate)
{
/* No preparation to change power modes is required by the LEDs driver.
* We always accept the state change by returning OK.
*/
return OK;
}
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_userled_initialize
****************************************************************************/
void board_userled_initialize(void)
{
/* Configure LD4,5 GPIO for output */
stm32l4_configgpio(GPIO_LED_RED);
stm32l4_configgpio(GPIO_LED_GRN);
}
/****************************************************************************
* Name: board_userled
****************************************************************************/
void board_userled(int led, bool ledon)
{
switch ( led )
{
case BOARD_LED_RED:
stm32l4_gpiowrite(GPIO_LED_RED, ldeon);
break;
case BOARD_LED_GRN:
stm32l4_gpiowrite(GPIO_LED_GRN, ldeon);
break;
}
}
/****************************************************************************
* Name: board_userled_all
****************************************************************************/
void board_userled_all(uint8_t ledset)
{
stm32l4_gpiowrite(GPIO_LED_RED, (ledset & BOARD_LED_RED_BIT) != 0);
stm32l4_gpiowrite(GPIO_LED_GRN, (ledset & BOARD_LED_GRN_BIT) != 0);
}
/****************************************************************************
* Name: stm32_led_pminitialize
****************************************************************************/
#ifdef CONFIG_PM
void stm32_led_pminitialize(void)
{
/* Register to receive power management callbacks */
int ret = pm_register(&g_ledscb);
DEBUGASSERT(ret == OK);
UNUSED(ret);
}
#endif /* CONFIG_PM */
#endif /* !CONFIG_ARCH_LEDS */

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/************************************************************************************
* configs/stm32l476vg-disco/src/stm32l476vg-disco.h
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Authors: Frank Bennett
* Gregory Nutt <gnutt@nuttx.org>
* Sebastien Lorquet <sebastien@lorquet.fr>
* dev@ziggurat29.com
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
#ifndef __CONFIGS_STM32L476VG_DISCO_SRC_STM32L476VG_DISCO_H
#define __CONFIGS_STM32L476VG_DISCO_SRC_STM32L476VG_DISCO_H
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <nuttx/compiler.h>
#include <stdint.h>
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* Configuration ********************************************************************/
/* LED.
* LD4: the red LED on PB2
* LD5: the green LED on PE8
*
* - When the I/O is HIGH value, the LED is on.
* - When the I/O is LOW, the LED is off.
*/
#define GPIO_LED_RED \
(GPIO_PORTB | GPIO_PIN2 | GPIO_OUTPUT_CLEAR | GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_PULLUP | \
GPIO_SPEED_50MHz)
#define GPIO_LED_GRN \
(GPIO_PORTE | GPIO_PIN8 | GPIO_OUTPUT_CLEAR | GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_PULLUP | \
GPIO_SPEED_50MHz)
/* Buttons
*
* There is a 4 way d-pad 'joystick' with center button
* connected to PA0,1,5,2,3
* C L D R U
*/
#define MIN_IRQBUTTON BUTTON_CENTER
#define MAX_IRQBUTTON BUTTON_UP
#define NUM_IRQBUTTONS 5
#define GPIO_BTN_CENTER \
(GPIO_INPUT |GPIO_PULLDOWN |GPIO_EXTI | GPIO_PORTA | GPIO_PIN0)
#define GPIO_BTN_LEFT \
(GPIO_INPUT |GPIO_PULLDOWN |GPIO_EXTI | GPIO_PORTA | GPIO_PIN1)
#define GPIO_BTN_DOWN \
(GPIO_INPUT |GPIO_PULLDOWN |GPIO_EXTI | GPIO_PORTA | GPIO_PIN5)
#define GPIO_BTN_RIGHT \
(GPIO_INPUT |GPIO_PULLDOWN |GPIO_EXTI | GPIO_PORTA | GPIO_PIN2)
#define GPIO_BTN_UP \
(GPIO_INPUT |GPIO_PULLDOWN |GPIO_EXTI | GPIO_PORTA | GPIO_PIN3)
/* SPI1 off */
/* XXX is this used on disco? */
#define GPIO_SPI1_MOSI_OFF (GPIO_INPUT | GPIO_PULLDOWN | \
GPIO_PORTE | GPIO_PIN15)
#define GPIO_SPI1_MISO_OFF (GPIO_INPUT | GPIO_PULLDOWN | \
GPIO_PORTE | GPIO_PIN14)
#define GPIO_SPI1_SCK_OFF (GPIO_INPUT | GPIO_PULLDOWN | \
GPIO_PORTE | GPIO_PIN13)
#define GPIO_SPI1_NSS_OFF (GPIO_INPUT | GPIO_PULLDOWN | \
GPIO_PORTE | GPIO_PIN12)
/* Devices on the onboard I2C bus.
*
* Note that these are unshifted addresses.
*/
/* XXX IS this 'unshifted'? */
#define NUCLEO_I2C_OBDEV_CS43L22 0x94
/************************************************************************************
* Public Data
************************************************************************************/
/* Global driver instances */
#ifdef CONFIG_STM32_SPI1
extern struct spi_dev_s *g_spi1;
#endif
#ifdef CONFIG_STM32_SPI2
extern struct spi_dev_s *g_spi2;
#endif
/************************************************************************************
* Public Functions
************************************************************************************/
/************************************************************************************
* Name: stm32_spiinitialize
*
* Description:
* Called to configure SPI chip select GPIO pins.
*
************************************************************************************/
void stm32_spiinitialize(void);
/************************************************************************************
* Name: stm32_usbinitialize
*
* Description:
* Called to setup USB-related GPIO pins.
*
************************************************************************************/
void stm32_usbinitialize(void);
/************************************************************************************
* Name: board_adc_initialize
*
* Description:
* Initialize and register the ADC driver(s)
*
************************************************************************************/
#ifdef CONFIG_ADC
int board_adc_initialize(void);
#endif
#endif /* __CONFIGS_STM32L476VG_DISCO_SRC_STM32L476VG_DISCO_H */