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arch/xtensa/esp32s3: initial effort to get BLE running on ESP32-S3

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Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
This commit is contained in:
Petro Karashchenko 2023-06-09 18:59:55 +03:00 committed by Alan Carvalho de Assis
parent 33f03fc98c
commit 655d00b1e7
24 changed files with 4053 additions and 263 deletions
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7
arch/xtensa/include/esp32s3/irq.h
View file

@ -208,8 +208,8 @@
#define ESP32S3_IRQ_PWR (XTENSA_IRQ_FIRSTPERIPH + ESP32S3_PERIPH_PWR)
#define ESP32S3_IRQ_BB (XTENSA_IRQ_FIRSTPERIPH + ESP32S3_PERIPH_BB)
#define ESP32S3_IRQ_BT_MAC (XTENSA_IRQ_FIRSTPERIPH + ESP32S3_PERIPH_BT_MAC)
#define ESP32S3_IRQ_BT_BB (XTENSA_IRQ_FIRSTPERIPH + ESP32S3_PERIPH_BB)
#define ESP32S3_IRQ_BT_BB_NMI (XTENSA_IRQ_FIRSTPERIPH + ESP32S3_PERIPH_BB_NMI)
#define ESP32S3_IRQ_BT_BB (XTENSA_IRQ_FIRSTPERIPH + ESP32S3_PERIPH_BT_BB)
#define ESP32S3_IRQ_BT_BB_NMI (XTENSA_IRQ_FIRSTPERIPH + ESP32S3_PERIPH_BT_BB_NMI)
#define ESP32S3_IRQ_RWBT (XTENSA_IRQ_FIRSTPERIPH + ESP32S3_PERIPH_RWBT)
#define ESP32S3_IRQ_RWBLE (XTENSA_IRQ_FIRSTPERIPH + ESP32S3_PERIPH_RWBLE)
#define ESP32S3_IRQ_RWBT_NMI (XTENSA_IRQ_FIRSTPERIPH + ESP32S3_PERIPH_RWBT_NMI)
@ -446,9 +446,10 @@
#define ESP32S3_CPUINT_NMISET 0x00004000
#define ESP32S3_CPUINT_MAC 0
#define ESP32S3_CPUINT_MAC_NMI 1
#define ESP32S3_CPUINT_RWBLE 5
#define ESP32S3_CPUINT_TIMER0 6
#define ESP32S3_CPUINT_SOFTWARE0 7
#define ESP32S3_CPUINT_BT_BB 8
#define ESP32S3_CPUINT_PROFILING 11
#define ESP32S3_CPUINT_TIMER1 15
#define ESP32S3_CPUINT_TIMER2 16

30
arch/xtensa/src/esp32s3/Kconfig
View file

@ -363,6 +363,13 @@ config ESP32S3_WIFI
---help---
Enable Wi-Fi support
config ESP32S3_BLE
bool "BLE"
default n
select ESP32S3_WIRELESS
---help---
Enable BLE support
config ESP32S3_I2C0
bool "I2C 0"
default n
@ -463,6 +470,11 @@ config ESP32S3_WCL
endmenu # ESP32-S3 Peripheral Selection
menuconfig ESP32S3_WIFI_BT_COEXIST
bool "Wi-Fi and BT coexist"
default n
depends on ESP32S3_WIFI && ESP32S3_BLE
menu "SPI RAM Configuration"
depends on ESP32S3_SPIRAM
@ -951,6 +963,24 @@ config EXAMPLE_WIFI_LISTEN_INTERVAL
endmenu # ESP32S3_WIFI
menu "BLE Configuration"
depends on ESP32S3_BLE
config ESP32S3_BLE_TTY_NAME
string "BLE TTY device name"
default "/dev/ttyHCI0"
depends on UART_BTH4
config ESP32S3_BLE_TASK_STACK_SIZE
int "Controller task stack size"
default 4096
config ESP32S3_BLE_TASK_PRIORITY
int "Controller task priority"
default 253
endmenu # BLE Configuration
menu "Timer/Counter Configuration"
depends on ESP32S3_TIMER

3
arch/xtensa/src/esp32s3/Make.defs
View file

@ -149,9 +149,8 @@ ifeq ($(CONFIG_ESP32S3_WIRELESS),y)
include chip/Wireless.mk
endif
ifeq ($(CONFIG_ESP32S3_RTC),y)
CHIP_CSRCS += esp32s3_rtc.c
ifeq ($(CONFIG_RTC_DRIVER),y)
CHIP_CSRCS += esp32s3_rtc_lowerhalf.c
endif
endif

14
arch/xtensa/src/esp32s3/Wireless.mk
View file

@ -21,7 +21,7 @@
ESP_HAL_3RDPARTY_REPO = esp-hal-3rdparty
ESP_HAL_3RDPARTY_PATH = $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)
ifndef ESP_HAL_3RDPARTY_VERSION
ESP_HAL_3RDPARTY_VERSION = 2c8e45665ea37dfe3c7b6206cc2b53701eb7dcde
ESP_HAL_3RDPARTY_VERSION = 8758b1e760f17af5867405a6711aad3e4722b317
endif
ifndef ESP_HAL_3RDPARTY_URL
@ -40,7 +40,7 @@ CFLAGS += -Wno-undef -Wno-unused-variable
context:: chip/$(ESP_HAL_3RDPARTY_REPO)
$(Q) echo "Espressif HAL for 3rd Party Platforms: initializing submodules..."
$(Q) git -C chip/$(ESP_HAL_3RDPARTY_REPO) submodule --quiet update --init --depth=1 components/mbedtls/mbedtls components/esp_phy/lib components/esp_wifi/lib
$(Q) git -C chip/$(ESP_HAL_3RDPARTY_REPO) submodule --quiet update --init --depth=1 components/mbedtls/mbedtls components/esp_phy/lib components/esp_wifi/lib components/bt/controller/lib_esp32c3_family components/esp_coex/lib
$(Q) git -C chip/$(ESP_HAL_3RDPARTY_REPO)/components/mbedtls/mbedtls reset --quiet --hard
$(Q) echo "Applying patches..."
$(Q) cd chip/$(ESP_HAL_3RDPARTY_REPO)/components/mbedtls/mbedtls && git apply ../../../nuttx/patches/components/mbedtls/mbedtls/*.patch
@ -49,6 +49,7 @@ distclean::
$(call DELDIR, chip/$(ESP_HAL_3RDPARTY_REPO))
INCLUDES += ${INCDIR_PREFIX}$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_common$(DELIM)include
INCLUDES += ${INCDIR_PREFIX}$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bt$(DELIM)include$(DELIM)esp32c3$(DELIM)include
INCLUDES += ${INCDIR_PREFIX}$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_event$(DELIM)include
INCLUDES += ${INCDIR_PREFIX}$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)include
INCLUDES += ${INCDIR_PREFIX}$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_phy$(DELIM)esp32s3$(DELIM)include
@ -65,13 +66,20 @@ INCLUDES += ${INCDIR_PREFIX}$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY
EXTRA_LIBPATHS += -L $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_phy$(DELIM)lib$(DELIM)esp32s3
EXTRA_LIBPATHS += -L $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_wifi$(DELIM)lib$(DELIM)esp32s3
EXTRA_LIBPATHS += -L $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bt$(DELIM)controller$(DELIM)lib_esp32c3_family$(DELIM)esp32s3
EXTRA_LIBPATHS += -L $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_coex$(DELIM)lib$(DELIM)esp32s3
EXTRA_LIBS += -lphy
EXTRA_LIBS += -lphy -lcoexist
# Wireless interfaces.
CHIP_CSRCS += esp32s3_wireless.c
ifeq ($(CONFIG_ESP32S3_BLE),y)
CHIP_CSRCS += esp32s3_ble_adapter.c esp32s3_ble.c
EXTRA_LIBS += -lbtbb -lbtdm_app
endif
ifeq ($(CONFIG_ESP32S3_WIFI),y)
CHIP_CSRCS += esp32s3_wlan.c esp32s3_wifi_utils.c esp32s3_wifi_adapter.c
EXTRA_LIBS += -lcore -lnet80211 -lpp

325
arch/xtensa/src/esp32s3/esp32s3_ble.c Normal file
View file

@ -0,0 +1,325 @@
/****************************************************************************
* arch/xtensa/src/esp32s3/esp32s3_ble.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <sys/types.h>
#include <sys/socket.h>
#include <stdbool.h>
#include <stdio.h>
#include <string.h>
#include <unistd.h>
#include <errno.h>
#include <debug.h>
#include <nuttx/nuttx.h>
#include <nuttx/kmalloc.h>
#include <nuttx/wqueue.h>
#include <nuttx/net/bluetooth.h>
#include <nuttx/wireless/bluetooth/bt_driver.h>
#include <nuttx/wireless/bluetooth/bt_uart.h>
#if defined(CONFIG_UART_BTH4)
# include <nuttx/serial/uart_bth4.h>
#endif
#include "esp32s3_ble_adapter.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* BLE packet buffer max size */
#define BLE_BUF_SIZE 1024
/****************************************************************************
* Private Types
****************************************************************************/
struct esp32s3_ble_priv_s
{
struct bt_driver_s drv; /* NuttX BT/BLE driver data */
};
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
static int esp32s3_ble_open(struct bt_driver_s *drv);
static int esp32s3_ble_send(struct bt_driver_s *drv,
enum bt_buf_type_e type,
void *data, size_t len);
static void esp32s3_ble_close(struct bt_driver_s *drv);
static void esp32s3_ble_send_ready(void);
static int esp32s3_ble_recv_cb(uint8_t *data, uint16_t len);
/****************************************************************************
* Private Data
****************************************************************************/
static struct esp32s3_ble_priv_s g_ble_priv =
{
.drv =
{
.head_reserve = H4_HEADER_SIZE,
.open = esp32s3_ble_open,
.send = esp32s3_ble_send,
.close = esp32s3_ble_close
}
};
static esp_vhci_host_callback_t vhci_host_cb =
{
.notify_host_send_available = esp32s3_ble_send_ready,
.notify_host_recv = esp32s3_ble_recv_cb
};
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: esp32s3_ble_send_ready
*
* Description:
* If the controller could send HCI comand will callback this function.
*
* Input Parameters:
* None
*
* Returned Value:
* None
*
****************************************************************************/
static void esp32s3_ble_send_ready(void)
{
}
/****************************************************************************
* Name: esp32s3_ble_recv_cb
*
* Description:
* BLE receive callback function when BLE hardware receive packet
*
* Input Parameters:
* data - BLE packet data pointer
* len - BLE packet length
*
* Returned Value:
* 0 on success or a negated value on failure.
*
****************************************************************************/
static int esp32s3_ble_recv_cb(uint8_t *data, uint16_t len)
{
int ret;
bool valid = true;
enum bt_buf_type_e type;
struct esp32s3_ble_priv_s *priv = &g_ble_priv;
switch (data[0])
{
case H4_EVT:
type = BT_EVT;
break;
case H4_ACL:
type = BT_ACL_IN;
break;
case H4_ISO:
type = BT_ISO_IN;
break;
default:
valid = false;
break;
}
if (!valid)
{
ret = ERROR;
}
else
{
/* send packet to host */
ret = bt_netdev_receive(&priv->drv, type,
&data[H4_HEADER_SIZE],
len - H4_HEADER_SIZE);
if (ret < 0)
{
wlerr("Failed to receive ret=%d\n", ret);
}
}
return ret;
}
/****************************************************************************
* Name: esp32s3_ble_send
*
* Description:
* ESP32-S3 BLE send callback function for BT driver.
*
* Input Parameters:
* drv - BT driver pointer
* type - BT packet type
* data - BT packet data buffer pointer
* len - BT packet length
*
* Returned Value:
* Sent bytes on success or a negated value on failure.
*
****************************************************************************/
static int esp32s3_ble_send(struct bt_driver_s *drv,
enum bt_buf_type_e type,
void *data, size_t len)
{
uint8_t *hdr = (uint8_t *)data - drv->head_reserve;
if ((len + H4_HEADER_SIZE) > BLE_BUF_SIZE)
{
return -EINVAL;
}
if (type == BT_CMD)
{
*hdr = H4_CMD;
}
else if (type == BT_ACL_OUT)
{
*hdr = H4_ACL;
}
else if (type == BT_ISO_OUT)
{
*hdr = H4_ISO;
}
else
{
return -EINVAL;
}
if (esp32s3_vhci_host_check_send_available())
{
esp32s3_vhci_host_send_packet(hdr, len + drv->head_reserve);
}
return len;
}
/****************************************************************************
* Name: esp32s3_ble_close
*
* Description:
* ESP32-C3 BLE close callback function for BT driver.
*
* Input Parameters:
* drv - BT driver pointer
*
* Returned Value:
* None
*
****************************************************************************/
static void esp32s3_ble_close(struct bt_driver_s *drv)
{
}
/****************************************************************************
* Name: esp32s3_ble_open
*
* Description:
* ESP32-C3 BLE open callback function for BT driver.
*
* Input Parameters:
* drv - BT driver pointer
*
* Returned Value:
* OK
*
****************************************************************************/
static int esp32s3_ble_open(struct bt_driver_s *drv)
{
return OK;
}
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: esp32s3_ble_initialize
*
* Description:
* Init BT controller
*
* Input Parameters:
* None
*
* Returned Value:
* OK on success or a negated value on failure.
*
****************************************************************************/
int esp32s3_ble_initialize(void)
{
int ret;
ret = esp32s3_bt_controller_init();
if (ret)
{
wlerr("Failed to initialize BLE ret=%d\n", ret);
return ERROR;
}
ret = esp32s3_bt_controller_enable(ESP_BT_MODE_BLE);
if (ret)
{
wlerr("Failed to Enable BLE ret=%d\n", ret);
return ERROR;
}
ret = esp32s3_vhci_register_callback(&vhci_host_cb);
if (ret)
{
wlerr("Failed to register BLE callback ret=%d\n", ret);
return ERROR;
}
#if defined(CONFIG_UART_BTH4)
ret = uart_bth4_register(CONFIG_ESP32S3_BLE_TTY_NAME, &g_ble_priv.drv);
#else
ret = bt_netdev_register(&g_ble_priv.drv);
#endif
if (ret < 0)
{
wlerr("bt_netdev_register or uart_bth4_register error: %d\n", ret);
return ret;
}
return OK;
}

50
arch/xtensa/src/esp32s3/esp32s3_ble.h Normal file
View file

@ -0,0 +1,50 @@
/****************************************************************************
* arch/xtensa/src/esp32s3/esp32s3_ble.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_XTENSA_SRC_ESP32S3_ESP32S3_BLE_H
#define __ARCH_XTENSA_SRC_ESP32S3_ESP32S3_BLE_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
/****************************************************************************
* Name: esp32s3_ble_initialize
*
* Description:
* Init BT controller
*
* Input Parameters:
* None
*
* Returned Value:
* success or fail
*
****************************************************************************/
int esp32s3_ble_initialize(void);
#endif /* __ARCH_XTENSA_SRC_ESP32S3_ESP32S3_BLE_H */

2686
arch/xtensa/src/esp32s3/esp32s3_ble_adapter.c Normal file
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File diff suppressed because it is too large Load diff

175
arch/xtensa/src/esp32s3/esp32s3_ble_adapter.h Normal file
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@ -0,0 +1,175 @@
/****************************************************************************
* arch/xtensa/src/esp32s3/esp32s3_ble_adapter.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_XTENSA_SRC_ESP32S3_ESP32S3_BLE_ADAPTER_H
#define __ARCH_XTENSA_SRC_ESP32S3_ESP32S3_BLE_ADAPTER_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include "esp_bt.h"
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
/****************************************************************************
* Name: esp32s3_bt_controller_init
*
* Description:
* Init BT controller.
*
* Input Parameters:
* None
*
* Returned Value:
* Zero (OK) is returned on success. A negated errno value is returned
* on failure.
*
****************************************************************************/
int esp32s3_bt_controller_init(void);
/****************************************************************************
* Name: esp32s3_bt_controller_deinit
*
* Description:
* Deinit BT controller.
*
* Input Parameters:
* None
*
* Returned Value:
* Zero (OK) is returned on success. Otherwise, -1 (ERROR) is returned.
*
****************************************************************************/
int esp32s3_bt_controller_deinit(void);
/****************************************************************************
* Name: esp32s3_bt_controller_enable
*
* Description:
* Enable BT controller.
*
* Input Parameters:
* mode - the mode(BLE/BT/BTDM) to enable. For compatible of API, retain
* this argument. This mode must be equal as the mode in "cfg" of
* esp_bt_controller_init().
*
* Returned Value:
* Zero (OK) is returned on success. A negated errno value is returned
* on failure.
*
****************************************************************************/
int esp32s3_bt_controller_enable(esp_bt_mode_t mode);
/****************************************************************************
* Name: esp32s3_bt_controller_disable
*
* Description:
* Disable BT controller.
*
* Input Parameters:
* None
*
* Returned Value:
* Zero (OK) is returned on success. A negated errno value is returned
* on failure.
*
****************************************************************************/
int esp32s3_bt_controller_disable(void);
/****************************************************************************
* Name: esp32s3_bt_controller_enable
*
* Description:
* Enable BT controller.
*
* Input Parameters:
* mode - the mode(BLE/BT/BTDM) to enable. For compatible of API, retain
* this argument. This mode must be equal as the mode in "cfg" of
* esp_bt_controller_init().
*
* Returned Value:
* Zero (OK) is returned on success. A negated errno value is returned
* on failure.
*
****************************************************************************/
esp_bt_controller_status_t esp32s3_bt_controller_get_status(void);
/****************************************************************************
* Name: esp32s3_vhci_host_check_send_available
*
* Description:
* Check if the host can send packet to controller or not.
*
* Input Parameters:
* None
*
* Returned Value:
* bool - true or false
*
****************************************************************************/
bool esp32s3_vhci_host_check_send_available(void);
/****************************************************************************
* Name: esp32s3_vhci_host_send_packet
*
* Description:
* Host send packet to controller.
*
* Input Parameters:
* data - the packet pointer
* len - the packet length
*
* Returned Value:
* None
*
****************************************************************************/
void esp32s3_vhci_host_send_packet(uint8_t *data, uint16_t len);
/****************************************************************************
* Name: esp32s3_vhci_register_callback
*
* Description:
* Register the vhci reference callback.
*
* Input Parameters:
* callback - struct defined by vhci_host_callback structure.
*
* Returned Value:
* status - success or fail
*
****************************************************************************/
int esp32s3_vhci_register_callback(const esp_vhci_host_callback_t *callback);
#endif /* __ARCH_XTENSA_SRC_ESP32S3_ESP32S3_BLE_ADAPTER_H */

23
arch/xtensa/src/esp32s3/esp32s3_irq.c
View file

@ -113,6 +113,13 @@
# define ESP32S3_WIFI_RESERVE_INT 0
#endif
#ifdef CONFIG_ESP32S3_BLE
# define ESP32S3_BLE_RESERVE_INT ((1 << ESP32S3_CPUINT_BT_BB) | \
(1 << ESP32S3_CPUINT_RWBLE))
#else
# define ESP32S3_BLE_RESERVE_INT 0
#endif
/****************************************************************************
* Public Data
****************************************************************************/
@ -159,7 +166,8 @@ static uint32_t g_intenable[CONFIG_SMP_NCPUS];
*/
static uint32_t g_cpu0_freeints = ESP32S3_CPUINT_PERIPHSET &
~ESP32S3_WIFI_RESERVE_INT;
~(ESP32S3_WIFI_RESERVE_INT |
ESP32S3_BLE_RESERVE_INT);
#ifdef CONFIG_SMP
static uint32_t g_cpu1_freeints = ESP32S3_CPUINT_PERIPHSET;
@ -409,6 +417,7 @@ static void esp32s3_free_cpuint(int cpuint)
void up_irqinitialize(void)
{
int i;
for (i = 0; i < NR_IRQS; i++)
{
g_irqmap[i] = IRQ_UNMAPPED;
@ -424,6 +433,11 @@ void up_irqinitialize(void)
g_irqmap[ESP32S3_IRQ_MAC] = IRQ_MKMAP(0, ESP32S3_CPUINT_MAC);
#endif
#ifdef CONFIG_ESP32S3_BLE
g_irqmap[ESP32S3_IRQ_BT_BB] = IRQ_MKMAP(0, ESP32S3_CPUINT_BT_BB);
g_irqmap[ESP32S3_IRQ_RWBLE] = IRQ_MKMAP(0, ESP32S3_CPUINT_RWBLE);
#endif
/* Initialize CPU interrupts */
esp32s3_cpuint_initialize();
@ -435,6 +449,13 @@ void up_irqinitialize(void)
xtensa_enable_cpuint(&g_intenable[0], 1 << ESP32S3_CPUINT_MAC);
#endif
#ifdef CONFIG_ESP32S3_BLE
g_cpu0_intmap[ESP32S3_CPUINT_BT_BB] = CPUINT_ASSIGN(ESP32S3_IRQ_BT_BB);
g_cpu0_intmap[ESP32S3_CPUINT_RWBLE] = CPUINT_ASSIGN(ESP32S3_IRQ_RWBLE);
xtensa_enable_cpuint(&g_intenable[0], 1 << ESP32S3_CPUINT_BT_BB);
xtensa_enable_cpuint(&g_intenable[0], 1 << ESP32S3_CPUINT_RWBLE);
#endif
#ifdef CONFIG_SMP
/* Attach and enable the inter-CPU interrupt */

156
arch/xtensa/src/esp32s3/esp32s3_wifi_adapter.c
View file

@ -543,7 +543,7 @@ static inline int32_t osi_errno_trans(int ret)
}
/****************************************************************************
* Name: osi_errno_trans
* Name: wifi_errno_trans
*
* Description:
* Transform from ESP Wi-Fi error code to NuttX error code
@ -4035,137 +4035,6 @@ int esp_mesh_send_event_internal(int32_t event_id,
* Functions needed by libwpa_supplicant.a
****************************************************************************/
/****************************************************************************
* Name: esp_timer_create
*
* Description:
* Create timer with given arguments
*
* Input Parameters:
* create_args - Timer arguments data pointer
* out_handle - Timer handle pointer
*
* Returned Value:
* 0 if success or -1 if fail
*
****************************************************************************/
int32_t esp_timer_create(const esp_timer_create_args_t *create_args,
esp_timer_handle_t *out_handle)
{
int ret;
struct rt_timer_args_s rt_timer_args;
struct rt_timer_s *rt_timer;
rt_timer_args.arg = create_args->arg;
rt_timer_args.callback = create_args->callback;
ret = esp32s3_rt_timer_create(&rt_timer_args, &rt_timer);
if (ret)
{
wlerr("Failed to create rt_timer error=%d\n", ret);
return ret;
}
*out_handle = (esp_timer_handle_t)rt_timer;
return 0;
}
/****************************************************************************
* Name: esp_timer_start_once
*
* Description:
* Start timer with one shot mode
*
* Input Parameters:
* timer - Timer handle pointer
* timeout_us - Timeout value by micro second
*
* Returned Value:
* 0 if success or -1 if fail
*
****************************************************************************/
int32_t esp_timer_start_once(esp_timer_handle_t timer, uint64_t timeout_us)
{
struct rt_timer_s *rt_timer = (struct rt_timer_s *)timer;
esp32s3_rt_timer_start(rt_timer, timeout_us, false);
return 0;
}
/****************************************************************************
* Name: esp_timer_start_periodic
*
* Description:
* Start timer with periodic mode
*
* Input Parameters:
* timer - Timer handle pointer
* period - Timeout value by micro second
*
* Returned Value:
* 0 if success or -1 if fail
*
****************************************************************************/
int32_t esp_timer_start_periodic(esp_timer_handle_t timer, uint64_t period)
{
struct rt_timer_s *rt_timer = (struct rt_timer_s *)timer;
esp32s3_rt_timer_start(rt_timer, period, true);
return 0;
}
/****************************************************************************
* Name: esp_timer_stop
*
* Description:
* Stop timer
*
* Input Parameters:
* timer - Timer handle pointer
*
* Returned Value:
* 0 if success or -1 if fail
*
****************************************************************************/
int32_t esp_timer_stop(esp_timer_handle_t timer)
{
struct rt_timer_s *rt_timer = (struct rt_timer_s *)timer;
esp32s3_rt_timer_stop(rt_timer);
return 0;
}
/****************************************************************************
* Name: esp_timer_delete
*
* Description:
* Delete timer and free resource
*
* Input Parameters:
* timer - Timer handle pointer
*
* Returned Value:
* 0 if success or -1 if fail
*
****************************************************************************/
int32_t esp_timer_delete(esp_timer_handle_t timer)
{
struct rt_timer_s *rt_timer = (struct rt_timer_s *)timer;
esp32s3_rt_timer_delete(rt_timer);
return 0;
}
/****************************************************************************
* Public Functions
****************************************************************************/
@ -6478,6 +6347,29 @@ int esp_wifi_softap_rssi(struct iwreq *iwr, bool set)
#endif /* ESP32S3_WLAN_HAS_SOFTAP */
/****************************************************************************
* Name: esp32s3_wifi_bt_coexist_init
*
* Description:
* Initialize ESP32-S3 Wi-Fi and BT coexistance module.
*
* Input Parameters:
* None
*
* Returned Value:
* OK on success (positive non-zero values are cmd-specific)
* Negated errno returned on failure.
*
****************************************************************************/
#ifdef CONFIG_ESP32S3_WIFI_BT_COEXIST
int esp32s3_wifi_bt_coexist_init(void)
{
#error "BT and WiFi coexst not implemented!!!"
return ERROR;
}
#endif
/****************************************************************************
* Name: esp_wifi_stop_callback
*

19
arch/xtensa/src/esp32s3/esp32s3_wifi_adapter.h
View file

@ -824,6 +824,25 @@ int esp_wifi_softap_country(struct iwreq *iwr, bool set);
int esp_wifi_softap_rssi(struct iwreq *iwr, bool set);
#endif /* ESP32S3_WLAN_HAS_SOFTAP */
/****************************************************************************
* Name: esp32s3_wifi_bt_coexist_init
*
* Description:
* Initialize ESP32-C3 Wi-Fi and BT coexistance module.
*
* Input Parameters:
* None
*
* Returned Value:
* OK on success (positive non-zero values are cmd-specific)
* Negated errno returned on failure.
*
****************************************************************************/
#ifdef CONFIG_ESP32S3_WIFI_BT_COEXIST
int esp32s3_wifi_bt_coexist_init(void);
#endif
/****************************************************************************
* Name: esp_wifi_stop_callback
*

260
arch/xtensa/src/esp32s3/esp32s3_wireless.c
View file

@ -29,13 +29,17 @@
#include <assert.h>
#include "xtensa.h"
#include "hardware/esp32s3_rtccntl.h"
#include "hardware/esp32s3_soc.h"
#include "hardware/esp32s3_syscon.h"
#include "hardware/esp32s3_efuse.h"
#include "esp32s3_wireless.h"
#include "esp32s3_periph.h"
#include "esp_phy_init.h"
#include "phy_init_data.h"
#include "esp32s3_wireless.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
@ -54,6 +58,7 @@ static inline void phy_digital_regs_load(void);
* Extern Functions declaration
****************************************************************************/
extern void coex_pti_v2(void);
extern uint8_t esp_crc8(const uint8_t *p, uint32_t len);
extern void phy_wakeup_init(void);
extern void phy_close_rf(void);
@ -82,6 +87,10 @@ static uint32_t *g_phy_digital_regs_mem = NULL;
static bool g_is_phy_calibrated = false;
/* Reference count of power on of wifi and bt power domain */
static uint8_t g_wifi_bt_pd_controller;
/****************************************************************************
* Private Functions
****************************************************************************/
@ -191,21 +200,9 @@ int phy_printf(const char *format, ...)
*
****************************************************************************/
void esp32s3_phy_enable_clock(void)
void IRAM_ATTR esp32s3_phy_enable_clock(void)
{
irqstate_t flags;
flags = enter_critical_section();
if (g_phy_clk_en_cnt == 0)
{
modifyreg32(SYSTEM_WIFI_CLK_EN_REG, 0,
SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M);
}
g_phy_clk_en_cnt++;
leave_critical_section(flags);
esp32s3_periph_wifi_bt_common_module_enable();
}
/****************************************************************************
@ -222,24 +219,9 @@ void esp32s3_phy_enable_clock(void)
*
****************************************************************************/
void esp32s3_phy_disable_clock(void)
void IRAM_ATTR esp32s3_phy_disable_clock(void)
{
irqstate_t flags;
flags = enter_critical_section();
if (g_phy_clk_en_cnt > 0)
{
g_phy_clk_en_cnt--;
if (g_phy_clk_en_cnt == 0)
{
modifyreg32(SYSTEM_WIFI_CLK_EN_REG,
SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M,
0);
}
}
leave_critical_section(flags);
esp32s3_periph_wifi_bt_common_module_disable();
}
/****************************************************************************
@ -348,6 +330,8 @@ void esp32s3_phy_disable(void)
if (g_phy_access_ref == 0)
{
phy_digital_regs_store();
/* Disable PHY and RF. */
phy_close_rf();
@ -385,6 +369,7 @@ void esp32s3_phy_enable(void)
static bool debug = false;
irqstate_t flags;
esp_phy_calibration_data_t *cal_data;
if (debug == false)
{
char *phy_version = get_phy_version_str();
@ -392,13 +377,6 @@ void esp32s3_phy_enable(void)
debug = true;
}
cal_data = kmm_zalloc(sizeof(esp_phy_calibration_data_t));
if (!cal_data)
{
wlerr("ERROR: Failed to allocate PHY calibration data buffer.");
abort();
}
flags = enter_critical_section();
if (g_phy_access_ref == 0)
@ -407,12 +385,21 @@ void esp32s3_phy_enable(void)
if (g_is_phy_calibrated == false)
{
cal_data = kmm_zalloc(sizeof(esp_phy_calibration_data_t));
if (cal_data == NULL)
{
wlerr("ERROR: Failed to allocate PHY"
"calibration data buffer.");
abort();
}
#if CONFIG_ESP_PHY_ENABLE_USB
phy_bbpll_en_usb(true);
#endif
wlinfo("calibrating");
register_chipv7_phy(&phy_init_data, cal_data, PHY_RF_CAL_FULL);
g_is_phy_calibrated = true;
kmm_free(cal_data);
}
else
{
@ -422,6 +409,199 @@ void esp32s3_phy_enable(void)
}
g_phy_access_ref++;
leave_critical_section(flags);
kmm_free(cal_data);
}
/****************************************************************************
* Name: esp_wifi_bt_power_domain_on
*
* Description:
* Initialize Bluetooth and Wi-Fi power domain
*
* Input Parameters:
* None
*
* Returned Value:
* None
*
****************************************************************************/
void IRAM_ATTR esp_wifi_bt_power_domain_on(void)
{
irqstate_t flags;
flags = enter_critical_section();
if (g_wifi_bt_pd_controller++ == 0)
{
modifyreg32(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_WIFI_FORCE_PD, 0);
modifyreg32(SYSCON_WIFI_RST_EN_REG, 0, MODEM_RESET_FIELD_WHEN_PU);
modifyreg32(SYSCON_WIFI_RST_EN_REG, MODEM_RESET_FIELD_WHEN_PU, 0);
modifyreg32(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_WIFI_FORCE_ISO, 0);
}
leave_critical_section(flags);
}
/****************************************************************************
* Name: esp_wifi_bt_power_domain_off
*
* Description:
* Deinitialize Bluetooth and Wi-Fi power domain
*
* Input Parameters:
* None
*
* Returned Value:
* None
*
****************************************************************************/
void esp_wifi_bt_power_domain_off(void)
{
irqstate_t flags;
flags = enter_critical_section();
if (--g_wifi_bt_pd_controller == 0)
{
modifyreg32(RTC_CNTL_DIG_ISO_REG, 0, RTC_CNTL_WIFI_FORCE_ISO);
modifyreg32(RTC_CNTL_DIG_PWC_REG, 0, RTC_CNTL_WIFI_FORCE_PD);
}
leave_critical_section(flags);
}
/****************************************************************************
* Name: esp_timer_create
*
* Description:
* Create timer with given arguments
*
* Input Parameters:
* create_args - Timer arguments data pointer
* out_handle - Timer handle pointer
*
* Returned Value:
* 0 if success or -1 if fail
*
****************************************************************************/
int32_t esp_timer_create(const esp_timer_create_args_t *create_args,
esp_timer_handle_t *out_handle)
{
int ret;
struct rt_timer_args_s rt_timer_args;
struct rt_timer_s *rt_timer;
rt_timer_args.arg = create_args->arg;
rt_timer_args.callback = create_args->callback;
ret = esp32s3_rt_timer_create(&rt_timer_args, &rt_timer);
if (ret)
{
wlerr("Failed to create rt_timer error=%d\n", ret);
return ret;
}
*out_handle = (esp_timer_handle_t)rt_timer;
return 0;
}
/****************************************************************************
* Name: esp_timer_start_once
*
* Description:
* Start timer with one shot mode
*
* Input Parameters:
* timer - Timer handle pointer
* timeout_us - Timeout value by micro second
*
* Returned Value:
* 0 if success or -1 if fail
*
****************************************************************************/
int32_t esp_timer_start_once(esp_timer_handle_t timer, uint64_t timeout_us)
{
struct rt_timer_s *rt_timer = (struct rt_timer_s *)timer;
esp32s3_rt_timer_start(rt_timer, timeout_us, false);
return 0;
}
/****************************************************************************
* Name: esp_timer_start_periodic
*
* Description:
* Start timer with periodic mode
*
* Input Parameters:
* timer - Timer handle pointer
* period - Timeout value by micro second
*
* Returned Value:
* 0 if success or -1 if fail
*
****************************************************************************/
int32_t esp_timer_start_periodic(esp_timer_handle_t timer, uint64_t period)
{
struct rt_timer_s *rt_timer = (struct rt_timer_s *)timer;
esp32s3_rt_timer_start(rt_timer, period, true);
return 0;
}
/****************************************************************************
* Name: esp_timer_stop
*
* Description:
* Stop timer
*
* Input Parameters:
* timer - Timer handle pointer
*
* Returned Value:
* 0 if success or -1 if fail
*
****************************************************************************/
int32_t esp_timer_stop(esp_timer_handle_t timer)
{
struct rt_timer_s *rt_timer = (struct rt_timer_s *)timer;
esp32s3_rt_timer_stop(rt_timer);
return 0;
}
/****************************************************************************
* Name: esp_timer_delete
*
* Description:
* Delete timer and free resource
*
* Input Parameters:
* timer - Timer handle pointer
*
* Returned Value:
* 0 if success or -1 if fail
*
****************************************************************************/
int32_t esp_timer_delete(esp_timer_handle_t timer)
{
struct rt_timer_s *rt_timer = (struct rt_timer_s *)timer;
esp32s3_rt_timer_delete(rt_timer);
return 0;
}

105
arch/xtensa/src/esp32s3/esp32s3_wireless.h
View file

@ -28,6 +28,7 @@
#include <nuttx/config.h>
#include "xtensa_attr.h"
#include "esp32s3_rt_timer.h"
#include "esp_hal_wifi.h"
@ -95,7 +96,7 @@ void esp32s3_phy_enable(void);
*
****************************************************************************/
void esp32s3_phy_disable(void);
void IRAM_ATTR esp32s3_phy_disable(void);
/****************************************************************************
* Name: esp32s3_phy_enable_clock
@ -111,7 +112,7 @@ void esp32s3_phy_disable(void);
*
****************************************************************************/
void esp32s3_phy_enable_clock(void);
void IRAM_ATTR esp32s3_phy_enable_clock(void);
/****************************************************************************
* Name: esp32s3_phy_disable_clock
@ -165,4 +166,104 @@ uint32_t IRAM_ATTR esp_dport_access_reg_read(uint32_t reg);
int phy_printf(const char *format, ...) printf_like(1, 2);
/****************************************************************************
* Name: esp_wifi_bt_power_domain_on
*
* Description:
* Initialize Bluetooth and Wi-Fi power domain
*
* Input Parameters:
* None
*
* Returned Value:
* None
*
****************************************************************************/
void IRAM_ATTR esp_wifi_bt_power_domain_on(void);
/****************************************************************************
* Name: esp_timer_create
*
* Description:
* Create timer with given arguments
*
* Input Parameters:
* create_args - Timer arguments data pointer
* out_handle - Timer handle pointer
*
* Returned Value:
* 0 if success or -1 if fail
*
****************************************************************************/
int32_t esp_timer_create(const esp_timer_create_args_t *create_args,
esp_timer_handle_t *out_handle);
/****************************************************************************
* Name: esp_timer_start_once
*
* Description:
* Start timer with one shot mode
*
* Input Parameters:
* timer - Timer handle pointer
* timeout_us - Timeout value by micro second
*
* Returned Value:
* 0 if success or -1 if fail
*
****************************************************************************/
int32_t esp_timer_start_once(esp_timer_handle_t timer, uint64_t timeout_us);
/****************************************************************************
* Name: esp_timer_start_periodic
*
* Description:
* Start timer with periodic mode
*
* Input Parameters:
* timer - Timer handle pointer
* period - Timeout value by micro second
*
* Returned Value:
* 0 if success or -1 if fail
*
****************************************************************************/
int32_t esp_timer_start_periodic(esp_timer_handle_t timer, uint64_t period);
/****************************************************************************
* Name: esp_timer_stop
*
* Description:
* Stop timer
*
* Input Parameters:
* timer - Timer handle pointer
*
* Returned Value:
* 0 if success or -1 if fail
*
****************************************************************************/
int32_t esp_timer_stop(esp_timer_handle_t timer);
/****************************************************************************
* Name: esp_timer_delete
*
* Description:
* Delete timer and free resource
*
* Input Parameters:
* timer - Timer handle pointer
*
* Returned Value:
* 0 if success or -1 if fail
*
****************************************************************************/
int32_t esp_timer_delete(esp_timer_handle_t timer);
#endif /* __ARCH_XTENSA_SRC_ESP32S3_ESP32S3_WIRELESS_H */

29
boards/xtensa/esp32s3/common/scripts/esp32s3_aliases.ld Normal file
View file

@ -0,0 +1,29 @@
/****************************************************************************
* boards/xtensa/esp32s3/common/scripts/esp32s3_aliases.ld
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#include <nuttx/config.h>
/* Bluetooth needs symbol alias, to be removed after IDF rename it */
#ifdef CONFIG_ESP32S3_BLE
api_vhci_host_check_send_available = API_vhci_host_check_send_available;
api_vhci_host_send_packet = API_vhci_host_send_packet;
api_vhci_host_register_callback = API_vhci_host_register_callback;
#endif

213
boards/xtensa/esp32s3/common/scripts/esp32s3_rom.ld
View file

@ -398,13 +398,13 @@ PROVIDE( Cache_Invalidate_DCache_Items = 0x40001680 );
PROVIDE( Cache_Clean_Items = 0x4000168c );
PROVIDE( Cache_WriteBack_Items = 0x40001698 );
PROVIDE( Cache_Op_Addr = 0x400016a4 );
PROVIDE( cache_invalidate_addr = 0x400016b0 );
PROVIDE( Cache_Invalidate_Addr = 0x400016b0 );
PROVIDE( Cache_Clean_Addr = 0x400016bc );
PROVIDE( Cache_WriteBack_Addr = 0x400016c8 );
PROVIDE( cache_invalidate_icache_all = 0x400016d4 );
PROVIDE( cache_invalidate_dcache_all = 0x400016e0 );
PROVIDE( Cache_Invalidate_ICache_All = 0x400016d4 );
PROVIDE( Cache_Invalidate_DCache_All = 0x400016e0 );
PROVIDE( Cache_Clean_All = 0x400016ec );
PROVIDE( cache_writeback_all = 0x400016f8 );
PROVIDE( Cache_WriteBack_All = 0x400016f8 );
PROVIDE( Cache_Mask_All = 0x40001704 );
PROVIDE( Cache_UnMask_Dram0 = 0x40001710 );
PROVIDE( Cache_Suspend_ICache_Autoload = 0x4000171c );
@ -439,30 +439,30 @@ PROVIDE( Cache_Disable_ICache = 0x4000186c );
PROVIDE( Cache_Enable_ICache = 0x40001878 );
PROVIDE( Cache_Disable_DCache = 0x40001884 );
PROVIDE( Cache_Enable_DCache = 0x40001890 );
PROVIDE( cache_suspend_icache = 0x4000189c );
PROVIDE( cache_resume_icache = 0x400018a8 );
PROVIDE( cache_suspend_dcache = 0x400018b4 );
PROVIDE( cache_resume_dcache = 0x400018c0 );
PROVIDE( Cache_Suspend_ICache = 0x4000189c );
PROVIDE( Cache_Resume_ICache = 0x400018a8 );
PROVIDE( Cache_Suspend_DCache = 0x400018b4 );
PROVIDE( Cache_Resume_DCache = 0x400018c0 );
PROVIDE( Cache_Occupy_Items = 0x400018cc );
PROVIDE( cache_occupy_addr = 0x400018d8 );
PROVIDE( Cache_Occupy_Addr = 0x400018d8 );
PROVIDE( Cache_Freeze_ICache_Enable = 0x400018e4 );
PROVIDE( Cache_Freeze_ICache_Disable = 0x400018f0 );
PROVIDE( Cache_Freeze_DCache_Enable = 0x400018fc );
PROVIDE( Cache_Freeze_DCache_Disable = 0x40001908 );
PROVIDE( cache_set_idrom_mmu_size = 0x40001914 );
PROVIDE( Cache_Set_IDROM_MMU_Size = 0x40001914 );
PROVIDE( flash2spiram_instruction_offset = 0x40001920 );
PROVIDE( flash2spiram_rodata_offset = 0x4000192c );
PROVIDE( flash_instr_rodata_start_page = 0x40001938 );
PROVIDE( flash_instr_rodata_end_page = 0x40001944 );
PROVIDE( cache_set_idrom_mmu_info = 0x40001950 );
PROVIDE( Cache_Set_IDROM_MMU_Info = 0x40001950 );
PROVIDE( Cache_Get_IROM_MMU_End = 0x4000195c );
PROVIDE( Cache_Get_DROM_MMU_End = 0x40001968 );
PROVIDE( Cache_Owner_Init = 0x40001974 );
PROVIDE( Cache_Occupy_ICache_MEMORY = 0x40001980 );
PROVIDE( Cache_Occupy_DCache_MEMORY = 0x4000198c );
PROVIDE( Cache_MMU_Init = 0x40001998 );
PROVIDE( cache_ibus_mmu_set = 0x400019a4 );
PROVIDE( cache_dbus_mmu_set = 0x400019b0 );
PROVIDE( Cache_Ibus_MMU_Set = 0x400019a4 );
PROVIDE( Cache_Dbus_MMU_Set = 0x400019b0 );
PROVIDE( Cache_Count_Flash_Pages = 0x400019bc );
PROVIDE( Cache_Flash_To_SPIRAM_Copy = 0x400019c8 );
PROVIDE( Cache_Travel_Tag_Memory = 0x400019d4 );
@ -626,7 +626,8 @@ ets_efuse_get_flash_delay_us = 0x40001f5c;
ets_efuse_get_mac = 0x40001f68;
ets_efuse_get_spiconfig = 0x40001f74;
ets_efuse_usb_print_is_disabled = 0x40001f80;
ets_efuse_get_uart_print_channel = 0x40001f8c;
/*ets_efuse_get_uart_print_channel = 0x40001f8c;*/
ets_efuse_usb_serial_jtag_print_is_disabled = 0x40001f8c;
ets_efuse_get_uart_print_control = 0x40001f98;
ets_efuse_get_wp_pad = 0x40001fa4;
ets_efuse_legacy_spi_boot_mode_disabled = 0x40001fb0;
@ -983,10 +984,14 @@ r_ble_util_data_rx_buf_reset = 0x40003288;
r_bt_bb_get_intr_mask = 0x40003294;
r_bt_bb_intr_clear = 0x400032a0;
r_bt_bb_intr_mask_set = 0x400032ac;
/*
r_bt_bb_isr = 0x400032b8;
*/
r_bt_rf_coex_cfg_set = 0x400032c4;
r_bt_rf_coex_conn_dynamic_pti_en_get = 0x400032d0;
/*
r_bt_rf_coex_conn_phy_coded_data_time_limit_en_get = 0x400032dc;
*/
r_bt_rf_coex_ext_adv_dynamic_pti_en_get = 0x400032e8;
r_bt_rf_coex_ext_scan_dynamic_pti_en_get = 0x400032f4;
r_bt_rf_coex_legacy_adv_dynamic_pti_en_get = 0x40003300;
@ -1008,14 +1013,18 @@ r_bt_rtp_apply_rule_cs_fmt = 0x400033b4;
r_bt_rtp_apply_rule_cs_idx = 0x400033c0;
r_bt_rtp_deregister_rule_cs_fmt = 0x400033cc;
r_bt_rtp_deregister_rule_cs_idx = 0x400033d8;
/*
r_bt_rtp_get_txpwr_idx_by_act = 0x400033e4;
*/
r_bt_rtp_init = 0x400033f0;
r_bt_rtp_register_rule_cs_fmt = 0x400033fc;
r_bt_rtp_register_rule_cs_idx = 0x40003408;
r_btdm_isr = 0x40003414;
/*
r_btdm_task_post = 0x40003420;
r_btdm_task_post_from_isr = 0x4000342c;
r_btdm_task_recycle = 0x40003438;
*/
r_cali_phase_match_p = 0x40003444;
r_cmp_abs_time = 0x40003450;
r_cmp_dest_id = 0x4000345c;
@ -1111,7 +1120,9 @@ r_hci_look_for_evt_desc = 0x40003888;
r_hci_look_for_le_evt_desc = 0x40003894;
r_hci_look_for_le_evt_desc_esp = 0x400038a0;
r_hci_pack_bytes = 0x400038ac;
/*
r_hci_register_vendor_desc_tab = 0x400038b8;
*/
r_hci_send_2_controller = 0x400038c4;
r_hci_send_2_host = 0x400038d0;
r_hci_tl_c2h_data_flow_on = 0x400038dc;
@ -1168,7 +1179,9 @@ r_ke_task_handler_get = 0x40003b34;
r_ke_task_init = 0x40003b40;
r_ke_task_msg_flush = 0x40003b4c;
r_ke_task_saved_update = 0x40003b58;
/*
r_ke_task_schedule = 0x40003b64;
*/
r_ke_time = 0x40003b70;
r_ke_time_cmp = 0x40003b7c;
r_ke_time_past = 0x40003b88;
@ -1196,7 +1209,9 @@ r_llc_dl_chg_check = 0x40003c84;
r_llc_dle_proc_err_cb = 0x40003c90;
r_llc_feats_exch_proc_err_cb = 0x40003c9c;
r_llc_hci_cmd_handler_tab_p_get = 0x40003ca8;
/*
r_llc_hci_command_handler = 0x40003cb4;
*/
r_llc_hci_con_param_req_evt_send = 0x40003cc0;
r_llc_hci_con_upd_info_send = 0x40003ccc;
r_llc_hci_disconnected_dis = 0x40003cd8;
@ -1224,7 +1239,9 @@ r_llc_llcp_state_set = 0x40003dd4;
r_llc_llcp_trans_timer_set = 0x40003de0;
r_llc_llcp_tx_check = 0x40003dec;
r_llc_loc_ch_map_proc_continue = 0x40003df8;
/*
r_llc_loc_con_upd_proc_continue = 0x40003e04;
*/
r_llc_loc_con_upd_proc_err_cb = 0x40003e10;
r_llc_loc_dl_upd_proc_continue = 0x40003e1c;
r_llc_loc_encrypt_proc_continue = 0x40003e28;
@ -1245,7 +1262,9 @@ r_llc_proc_timer_pause_set = 0x40003ed0;
r_llc_proc_timer_set = 0x40003edc;
r_llc_proc_unreg = 0x40003ee8;
r_llc_rem_ch_map_proc_continue = 0x40003ef4;
/*
r_llc_rem_con_upd_proc_continue = 0x40003f00;
*/
r_llc_rem_con_upd_proc_err_cb = 0x40003f0c;
r_llc_rem_dl_upd_proc = 0x40003f18;
r_llc_rem_encrypt_proc_continue = 0x40003f24;
@ -1334,10 +1353,14 @@ r_lld_con_rx_isr = 0x400042fc;
r_lld_con_rx_link_info_check = 0x40004308;
r_lld_con_rx_llcp_check = 0x40004314;
r_lld_con_rx_sync_time_update = 0x40004320;
/*
r_lld_con_sched = 0x4000432c;
*/
r_lld_con_set_tx_power = 0x40004338;
r_lld_con_start = 0x40004344;
/*
r_lld_con_stop = 0x40004350;
*/
r_lld_con_tx = 0x4000435c;
r_lld_con_tx_enc = 0x40004368;
r_lld_con_tx_isr = 0x40004374;
@ -1372,7 +1395,9 @@ r_lld_init_set_tx_power = 0x400044c4;
r_lld_init_start = 0x400044d0;
r_lld_init_stop = 0x400044dc;
r_lld_instant_proc_end = 0x400044e8;
/*
r_lld_llcp_rx_ind_handler = 0x400044f4;
*/
r_lld_per_adv_ch_map_update = 0x40004500;
r_lld_per_adv_chain_construct = 0x4000450c;
r_lld_per_adv_cleanup = 0x40004518;
@ -1390,7 +1415,9 @@ r_lld_per_adv_init = 0x4000459c;
r_lld_per_adv_init_info_get = 0x400045a8;
r_lld_per_adv_list_add = 0x400045b4;
r_lld_per_adv_list_rem = 0x400045c0;
/*
r_lld_per_adv_sched = 0x400045cc;
*/
r_lld_per_adv_set_tx_power = 0x400045d8;
r_lld_per_adv_start = 0x400045e4;
r_lld_per_adv_stop = 0x400045f0;
@ -1424,8 +1451,10 @@ r_lld_scan_frm_rx_isr = 0x40004734;
r_lld_scan_frm_skip_isr = 0x40004740;
r_lld_scan_init = 0x4000474c;
r_lld_scan_params_update = 0x40004758;
/*
r_lld_scan_process_pkt_rx = 0x40004764;
r_lld_scan_process_pkt_rx_adv_rep = 0x40004770;
*/
r_lld_scan_process_pkt_rx_aux_adv_ind = 0x4000477c;
r_lld_scan_process_pkt_rx_aux_chain_ind = 0x40004788;
r_lld_scan_process_pkt_rx_aux_scan_rsp = 0x40004794;
@ -1500,7 +1529,9 @@ r_llm_is_dev_synced = 0x40004ac4;
r_llm_is_non_con_act_ongoing_check = 0x40004ad0;
r_llm_is_wl_accessible = 0x40004adc;
r_llm_le_evt_mask_check = 0x40004ae8;
/*
r_llm_le_features_get = 0x40004af4;
*/
r_llm_link_disc = 0x40004b00;
r_llm_master_ch_map_get = 0x40004b0c;
r_llm_msg_handler_tab_p_get = 0x40004b18;
@ -1520,7 +1551,9 @@ r_misc_msg_handler_tab_p_get = 0x40004bb4;
r_notEqual256 = 0x40004bc0;
r_phy_upd_proc_start = 0x40004bcc;
r_platform_reset = 0x40004bd8;
/*
r_register_esp_vendor_cmd_handler = 0x40004be4;
*/
r_rf_em_init = 0x40004bf0;
r_rf_force_agc_enable = 0x40004bfc;
r_rf_reg_rd = 0x40004c08;
@ -1530,8 +1563,10 @@ r_rf_rssi_convert = 0x40004c2c;
r_rf_rw_v9_le_disable = 0x40004c38;
r_rf_rw_v9_le_enable = 0x40004c44;
r_rf_sleep = 0x40004c50;
/*
r_rf_txpwr_cs_get = 0x40004c5c;
r_rf_txpwr_dbm_get = 0x40004c68;
*/
r_rf_util_cs_fmt_convert = 0x40004c74;
r_rw_crypto_aes_ccm = 0x40004c80;
r_rw_crypto_aes_encrypt = 0x40004c8c;
@ -1545,7 +1580,9 @@ r_rw_crypto_aes_result_handler = 0x40004ce0;
r_rw_crypto_aes_s1 = 0x40004cec;
r_rw_cryto_aes_cmac = 0x40004cf8;
r_rw_v9_init_em_radio_table = 0x40004d04;
/*
r_rwble_isr = 0x40004d10;
*/
r_rwble_sleep_enter = 0x40004d1c;
r_rwble_sleep_wakeup_end = 0x40004d28;
r_rwbtdm_isr_wrapper = 0x40004d34;
@ -1582,7 +1619,9 @@ r_sch_alarm_set = 0x40004e9c;
r_sch_alarm_timer_isr = 0x40004ea8;
r_sch_arb_conflict_check = 0x40004eb4;
r_sch_arb_elt_cancel = 0x40004ec0;
/*
r_sch_arb_event_start_isr = 0x40004ecc;
*/
r_sch_arb_init = 0x40004ed8;
r_sch_arb_insert = 0x40004ee4;
r_sch_arb_prog_timer = 0x40004ef0;
@ -1597,8 +1636,10 @@ r_sch_plan_offset_req = 0x40004f50;
r_sch_plan_position_range_compute = 0x40004f5c;
r_sch_plan_rem = 0x40004f68;
r_sch_plan_req = 0x40004f74;
/*
r_sch_plan_set = 0x40004f80;
r_sch_prog_end_isr = 0x40004f8c;
*/
r_sch_prog_init = 0x40004f98;
r_sch_prog_push = 0x40004fa4;
r_sch_prog_rx_isr = 0x40004fb0;
@ -1634,16 +1675,22 @@ r_lld_ext_adv_dynamic_pti_get = 0x4000510c;
r_lld_ext_adv_dynamic_aux_pti_process = 0x40005118;
r_lld_ext_adv_dynamic_pti_process = 0x40005124;
r_lld_adv_ext_pkt_prepare_set = 0x40005130;
/*
r_lld_adv_ext_chain_none_construct = 0x4000513c;
*/
r_lld_adv_ext_chain_connectable_construct = 0x40005148;
/*
r_lld_adv_ext_chain_scannable_construct = 0x40005154;
*/
r_lld_adv_pkt_rx_connect_post = 0x40005160;
r_lld_adv_start_init_evt_param = 0x4000516c;
r_lld_adv_start_set_cs = 0x40005178;
r_lld_adv_start_update_filter_policy = 0x40005184;
r_lld_adv_start_schedule_asap = 0x40005190;
r_lld_con_tx_prog_new_packet_coex = 0x4000519c;
/*
r_lld_con_tx_prog_new_packet = 0x400051a8;
*/
r_lld_per_adv_dynamic_pti_get = 0x400051b4;
r_lld_per_adv_evt_start_chm_upd = 0x400051c0;
r_lld_ext_scan_dynamic_pti_get = 0x400051cc;
@ -1800,6 +1847,50 @@ rwip_coex_cfg = 0x3ff1eebe;
rwip_priority = 0x3ff1eea8;
veryBigHexP256 = 0x3ff1ee5c;
/* bluetooth hook funcs */
r_llc_loc_encrypt_proc_continue_hook = 0x40001c60;
r_llc_loc_phy_upd_proc_continue_hook = 0x40001c64;
r_llc_rem_phy_upd_proc_continue_hook = 0x40001c68;
r_lld_scan_frm_eof_isr_hook = 0x40001c6c;
r_lld_scan_evt_start_cbk_hook = 0x40001c70;
/*
r_lld_scan_start_hook = 0x40001c74;
*/
r_lld_scan_process_pkt_rx_ext_adv_hook = 0x40001c78;
r_lld_scan_sched_hook = 0x40001c7c;
/*
r_lld_adv_start_hook = 0x40001c80;
*/
r_lld_adv_evt_start_cbk_hook = 0x40001c84;
r_lld_adv_aux_evt_start_cbk_hook = 0x40001c88;
r_lld_adv_frm_isr_hook = 0x40001c8c;
r_lld_adv_start_init_evt_param_hook = 0x40001c90;
r_lld_con_evt_canceled_cbk_hook = 0x40001c94;
r_lld_con_frm_isr_hook = 0x40001c98;
r_lld_con_tx_hook = 0x40001c9c;
r_lld_con_rx_hook = 0x40001ca0;
r_lld_con_evt_start_cbk_hook = 0x40001ca4;
/*
r_lld_con_start_hook = 0x40001ca8;
*/
r_lld_con_tx_prog_new_packet_hook = 0x40001cac;
r_lld_init_frm_eof_isr_hook = 0x40001cb0;
r_lld_init_evt_start_cbk_hook = 0x40001cb4;
/*
r_lld_init_start_hook = 0x40001cb8;
*/
r_lld_init_sched_hook = 0x40001cbc;
r_lld_init_process_pkt_tx_hook = 0x40001cc0;
r_lld_per_adv_evt_start_cbk_hook = 0x40001cc4;
r_lld_per_adv_frm_isr_hook = 0x40001cc8;
r_lld_per_adv_start_hook = 0x40001ccc;
r_lld_sync_frm_eof_isr_hook = 0x40001cd0;
r_lld_sync_evt_start_cbk_hook = 0x40001cd4;
r_lld_sync_start_hook = 0x40001cd8;
r_lld_sync_process_pkt_rx_pkt_check_hook = 0x40001cdc;
r_sch_arb_insert_hook = 0x40001ce0;
r_sch_plan_offset_req_hook = 0x40001ce4;
/***************************************
Group rom_pp
***************************************/
@ -1810,11 +1901,11 @@ RC_GetBlockAckTime = 0x4000525c;
ebuf_list_remove = 0x40005268;
esf_buf_alloc = 0x40005274;
esf_buf_alloc_dynamic = 0x40005280;
esf_buf_recycle = 0x4000528c;
/*esf_buf_recycle = 0x4000528c;*/
GetAccess = 0x40005298;
hal_mac_is_low_rate_enabled = 0x400052a4;
hal_mac_tx_get_blockack = 0x400052b0;
hal_mac_tx_set_ppdu = 0x400052bc;
/* hal_mac_tx_set_ppdu = 0x400052bc;*/
ic_get_trc = 0x400052c8;
ic_mac_deinit = 0x400052d4;
ic_mac_init = 0x400052e0;
@ -1837,11 +1928,11 @@ lmacRecycleMPDU = 0x400053a0;
lmacRxDone = 0x400053ac;
lmacSetTxFrame = 0x400053b8;
lmacTxDone = 0x400053c4;
lmacTxFrame = 0x400053d0;
/*lmacTxFrame = 0x400053d0;*/
mac_tx_set_duration = 0x400053dc;
mac_tx_set_htsig = 0x400053e8;
/* mac_tx_set_htsig = 0x400053e8;*/
mac_tx_set_plcp0 = 0x400053f4;
mac_tx_set_plcp1 = 0x40005400;
/* mac_tx_set_plcp1 = 0x40005400;*/
mac_tx_set_plcp2 = 0x4000540c;
pm_check_state = 0x40005418;
pm_disable_dream_timer = 0x40005424;
@ -1856,16 +1947,16 @@ pm_set_beacon_filter = 0x40005484;
pm_is_in_wifi_slice_threshold = 0x40005490;
pm_is_waked = 0x4000549c;
pm_keep_alive = 0x400054a8;
pm_on_beacon_rx = 0x400054b4;
/* pm_on_beacon_rx = 0x400054b4; */
pm_on_data_rx = 0x400054c0;
pm_on_tbtt = 0x400054cc;
pm_parse_beacon = 0x400054d8;
pm_process_tim = 0x400054e4;
pm_rx_beacon_process = 0x400054f0;
pm_rx_data_process = 0x400054fc;
pm_sleep = 0x40005508;
/* pm_parse_beacon = 0x400054d8;*/
/* pm_process_tim = 0x400054e4; */
/*pm_rx_beacon_process = 0x400054f0;*/
/* pm_rx_data_process = 0x400054fc; */
/*pm_sleep = 0x40005508;*/
pm_sleep_for = 0x40005514;
pm_tbtt_process = 0x40005520;
/* pm_tbtt_process = 0x40005520; */
ppAMPDU2Normal = 0x4000552c;
ppAssembleAMPDU = 0x40005538;
ppCalFrameTimes = 0x40005544;
@ -1879,7 +1970,7 @@ ppEnqueueRxq = 0x40005598;
ppEnqueueTxDone = 0x400055a4;
ppGetTxQFirstAvail_Locked = 0x400055b0;
ppGetTxframe = 0x400055bc;
ppMapTxQueue = 0x400055c8;
/*ppMapTxQueue = 0x400055c8;*/
ppProcessRxPktHdr = 0x400055e0;
ppProcessTxQ = 0x400055ec;
ppRecordBarRRC = 0x400055f8;
@ -1896,7 +1987,7 @@ ppSearchTxQueue = 0x40005670;
ppSearchTxframe = 0x4000567c;
ppSelectNextQueue = 0x40005688;
ppSubFromAMPDU = 0x40005694;
ppTask = 0x400056a0;
/* ppTask = 0x400056a0; */
ppTxPkt = 0x400056ac;
ppTxProtoProc = 0x400056b8;
ppTxqUpdateBitmap = 0x400056c4;
@ -1916,7 +2007,7 @@ rcClearCurStat = 0x40005760;
rcGetSched = 0x4000576c;
rcLowerSched = 0x40005778;
rcSetTxAmpduLimit = 0x40005784;
rcTxUpdatePer = 0x40005790;
/* rcTxUpdatePer = 0x40005790;*/
rcUpdateAckSnr = 0x4000579c;
rcUpdateRate = 0x400057a8;
/* rcUpdateTxDone = 0x400057b4; */
@ -1948,13 +2039,13 @@ wdev_mac_special_reg_store = 0x400058e0;
wdev_mac_wakeup = 0x400058ec;
wdev_mac_sleep = 0x400058f8;
hal_mac_is_dma_enable = 0x40005904;
wDev_ProcessFiq = 0x40005910;
/* wDev_ProcessFiq = 0x40005910; */
wDev_ProcessRxSucData = 0x4000591c;
wdevProcessRxSucDataAll = 0x40005928;
wdev_csi_len_align = 0x40005934;
ppDequeueTxDone_Locked = 0x40005940;
ppProcTxDone = 0x4000594c;
pm_tx_data_done_process = 0x40005958;
/*ppProcTxDone = 0x4000594c;*/
/*pm_tx_data_done_process = 0x40005958;*/
config_is_cache_tx_buf_enabled = 0x40005964;
ppMapWaitTxq = 0x40005970;
ppProcessWaitingQueue = 0x4000597c;
@ -2012,6 +2103,7 @@ g_tx_done_cb_func = 0x3fcef8ac;
g_per_conn_trc = 0x3fcef860;
s_encap_amsdu_func = 0x3fcef85c;
/***************************************
Group rom_net80211
***************************************/
@ -2037,7 +2129,7 @@ ieee80211_is_tx_allowed = 0x40005a78;
ieee80211_output_pending_eb = 0x40005a84;
ieee80211_output_process = 0x40005a90;
ieee80211_set_tx_desc = 0x40005a9c;
sta_input = 0x40005aa8;
/*sta_input = 0x40005aa8;*/
wifi_get_macaddr = 0x40005ab4;
wifi_rf_phy_disable = 0x40005ac0;
wifi_rf_phy_enable = 0x40005acc;
@ -2048,7 +2140,7 @@ ieee80211_recycle_cache_eb = 0x40005afc;
ieee80211_search_node = 0x40005b08;
roundup2 = 0x40005b14;
ieee80211_crypto_encap = 0x40005b20;
ieee80211_crypto_decap = 0x40005b2c;
/* ieee80211_crypto_decap = 0x40005b2c; */
/* ieee80211_decap = 0x40005b38; */
ieee80211_set_tx_pti = 0x40005b44;
wifi_is_started = 0x40005b50;
@ -2064,6 +2156,7 @@ s_netstack_free = 0x3fcef840;
mesh_rxcb = 0x3fcef83c;
sta_rxcb = 0x3fcef838;
/***************************************
Group rom_coexist
***************************************/
@ -2078,7 +2171,7 @@ coex_core_pti_get = 0x40005ba4;
coex_core_release = 0x40005bb0;
coex_core_request = 0x40005bbc;
coex_core_status_get = 0x40005bc8;
coex_core_timer_idx_get = 0x40005bd4;
/*coex_core_timer_idx_get = 0x40005bd4;*/
coex_event_duration_get = 0x40005be0;
coex_hw_timer_disable = 0x40005bec;
coex_hw_timer_enable = 0x40005bf8;
@ -2097,6 +2190,7 @@ coexist_funcs = 0x3fcef828;
g_coa_funcs_p = 0x3fcef824;
g_coex_param_ptr = 0x3fcef820;
/***************************************
Group rom_phy
***************************************/
@ -2122,10 +2216,10 @@ rom_get_bbgain_db = 0x40005d18;
rom_get_data_sat = 0x40005d24;
rom_get_i2c_read_mask = 0x40005d30;
rom_get_pwctrl_correct = 0x40005d3c;
rom_i2c_readreg = 0x40005d48;
rom_i2c_readreg_mask = 0x40005d54;
rom_i2c_writereg = 0x40005d60;
rom_i2c_writereg_mask = 0x40005d6c;
rom_i2c_readReg = 0x40005d48;
rom_i2c_readReg_Mask = 0x40005d54;
rom_i2c_writeReg = 0x40005d60;
rom_i2c_writeReg_Mask = 0x40005d6c;
rom_index_to_txbbgain = 0x40005d78;
rom_iq_est_disable = 0x40005d84;
rom_iq_est_enable = 0x40005d90;
@ -2276,47 +2370,6 @@ phy_param_rom = 0x3fcef81c;
PROVIDE ( esp_rom_tjpgd_decomp = 0x40000864 );
PROVIDE ( esp_rom_tjpgd_prepare = 0x40000858 );
PROVIDE ( esp_rom_crc32_le = crc32_le );
PROVIDE ( esp_rom_crc16_le = crc16_le );
PROVIDE ( esp_rom_crc8_le = crc8_le );
PROVIDE ( esp_rom_crc32_be = crc32_be );
PROVIDE ( esp_rom_crc16_be = crc16_be );
PROVIDE ( esp_rom_crc8_be = crc8_be );
PROVIDE ( esp_rom_gpio_pad_select_gpio = gpio_pad_select_gpio );
PROVIDE ( esp_rom_gpio_pad_pullup_only = gpio_pad_pullup );
PROVIDE ( esp_rom_gpio_pad_set_drv = gpio_pad_set_drv );
PROVIDE ( esp_rom_gpio_pad_unhold = gpio_pad_unhold );
PROVIDE ( esp_rom_gpio_connect_in_signal = gpio_matrix_in );
PROVIDE ( esp_rom_gpio_connect_out_signal = gpio_matrix_out );
PROVIDE ( esp_rom_efuse_mac_address_crc8 = esp_crc8 );
PROVIDE ( esp_rom_efuse_get_flash_gpio_info = ets_efuse_get_spiconfig );
PROVIDE ( esp_rom_efuse_get_flash_wp_gpio = ets_efuse_get_wp_pad );
PROVIDE ( esp_rom_efuse_is_secure_boot_enabled = ets_efuse_secure_boot_enabled );
PROVIDE ( esp_rom_uart_flush_tx = uart_tx_flush );
PROVIDE ( esp_rom_uart_tx_one_char = uart_tx_one_char );
PROVIDE ( esp_rom_uart_tx_wait_idle = uart_tx_wait_idle );
PROVIDE ( esp_rom_uart_rx_one_char = uart_rx_one_char );
PROVIDE ( esp_rom_uart_rx_string = UartRxString );
PROVIDE ( esp_rom_uart_set_as_console = uart_tx_switch );
PROVIDE ( esp_rom_uart_usb_acm_init = Uart_Init_USB );
PROVIDE ( esp_rom_uart_putc = ets_write_char_uart );
PROVIDE ( esp_rom_md5_init = MD5Init );
PROVIDE ( esp_rom_md5_update = MD5Update );
PROVIDE ( esp_rom_md5_final = MD5Final );
PROVIDE ( esp_rom_printf = ets_printf );
PROVIDE ( esp_rom_delay_us = ets_delay_us );
PROVIDE ( esp_rom_install_uart_printf = ets_install_uart_printf );
PROVIDE ( esp_rom_get_reset_reason = rtc_get_reset_reason );
PROVIDE( esp_rom_spiflash_attach = spi_flash_attach );
PROVIDE ( esp_rom_spiflash_clear_bp = esp_rom_spiflash_unlock );
PROVIDE ( esp_rom_spiflash_write_enable = SPI_write_enable);
/***************************************
Group libgcc
***************************************/

37
boards/xtensa/esp32s3/common/scripts/esp32s3_rom_aliases.ld Normal file
View file

@ -0,0 +1,37 @@
/****************************************************************************
* boards/xtensa/esp32s3/common/scripts/esp32s3_aliases.ld
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#include <nuttx/config.h>
/* Lower-case aliases for symbols not compliant to nxstyle */
PROVIDE( cache_dbus_mmu_set = Cache_Dbus_MMU_Set );
PROVIDE( cache_ibus_mmu_set = Cache_Ibus_MMU_Set );
PROVIDE( cache_invalidate_addr = Cache_Invalidate_Addr );
PROVIDE( cache_invalidate_dcache_all = Cache_Invalidate_DCache_All );
PROVIDE( cache_invalidate_icache_all = Cache_Invalidate_ICache_All );
PROVIDE( cache_occupy_addr = Cache_Occupy_Addr );
PROVIDE( cache_resume_dcache = Cache_Resume_DCache );
PROVIDE( cache_resume_icache = Cache_Resume_ICache );
PROVIDE( cache_set_idrom_mmu_info = Cache_Set_IDROM_MMU_Info );
PROVIDE( cache_set_idrom_mmu_size = Cache_Set_IDROM_MMU_Size );
PROVIDE( cache_suspend_dcache = Cache_Suspend_DCache );
PROVIDE( cache_suspend_icache = Cache_Suspend_ICache );
PROVIDE( cache_writeback_all = Cache_WriteBack_All );

79
boards/xtensa/esp32s3/common/scripts/esp32s3_rom_api.ld Normal file
View file

@ -0,0 +1,79 @@
/****************************************************************************
* boards/xtensa/esp32s3/common/scripts/esp32s3_peripherals.ld
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/**
* ROM APIs
*/
PROVIDE ( esp_rom_crc32_le = crc32_le );
PROVIDE ( esp_rom_crc16_le = crc16_le );
PROVIDE ( esp_rom_crc8_le = crc8_le );
PROVIDE ( esp_rom_crc32_be = crc32_be );
PROVIDE ( esp_rom_crc16_be = crc16_be );
PROVIDE ( esp_rom_crc8_be = crc8_be );
PROVIDE ( esp_rom_gpio_pad_select_gpio = gpio_pad_select_gpio );
PROVIDE ( esp_rom_gpio_pad_pullup_only = gpio_pad_pullup );
PROVIDE ( esp_rom_gpio_pad_set_drv = gpio_pad_set_drv );
PROVIDE ( esp_rom_gpio_pad_unhold = gpio_pad_unhold );
PROVIDE ( esp_rom_gpio_connect_in_signal = gpio_matrix_in );
PROVIDE ( esp_rom_gpio_connect_out_signal = gpio_matrix_out );
PROVIDE ( esp_rom_efuse_mac_address_crc8 = esp_crc8 );
PROVIDE ( esp_rom_efuse_get_flash_gpio_info = ets_efuse_get_spiconfig );
PROVIDE ( esp_rom_efuse_get_flash_wp_gpio = ets_efuse_get_wp_pad );
PROVIDE ( esp_rom_efuse_is_secure_boot_enabled = ets_efuse_secure_boot_enabled );
PROVIDE ( esp_rom_uart_flush_tx = uart_tx_flush );
PROVIDE ( esp_rom_uart_tx_one_char = uart_tx_one_char );
PROVIDE ( esp_rom_uart_tx_wait_idle = uart_tx_wait_idle );
PROVIDE ( esp_rom_uart_rx_one_char = uart_rx_one_char );
PROVIDE ( esp_rom_uart_rx_string = UartRxString );
PROVIDE ( esp_rom_uart_set_as_console = uart_tx_switch );
PROVIDE ( esp_rom_uart_usb_acm_init = Uart_Init_USB );
PROVIDE ( esp_rom_uart_putc = ets_write_char_uart );
PROVIDE ( esp_rom_md5_init = MD5Init );
PROVIDE ( esp_rom_md5_update = MD5Update );
PROVIDE ( esp_rom_md5_final = MD5Final );
PROVIDE ( esp_rom_software_reset_system = software_reset );
PROVIDE ( esp_rom_software_reset_cpu = software_reset_cpu );
PROVIDE ( esp_rom_printf = ets_printf );
PROVIDE ( esp_rom_delay_us = ets_delay_us );
PROVIDE ( esp_rom_install_uart_printf = ets_install_uart_printf );
PROVIDE ( esp_rom_get_reset_reason = rtc_get_reset_reason );
PROVIDE ( esp_rom_route_intr_matrix = intr_matrix_set );
PROVIDE ( esp_rom_get_cpu_ticks_per_us = ets_get_cpu_frequency );
PROVIDE ( esp_rom_spiflash_attach = spi_flash_attach );
PROVIDE ( esp_rom_spiflash_clear_bp = esp_rom_spiflash_unlock );
PROVIDE ( esp_rom_spiflash_write_enable = SPI_write_enable);
PROVIDE ( esp_rom_spiflash_erase_area = SPIEraseArea );
PROVIDE ( esp_rom_spiflash_fix_dummylen = spi_dummy_len_fix );
PROVIDE ( esp_rom_spiflash_set_drvs = SetSpiDrvs);
PROVIDE ( esp_rom_spiflash_select_padsfunc = SelectSpiFunction );
PROVIDE ( esp_rom_spiflash_common_cmd = SPI_Common_Command );
PROVIDE ( esp_rom_regi2c_read = rom_i2c_readReg );
PROVIDE ( esp_rom_regi2c_read_mask = rom_i2c_readReg_Mask );
PROVIDE ( esp_rom_regi2c_write = rom_i2c_writeReg );
PROVIDE ( esp_rom_regi2c_write_mask = rom_i2c_writeReg_Mask );

2
boards/xtensa/esp32s3/common/scripts/flat_memory.ld
View file

@ -31,6 +31,8 @@
#include <nuttx/config.h>
#include "esp32s3_aliases.ld"
#define SRAM_IRAM_START 0x40370000
#define SRAM_DIRAM_I_START 0x40378000

2
boards/xtensa/esp32s3/common/scripts/protected_memory.ld
View file

@ -32,6 +32,8 @@
#include <nuttx/config.h>
#include "esp32s3_aliases.ld"
#define SRAM_IRAM_START 0x40370000
#define SRAM_DIRAM_I_START 0x40378000

71
boards/xtensa/esp32s3/esp32s3-devkit/configs/ble/defconfig Normal file
View file

@ -0,0 +1,71 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_ARCH_LEDS is not set
# CONFIG_NDEBUG is not set
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
CONFIG_ALLOW_BSD_COMPONENTS=y
CONFIG_ARCH="xtensa"
CONFIG_ARCH_BOARD="esp32s3-devkit"
CONFIG_ARCH_BOARD_COMMON=y
CONFIG_ARCH_BOARD_ESP32S3_DEVKIT=y
CONFIG_ARCH_CHIP="esp32s3"
CONFIG_ARCH_CHIP_ESP32S3=y
CONFIG_ARCH_CHIP_ESP32S3WROOM1=y
CONFIG_ARCH_INTERRUPTSTACK=2048
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARCH_XTENSA=y
CONFIG_BOARDCTL_RESET=y
CONFIG_BOARD_LOOPSPERMSEC=16717
CONFIG_BTSAK=y
CONFIG_BUILTIN=y
CONFIG_DEFAULT_TASK_STACKSIZE=4096
CONFIG_DRIVERS_BLUETOOTH=y
CONFIG_DRIVERS_IEEE80211=y
CONFIG_DRIVERS_WIRELESS=y
CONFIG_ESP32S3_BLE=y
CONFIG_ESP32S3_RT_TIMER_TASK_STACK_SIZE=4096
CONFIG_ESP32S3_UART0=y
CONFIG_FS_LARGEFILE=y
CONFIG_FS_PROCFS=y
CONFIG_IDLETHREAD_STACKSIZE=3072
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INIT_STACKSIZE=8192
CONFIG_INTELHEX_BINARY=y
CONFIG_NAME_MAX=48
CONFIG_NETDEV_LATEINIT=y
CONFIG_NET_BLUETOOTH=y
CONFIG_NET_ETH_PKTSIZE=1514
CONFIG_NET_SOCKOPTS=y
CONFIG_NET_TCP=y
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_LINELEN=64
CONFIG_NSH_READLINE=y
CONFIG_POSIX_SPAWN_DEFAULT_STACKSIZE=2048
CONFIG_PREALLOC_MQ_MSGS=32
CONFIG_PREALLOC_TIMERS=4
CONFIG_PTHREAD_MUTEX_TYPES=y
CONFIG_RAM_SIZE=114688
CONFIG_RAM_START=0x20000000
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_WAITPID=y
CONFIG_SIG_DEFAULT=y
CONFIG_SPINLOCK=y
CONFIG_START_DAY=6
CONFIG_START_MONTH=12
CONFIG_START_YEAR=2011
CONFIG_SYSLOG_BUFFER=y
CONFIG_SYSTEM_ARGTABLE3=y
CONFIG_SYSTEM_NSH=y
CONFIG_TIMER=y
CONFIG_TLS_TASK_NELEM=4
CONFIG_UART0_SERIAL_CONSOLE=y
CONFIG_WIRELESS=y
CONFIG_WIRELESS_BLUETOOTH=y

2
boards/xtensa/esp32s3/esp32s3-devkit/scripts/Make.defs
View file

@ -25,6 +25,8 @@ include $(TOPDIR)/arch/xtensa/src/lx7/Toolchain.defs
ARCHSCRIPT += $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32s3_peripherals.ld
ARCHSCRIPT += $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32s3_rom.ld
ARCHSCRIPT += $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32s3_rom_api.ld
ARCHSCRIPT += $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32s3_rom_aliases.ld
# Pick the linker scripts from the board level if they exist, if not
# pick the common linker scripts.

24
boards/xtensa/esp32s3/esp32s3-devkit/src/esp32s3_bringup.c
View file

@ -46,6 +46,10 @@
# include "esp32s3_board_wlan.h"
#endif
#ifdef CONFIG_ESP32S3_BLE
# include "esp32s3_ble.h"
#endif
#ifdef CONFIG_ESP32S3_RT_TIMER
# include "esp32s3_rt_timer.h"
#endif
@ -225,6 +229,24 @@ int esp32s3_bringup(void)
}
#endif
#ifdef CONFIG_ESP32S3_WIRELESS
#ifdef CONFIG_ESP32S3_WIFI_BT_COEXIST
ret = esp32s3_wifi_bt_coexist_init();
if (ret)
{
syslog(LOG_ERR, "ERROR: Failed to initialize Wi-Fi and BT coexist\n");
}
#endif
#ifdef CONFIG_ESP32S3_BLE
ret = esp32s3_ble_initialize();
if (ret)
{
syslog(LOG_ERR, "ERROR: Failed to initialize BLE\n");
}
#endif
#ifdef CONFIG_ESP32S3_WIFI
ret = board_wlan_init();
if (ret < 0)
@ -234,6 +256,8 @@ int esp32s3_bringup(void)
}
#endif
#endif
#ifdef CONFIG_VIDEO_FB
ret = fb_register(0, 0);
if (ret < 0)

2
boards/xtensa/esp32s3/esp32s3-eye/scripts/Make.defs
View file

@ -25,6 +25,8 @@ include $(TOPDIR)/arch/xtensa/src/lx7/Toolchain.defs
ARCHSCRIPT += $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32s3_peripherals.ld
ARCHSCRIPT += $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32s3_rom.ld
ARCHSCRIPT += $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32s3_rom_api.ld
ARCHSCRIPT += $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32s3_rom_aliases.ld
# Pick the linker scripts from the board level if they exist, if not
# pick the common linker scripts.

2
boards/xtensa/esp32s3/esp32s3-meadow/scripts/Make.defs
View file

@ -25,6 +25,8 @@ include $(TOPDIR)/arch/xtensa/src/lx7/Toolchain.defs
ARCHSCRIPT += $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32s3_peripherals.ld
ARCHSCRIPT += $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32s3_rom.ld
ARCHSCRIPT += $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32s3_rom_api.ld
ARCHSCRIPT += $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32s3_rom_aliases.ld
# Pick the linker scripts from the board level if they exist, if not
# pick the common linker scripts.