diff --git a/arch/arm/src/cxd56xx/Kconfig b/arch/arm/src/cxd56xx/Kconfig index 512ed22d23..29f0292ba5 100644 --- a/arch/arm/src/cxd56xx/Kconfig +++ b/arch/arm/src/cxd56xx/Kconfig @@ -69,6 +69,16 @@ config CXD56_ICC bool default y +config CXD56_CPUFIFO_ENTRIES + int "CPU Tx FIFO elements" + default 8 + depends on CXD56_CPUFIFO + +config CXD56_CPUFIFO_NBUFFERS + int "CPU Rx FIFO elements" + default 8 + depends on CXD56_ICC + config CXD56_FARAPI bool default y @@ -698,23 +708,41 @@ config CXD56_LPADC_ALL Switch the LPADC all channels sampling in time division. endchoice -menu "LADC0" - depends on CXD56_LPADC0 +menu "LPADC0" + depends on CXD56_LPADC0 || CXD56_LPADC0_1 || CXD56_LPADC_ALL config CXD56_LPADC0_FREQ int "Coefficient of sampling frequency" default 12 - range 11 15 if CXD56_SCU_32K - range 3 15 if CXD56_SCU_RCOSC - range 2 15 if CXD56_SCU_XOSC + range 11 15 if CXD56_SCU_32K && CXD56_LPADC0 + range 3 15 if CXD56_SCU_RCOSC && CXD56_LPADC0 + range 2 15 if CXD56_SCU_XOSC && CXD56_LPADC0 + range 12 15 if CXD56_SCU_32K && CXD56_LPADC0_1 + range 6 15 if CXD56_SCU_RCOSC && CXD56_LPADC0_1 + range 6 15 if CXD56_SCU_XOSC && CXD56_LPADC0_1 + range 11 15 if CXD56_SCU_32K && CXD56_LPADC_ALL + range 7 15 if CXD56_SCU_RCOSC && CXD56_LPADC_ALL + range 7 15 if CXD56_SCU_XOSC && CXD56_LPADC_ALL ---help--- This configuration set to sampling frequency calculated by the following formula. - Sampling frequency = SCU32K / 2 ^ n [Hz] - Note. Setable range depends on the SCU clock mode. + + Note: Available range depends on the SCU clock mode. + + (Use channel 0 only) Sampling frequency = SCU32K / 2 ^ n [Hz] SCU32K : 11 to 15 RCOSC : 3 to 15 XOSC : 2 to 15 + (Use channel 0/1) Sampling frequency = SCU32K / 2 ^ (n+1) [Hz] + SCU32K : 12 to 15 + RCOSC : 6 to 15 + XOSC : 6 to 15 + + (Use all of channels) Sampling frequency = SCU32K / 2 ^ (n+2) [Hz] + SCU32K : 11 to 15 + RCOSC : 7 to 15 + XOSC : 7 to 15 + config CXD56_LPADC0_OFFSET int "Offset" default 0 @@ -730,27 +758,45 @@ config CXD56_LPADC0_FSIZE default 16 range 2 40960 ---help--- - SCU FIFO size + SCU FIFO size endmenu # CXD56_LPADC0 -menu "LADC1" - depends on CXD56_LPADC1 +menu "LPADC1" + depends on CXD56_LPADC1 || CXD56_LPADC0_1 || CXD56_LPADC_ALL config CXD56_LPADC1_FREQ int "Coefficient of sampling frequency" default 12 - range 11 15 if CXD56_SCU_32K - range 3 15 if CXD56_SCU_RCOSC - range 2 15 if CXD56_SCU_XOSC + range 11 15 if CXD56_SCU_32K && CXD56_LPADC1 + range 3 15 if CXD56_SCU_RCOSC && CXD56_LPADC1 + range 2 15 if CXD56_SCU_XOSC && CXD56_LPADC1 + range 12 15 if CXD56_SCU_32K && CXD56_LPADC0_1 + range 6 15 if CXD56_SCU_RCOSC && CXD56_LPADC0_1 + range 6 15 if CXD56_SCU_XOSC && CXD56_LPADC0_1 + range 11 15 if CXD56_SCU_32K && CXD56_LPADC_ALL + range 7 15 if CXD56_SCU_RCOSC && CXD56_LPADC_ALL + range 7 15 if CXD56_SCU_XOSC && CXD56_LPADC_ALL ---help--- This configuration set to sampling frequency calculated by the following formula. - Sampling frequency = SCU32K / 2 ^ n [Hz] - Note. Setable range depends on the SCU clock mode. + + Note: Available range depends on the SCU clock mode. + + (Use channel 1 only) Sampling frequency = SCU32K / 2 ^ n [Hz] SCU32K : 11 to 15 RCOSC : 3 to 15 XOSC : 2 to 15 + (Use channel 0/1) Sampling frequency = SCU32K / 2 ^ (n+1) [Hz] + SCU32K : 12 to 15 + RCOSC : 6 to 15 + XOSC : 6 to 15 + + (Use all of channels) Sampling frequency = SCU32K / 2 ^ (n+2) [Hz] + SCU32K : 11 to 15 + RCOSC : 7 to 15 + XOSC : 7 to 15 + config CXD56_LPADC1_OFFSET int "Offset" default 0 @@ -770,235 +816,29 @@ config CXD56_LPADC1_FSIZE endmenu # CXD56_LPADC1 -menu "LADC2" - depends on CXD56_LPADC2 +menu "LPADC2" + depends on CXD56_LPADC2 || CXD56_LPADC_ALL config CXD56_LPADC2_FREQ int "Coefficient of sampling frequency" default 12 - range 11 15 if CXD56_SCU_32K - range 3 15 if CXD56_SCU_RCOSC - range 2 15 if CXD56_SCU_XOSC + range 11 15 if CXD56_SCU_32K && CXD56_LPADC2 + range 3 15 if CXD56_SCU_RCOSC && CXD56_LPADC2 + range 2 15 if CXD56_SCU_XOSC && CXD56_LPADC2 + range 11 15 if CXD56_SCU_32K && CXD56_LPADC_ALL + range 7 15 if CXD56_SCU_RCOSC && CXD56_LPADC_ALL + range 7 15 if CXD56_SCU_XOSC && CXD56_LPADC_ALL ---help--- This configuration set to sampling frequency calculated by the following formula. - Sampling frequency = SCU32K / 2 ^ n [Hz] - Note. Setable range depends on the SCU clock mode. + + Note: Available range depends on the SCU clock mode. + + (Use channel 2 only) Sampling frequency = SCU32K / 2 ^ n [Hz] SCU32K : 11 to 15 RCOSC : 3 to 15 XOSC : 2 to 15 -config CXD56_LPADC2_OFFSET - int "Offset" - default 0 - range 0 65535 - -config CXD56_LPADC2_GAIN - int "Gain" - default 0 - range 0 65535 - -config CXD56_LPADC2_FSIZE - int "SCU FIFO size" - default 16 - range 2 40960 - ---help--- - SCU FIFO size - -endmenu # CXD56_LPADC2 - -menu "LADC3" - depends on CXD56_LPADC3 - -config CXD56_LPADC3_FREQ - int "Coefficient of sampling frequency" - default 12 - range 11 15 if CXD56_SCU_32K - range 3 15 if CXD56_SCU_RCOSC - range 2 15 if CXD56_SCU_XOSC - ---help--- - This configuration set to sampling frequency calculated by the following formula. - Sampling frequency = SCU32K / 2 ^ n [Hz] - Note. Setable range depends on the SCU clock mode. - SCU32K : 11 to 15 - RCOSC : 3 to 15 - XOSC : 2 to 15 - -config CXD56_LPADC3_OFFSET - int "Offset" - default 0 - range 0 65535 - -config CXD56_LPADC3_GAIN - int "Gain" - default 0 - range 0 65535 - -config CXD56_LPADC3_FSIZE - int "SCU FIFO size" - default 16 - range 2 40960 - ---help--- - SCU FIFO size - -endmenu # CXD56_LPADC3 - -menu "LADC0" - depends on CXD56_LPADC0_1 - -config CXD56_LPADC0_FREQ - int "Coefficient of sampling frequency" - default 12 - range 12 15 if CXD56_SCU_32K - range 6 15 if CXD56_SCU_RCOSC - range 6 15 if CXD56_SCU_XOSC - ---help--- - This configuration set to sampling frequency calculated by the following formula. - Sampling frequency = SCU32K / 2 ^ (n+1) [Hz] - Note. Setable range depends on the SCU clock mode. - SCU32K : 12 to 15 - RCOSC : 6 to 15 - XOSC : 6 to 15 - -config CXD56_LPADC0_OFFSET - int "Offset" - default 0 - range 0 65535 - -config CXD56_LPADC0_GAIN - int "Gain" - default 0 - range 0 65535 - -config CXD56_LPADC0_FSIZE - int "SCU FIFO size" - default 16 - range 2 40960 - ---help--- - SCU FIFO size - -endmenu # CXD56_LPADC0_1 - -menu "LADC1" - depends on CXD56_LPADC0_1 - -config CXD56_LPADC1_FREQ - int "Coefficient of sampling frequency" - default 12 - range 12 15 if CXD56_SCU_32K - range 6 15 if CXD56_SCU_RCOSC - range 6 15 if CXD56_SCU_XOSC - ---help--- - This configuration set to sampling frequency calculated by the following formula. - Sampling frequency = SCU32K / 2 ^ (n+1) [Hz] - Note. Setable range depends on the SCU clock mode. - SCU32K : 12 to 15 - RCOSC : 6 to 15 - XOSC : 6 to 15 - -config CXD56_LPADC1_OFFSET - int "Offset" - default 0 - range 0 65535 - -config CXD56_LPADC1_GAIN - int "Gain" - default 0 - range 0 65535 - -config CXD56_LPADC1_FSIZE - int "SCU FIFO size" - default 16 - range 2 40960 - ---help--- - SCU FIFO size - -endmenu # CXD56_LPADC0_1 - -menu "LADC0" - depends on CXD56_LPADC_ALL - -config CXD56_LPADC0_FREQ - int "Coefficient of sampling frequency" - default 12 - range 11 15 if CXD56_SCU_32K - range 7 15 if CXD56_SCU_RCOSC - range 7 15 if CXD56_SCU_XOSC - ---help--- - This configuration set to sampling frequency calculated by the following formula. - Sampling frequency = SCU32K / 2 ^ (n+2) [Hz] - Note. Setable range depends on the SCU clock mode. - SCU32K : 11 to 15 - RCOSC : 7 to 15 - XOSC : 7 to 15 - -config CXD56_LPADC0_OFFSET - int "Offset" - default 0 - range 0 65535 - -config CXD56_LPADC0_GAIN - int "Gain" - default 0 - range 0 65535 - -config CXD56_LPADC0_FSIZE - int "SCU FIFO size" - default 16 - range 2 40960 - ---help--- - SCU FIFO size - -endmenu # CXD56_LPADC_ALL - -menu "LADC1" - depends on CXD56_LPADC_ALL - -config CXD56_LPADC1_FREQ - int "Coefficient of sampling frequency" - default 12 - range 11 15 if CXD56_SCU_32K - range 7 15 if CXD56_SCU_RCOSC - range 7 15 if CXD56_SCU_XOSC - ---help--- - This configuration set to sampling frequency calculated by the following formula. - Sampling frequency = SCU32K / 2 ^ (n+2) [Hz] - Note. Setable range depends on the SCU clock mode. - SCU32K : 11 to 15 - RCOSC : 7 to 15 - XOSC : 7 to 15 - -config CXD56_LPADC1_OFFSET - int "Offset" - default 0 - range 0 65535 - -config CXD56_LPADC1_GAIN - int "Gain" - default 0 - range 0 65535 - -config CXD56_LPADC1_FSIZE - int "SCU FIFO size" - default 16 - range 2 40960 - ---help--- - SCU FIFO size - -endmenu # CXD56_LPADC_ALL - -menu "LADC2" - depends on CXD56_LPADC_ALL - -config CXD56_LPADC2_FREQ - int "Coefficient of sampling frequency" - default 12 - range 11 15 if CXD56_SCU_32K - range 7 15 if CXD56_SCU_RCOSC - range 7 15 if CXD56_SCU_XOSC - ---help--- - This configuration set to sampling frequency calculated by the following formula. - Sampling frequency = SCU32K / 2 ^ (n+2) [Hz] - Note. Setable range depends on the SCU clock mode. + (Use all of channels) Sampling frequency = SCU32K / 2 ^ (n+2) [Hz] SCU32K : 11 to 15 RCOSC : 7 to 15 XOSC : 7 to 15 @@ -1020,21 +860,31 @@ config CXD56_LPADC2_FSIZE ---help--- SCU FIFO size -endmenu # CXD56_LPADC_ALL +endmenu # CXD56_LPADC2 -menu "LADC3" - depends on CXD56_LPADC_ALL +menu "LPADC3" + depends on CXD56_LPADC3 || CXD56_LPADC_ALL config CXD56_LPADC3_FREQ int "Coefficient of sampling frequency" default 12 - range 11 15 if CXD56_SCU_32K - range 7 15 if CXD56_SCU_RCOSC - range 7 15 if CXD56_SCU_XOSC + range 11 15 if CXD56_SCU_32K && CXD56_LPADC3 + range 3 15 if CXD56_SCU_RCOSC && CXD56_LPADC3 + range 2 15 if CXD56_SCU_XOSC && CXD56_LPADC3 + range 11 15 if CXD56_SCU_32K && CXD56_LPADC_ALL + range 7 15 if CXD56_SCU_RCOSC && CXD56_LPADC_ALL + range 7 15 if CXD56_SCU_XOSC && CXD56_LPADC_ALL ---help--- This configuration set to sampling frequency calculated by the following formula. - Sampling frequency = SCU32K / 2 ^ (n+2) [Hz] - Note. Setable range depends on the SCU clock mode. + + Note: Available range depends on the SCU clock mode. + + (Use channel 3 only) Sampling frequency = SCU32K / 2 ^ n [Hz] + SCU32K : 11 to 15 + RCOSC : 3 to 15 + XOSC : 2 to 15 + + (Use all of channels) Sampling frequency = SCU32K / 2 ^ (n+2) [Hz] SCU32K : 11 to 15 RCOSC : 7 to 15 XOSC : 7 to 15 @@ -1056,12 +906,11 @@ config CXD56_LPADC3_FSIZE ---help--- SCU FIFO size -endmenu # CXD56_LPADC_ALL +endmenu # CXD56_LPADC3 endif # CXD56_LPADC endif # CXD56_ADC - menuconfig CXD56_SCU bool "Sensor Control Unit (SCU)" default y diff --git a/arch/arm/src/cxd56xx/cxd56_cpufifo.c b/arch/arm/src/cxd56xx/cxd56_cpufifo.c index c2edda9c05..98a286d3c1 100644 --- a/arch/arm/src/cxd56xx/cxd56_cpufifo.c +++ b/arch/arm/src/cxd56xx/cxd56_cpufifo.c @@ -75,7 +75,7 @@ struct cfpushdata_s static int cpufifo_txhandler(int irq, FAR void *context, FAR void *arg); static int cpufifo_rxhandler(int irq, FAR void *context, FAR void *arg); static int cpufifo_trypush(uint32_t data[2]); -static void cpufifo_reserve(uint32_t data[2]); +static int cpufifo_reserve(uint32_t data[2]); /**************************************************************************** * Private Data @@ -148,21 +148,25 @@ static int cpufifo_trypush(uint32_t data[2]) return OK; } -static void cpufifo_reserve(uint32_t data[2]) +static int cpufifo_reserve(uint32_t data[2]) { FAR struct cfpushdata_s *pd; pd = (FAR struct cfpushdata_s *)sq_remfirst(&g_emptyqueue); - /* This assertion indicate that need more sending buffer, it can be + /* This error indicates that need more sending buffer, it can be * configured by CONFIG_CXD56_CPUFIFO_ENTRIES. */ - ASSERT(pd); + if (!pd) + { + return -EAGAIN; + } pd->data[0] = data[0]; pd->data[1] = data[1]; sq_addlast(&pd->entry, &g_pushqueue); + return OK; } /**************************************************************************** @@ -177,8 +181,8 @@ int cxd56_cfpush(uint32_t data[2]) flags = enter_critical_section(); if (!sq_empty(&g_pushqueue)) { - cpufifo_reserve(data); - return OK; + ret = cpufifo_reserve(data); + return ret; } ret = cpufifo_trypush(data); diff --git a/arch/arm/src/cxd56xx/cxd56_farapistub.h b/arch/arm/src/cxd56xx/cxd56_farapistub.h index 8a9fd33dd9..c3790d0cd9 100644 --- a/arch/arm/src/cxd56xx/cxd56_farapistub.h +++ b/arch/arm/src/cxd56xx/cxd56_farapistub.h @@ -36,6 +36,6 @@ #ifndef __ARCH_ARM_SRC_CXD56XX_CXD56_FARAPISTUB_H #define __ARCH_ARM_SRC_CXD56XX_CXD56_FARAPISTUB_H -#define FARAPISTUB_VERSION 17639 +#define FARAPISTUB_VERSION 17660 #endif /* __ARCH_ARM_SRC_CXD56XX_CXD56_FARAPISTUB_H */ diff --git a/arch/arm/src/cxd56xx/cxd56_i2c.c b/arch/arm/src/cxd56xx/cxd56_i2c.c index 821bbbc7bf..16e67b3d10 100644 --- a/arch/arm/src/cxd56xx/cxd56_i2c.c +++ b/arch/arm/src/cxd56xx/cxd56_i2c.c @@ -283,25 +283,20 @@ static void cxd56_i2c_setfrequency(struct cxd56_i2cdev_s *priv, base /= 1000; - switch (frequency) + if (frequency <= 100000) { - case 100000: - tLow = 4700000; - tHigh = 4000000; - break; - - case 400000: - tLow = 1300000; - tHigh = 600000; - break; - - case 1000000: - tLow = 500000; - tHigh = 260000; - break; - - default: - return; + tLow = 4700000; + tHigh = 4000000; + } + else if (frequency <= 400000) + { + tLow = 1300000; + tHigh = 600000; + } + else + { + tLow = 500000; + tHigh = 260000; } if (frequency > 100000) diff --git a/arch/arm/src/cxd56xx/cxd56_icc.c b/arch/arm/src/cxd56xx/cxd56_icc.c index a7dc5b17df..ac1bf27aa5 100644 --- a/arch/arm/src/cxd56xx/cxd56_icc.c +++ b/arch/arm/src/cxd56xx/cxd56_icc.c @@ -234,7 +234,7 @@ static int icc_irqhandler(int cpuid, uint32_t word[2]) if (!req) { iccerr("Receive buffer is full.\n"); - return -ENOMEM; + PANIC(); } req->word[0] = word[0]; diff --git a/arch/arm/src/cxd56xx/cxd56_sdhci.c b/arch/arm/src/cxd56xx/cxd56_sdhci.c index ecc679f89e..94949533be 100644 --- a/arch/arm/src/cxd56xx/cxd56_sdhci.c +++ b/arch/arm/src/cxd56xx/cxd56_sdhci.c @@ -344,8 +344,7 @@ struct cxd56_sdhcregs_s uint32_t htcapblt; /* Host Controller Capabilities */ uint32_t admaes; /* ADMA Error Status Register */ uint32_t adsaddr; /* ADMA System Address Register */ - uint32_t vendor; /* Vendor Specific Register */ - uint32_t hostver; /* Host Controller Version */ + uint32_t vendspec; /* Vendor Specific Register */ }; #endif @@ -697,8 +696,7 @@ static void cxd56_sdhcsample(struct cxd56_sdhcregs_s *regs) regs->htcapblt = getreg32(CXD56_SDHCI_HTCAPBLT); /* Host Controller Capabilities */ regs->admaes = getreg32(CXD56_SDHCI_ADMAES); /* ADMA Error Status Register */ regs->adsaddr = getreg32(CXD56_SDHCI_ADSADDR); /* ADMA System Address Register */ - regs->vendor = getreg32(CXD56_SDHCI_VENDOR); /* Vendor Specific Register */ - regs->hostver = getreg32(CXD56_SDHCI_HOSTVER); /* Host Controller Version */ + regs->vendspec = getreg32(CXD56_SDHCI_VENDSPEC); /* Vendor Specific Register */ } #endif @@ -748,7 +746,7 @@ static void cxd56_dumpsample(struct cxd56_sdiodev_s *priv, mcinfo(" HTCAPBLT[%08x]: %08x\n", CXD56_SDHCI_HTCAPBLT, regs->htcapblt); mcinfo(" ADMAES[%08x]: %08x\n", CXD56_SDHCI_ADMAES, regs->admaes); mcinfo(" ADSADDR[%08x]: %08x\n", CXD56_SDHCI_ADSADDR, regs->adsaddr); - mcinfo(" HOSTVER[%08x]: %08x\n", CXD56_SDHCI_HOSTVER, regs->hostver); + mcinfo(" VENDSPEC[%08x]: %08x\n", CXD56_SDHCI_VENDSPEC, regs->hostver); } #endif @@ -1285,6 +1283,16 @@ static int cxd56_interrupt(int irq, FAR void *context, FAR void *arg) } #endif /* CONFIG_CXD56_SDIO_ENABLE_MULTIFUNCTION */ + /* Handle error interrupts ************************************************/ + + if ((getreg32(CXD56_SDHCI_IRQSTAT) & SDHCI_INT_EINT) != 0) + { + /* Clear error interrupts */ + + mcerr("ERROR: Occur error interrupts: %08x\n", enabled); + putreg32(enabled & SDHCI_EINT_MASK, CXD56_SDHCI_IRQSTAT); + } + /* Handle wait events *****************************************************/ pending = enabled & priv->waitints; @@ -1342,11 +1350,17 @@ static int cxd56_interrupt(int irq, FAR void *context, FAR void *arg) #ifdef CONFIG_SDIO_MUXBUS static int cxd56_sdio_lock(FAR struct sdio_dev_s *dev, bool lock) { - /* Single SDIO instance so there is only one possibility. The multiplex - * bus is part of board support package. - */ + /* Enable SD clock only while accessing to the SDIO. */ + + if (lock) + { + modifyreg32(CXD56_SDHCI_SYSCTL, 0, SDHCI_SYSCTL_SDCLKEN); + } + else + { + modifyreg32(CXD56_SDHCI_SYSCTL, SDHCI_SYSCTL_SDCLKEN, 0); + } - cxd56_muxbus_sdio_lock(lock); return OK; } #endif @@ -1411,6 +1425,22 @@ static void cxd56_sdio_sdhci_reset(FAR struct sdio_dev_s *dev) getreg32(CXD56_SDHCI_SYSCTL), getreg32(CXD56_SDHCI_PRSSTAT), getreg32(CXD56_SDHCI_IRQSTATEN)); + /* Initialize the SDHC slot structure data structure */ + /* Initialize semaphores */ + + sem_init(&priv->waitsem, 0, 0); + + /* The waitsem semaphore is used for signaling and, hence, should not have + * priority inheritance enabled. + */ + + sem_setprotocol(&priv->waitsem, SEM_PRIO_NONE); + + /* Create a watchdog timer */ + + priv->waitwdog = wd_create(); + DEBUGASSERT(priv->waitwdog); + /* The next phase of the hardware reset would be to set the SYSCTRL INITA * bit to send 80 clock ticks for card to power up and then reset the card * with CMD0. This is done elsewhere. @@ -1418,10 +1448,6 @@ static void cxd56_sdio_sdhci_reset(FAR struct sdio_dev_s *dev) /* Reset state data */ - sem_init(&priv->waitsem, 0, 1); - priv->waitwdog = wd_create(); - DEBUGASSERT(priv->waitwdog); - sem_init(&priv->waitsem, 0, 1); priv->waitevents = 0; /* Set of events to be waited for */ priv->waitints = 0; /* Interrupt enables for event waiting */ priv->wkupevent = 0; /* The event that caused the wakeup */ diff --git a/arch/arm/src/cxd56xx/cxd56_sdhci.h b/arch/arm/src/cxd56xx/cxd56_sdhci.h index 25092588e6..6295bdc0a8 100644 --- a/arch/arm/src/cxd56xx/cxd56_sdhci.h +++ b/arch/arm/src/cxd56xx/cxd56_sdhci.h @@ -82,7 +82,6 @@ extern "C" #define CXD56_SDHCI_FEVT_OFFSET (0x0050) /* Force Event Register */ #define CXD56_SDHCI_ADMAES_OFFSET (0x0054) /* ADMA Error Status Register */ #define CXD56_SDHCI_ADSADDR_OFFSET (0x0058) /* ADMA System Address Register */ -#define CXD56_SDHCI_HOSTVER_OFFSET (0x00fc) /* Host Controller Version */ #define CXD56_SDHCI_VENDSPEC_OFFSET (0x0110) /* Vender Specific Control */ #define CXD56_SDHCI_OTHERIOLL_OFFSET (0x021C) /* IO Pin Control */ #define CXD56_SDHCI_USERDEF1CTL_OFFSET (0x0270) /* User Define1 Control Register */ @@ -112,7 +111,6 @@ extern "C" #define CXD56_SDHCI_FEVT (CXD56_SDHCI_BASE+CXD56_SDHCI_FEVT_OFFSET) #define CXD56_SDHCI_ADMAES (CXD56_SDHCI_BASE+CXD56_SDHCI_ADMAES_OFFSET) #define CXD56_SDHCI_ADSADDR (CXD56_SDHCI_BASE+CXD56_SDHCI_ADSADDR_OFFSET) -#define CXD56_SDHCI_HOSTVER (CXD56_SDHCI_BASE+CXD56_SDHCI_HOSTVER_OFFSET) #define CXD56_SDHCI_VENDSPEC (CXD56_SDHCI_BASE+CXD56_SDHCI_VENDSPEC_OFFSET) #define CXD56_SDHCI_OTHERIOLL (CXD56_SDHCI_BASE+CXD56_SDHCI_OTHERIOLL_OFFSET) #define CXD56_SDHCI_USERDEF1CTL (CXD56_SDHCI_BASE+CXD56_SDHCI_USERDEF1CTL_OFFSET) @@ -261,8 +259,9 @@ extern "C" #define SDHCI_INT_CINS (1 << 6) /* Bit 6: Card Insertion */ #define SDHCI_INT_CRM (1 << 7) /* Bit 7: Card Removal */ #define SDHCI_INT_CINT (1 << 8) /* Bit 8: Card Interrupt */ - /* Bits 9-15: Reserved */ + /* Bits 9-14: Reserved */ +#define SDHCI_INT_EINT (1 << 15) /* Bit 15: Error Interrupt */ #define SDHCI_INT_CTOE (1 << 16) /* Bit 16: Command Timeout Error */ #define SDHCI_INT_CCE (1 << 17) /* Bit 17: Command CRC Error */ #define SDHCI_INT_CEBE (1 << 18) /* Bit 18: Command End Bit Error */ @@ -278,6 +277,7 @@ extern "C" #define SDHCI_INT_DMAE (1 << 28) /* Bit 28: DMA Error */ /* Bits 29-31: Reserved */ +#define SDHCI_EINT_MASK 0xffff0000 #define SDHCI_INT_ALL 0x117f01ff /* Auto CMD12 Error Status Register */ diff --git a/boards/arm/cxd56xx/spresense/src/cxd56_power.c b/boards/arm/cxd56xx/spresense/src/cxd56_power.c index 9a2ee9b259..7db199b30c 100644 --- a/boards/arm/cxd56xx/spresense/src/cxd56_power.c +++ b/boards/arm/cxd56xx/spresense/src/cxd56_power.c @@ -70,7 +70,7 @@ ****************************************************************************/ static sem_t g_ltsem = SEM_INITIALIZER(1); -static bool g_used_lna = true; +static bool g_used_lna = false; static bool g_used_tcxo = true; #ifdef CONFIG_BOARDCTL_RESET static struct pm_cpu_freqlock_s g_hv_lock = diff --git a/boards/arm/cxd56xx/spresense/src/cxd56_sdcard.c b/boards/arm/cxd56xx/spresense/src/cxd56_sdcard.c index c7c63d2354..93ff8c5976 100644 --- a/boards/arm/cxd56xx/spresense/src/cxd56_sdcard.c +++ b/boards/arm/cxd56xx/spresense/src/cxd56_sdcard.c @@ -336,15 +336,13 @@ int board_sdcard_initialize(void) { int ret = OK; - cxd56_gpio_config(SDCARD_TXS02612_SEL, false); - #ifdef CONFIG_SDCARD_TXS02612_PORT0 - /* Select port0 for SD-Card */ + /* Select port0 for SD-Card (default) */ - cxd56_gpio_write(SDCARD_TXS02612_SEL, false); #else /* Select port1 for SDIO other than SD-Card */ + cxd56_gpio_config(SDCARD_TXS02612_SEL, false); cxd56_gpio_write(SDCARD_TXS02612_SEL, true); #endif