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boards/stm32h7: add Waveshare OpenH743I board

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raiden00pl 2024-02-26 18:24:47 +01:00 committed by Xiang Xiao
parent be1750d041
commit 8210604886
21 changed files with 2420 additions and 0 deletions
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24
Documentation/platforms/arm/stm32h7/boards/openh743i/index.rst Normal file
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@ -0,0 +1,24 @@
===================
Waveshare OpenH743I
===================
The OpenH743I-C is an STM32 development board with STM32H743IIT6.
It comes with a rich expansion interface to support access to various
peripheral modules.
.. note:: This board has very poor signal integrity.
Peripherals
===========
SDMMC
-----
The SDMMC1 interface seems not to work correctly with clock frequencies higher
than 20 MHz.
USBHS
-----
The reset pin on the ULPI port must be connected to the PE2 pin of the MCU.
If it's not connected, ULPI interface may not work correctly without power reset.

10
boards/Kconfig
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@ -1731,6 +1731,12 @@ config ARCH_BOARD_LINUM_STM32H753BI
---help---
The Linum board is based on the STMicro STM32H753BI MCU.
config ARCH_BOARD_OPENH743I
bool "Waveshare OpenH743I board"
depends on ARCH_CHIP_STM32H743II
---help---
Waveshare OpenH743I board based on the STMicro STM32H743II MCU.
config ARCH_BOARD_NUCLEO_L152RE
bool "STM32L152 Nucleo L152RE"
depends on ARCH_CHIP_STM32L152RE
@ -3228,6 +3234,7 @@ config ARCH_BOARD
default "nucleo-h745zi" if ARCH_BOARD_NUCLEO_H745ZI
default "stm32h745i-disco" if ARCH_BOARD_STM32H745I_DISCO
default "linum-stm32h753bi" if ARCH_BOARD_LINUM_STM32H753BI
default "openh743i" if ARCH_BOARD_OPENH743I
default "nucleo-l073rz" if ARCH_BOARD_NUCLEO_L073RZ
default "nucleo-l152re" if ARCH_BOARD_NUCLEO_L152RE
default "nucleo-l432kc" if ARCH_BOARD_NUCLEO_L432KC
@ -3856,6 +3863,9 @@ endif
if ARCH_BOARD_LINUM_STM32H753BI
source "boards/arm/stm32h7/linum-stm32h753bi/Kconfig"
endif
if ARCH_BOARD_OPENH743I
source "boards/arm/stm32h7/openh743i/Kconfig"
endif
if ARCH_BOARD_B_L475E_IOT01A
source "boards/arm/stm32l4/b-l475e-iot01a/Kconfig"
endif

21
boards/arm/stm32h7/openh743i/CMakeLists.txt Normal file
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@ -0,0 +1,21 @@
# ##############################################################################
# boards/arm/stm32h7/openh743i/CMakeLists.txt
#
# Licensed to the Apache Software Foundation (ASF) under one or more contributor
# license agreements. See the NOTICE file distributed with this work for
# additional information regarding copyright ownership. The ASF licenses this
# file to you under the Apache License, Version 2.0 (the "License"); you may not
# use this file except in compliance with the License. You may obtain a copy of
# the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations under
# the License.
#
# ##############################################################################
add_subdirectory(src)

18
boards/arm/stm32h7/openh743i/Kconfig Normal file
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@ -0,0 +1,18 @@
#
# For a description of the syntax of this configuration file,
# see the file kconfig-language.txt in the NuttX tools repository.
#
if ARCH_BOARD_OPENH743I
config OPENH743I_DISABLE_OTGFS_PWRON
bool "Disable OTGFS PWRON pin"
depends on USBHOST
default n
---help---
This option disable PWRON pin control from MCU.
Setting PWRON in high state somehow breaks USBDEV on OTGHS.
If both OTG peripherals are used, and OTGFS is used as HOST,
then the power switch enable pin must be set directly from 3.3V bus.
endif # ARCH_BOARD_OPENH743I

89
boards/arm/stm32h7/openh743i/configs/composite_fs/defconfig Normal file
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#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_DEV_CONSOLE is not set
# CONFIG_MMCSD_MMCSUPPORT is not set
# CONFIG_STM32H7_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="openh743i"
CONFIG_ARCH_BOARD_OPENH743I=y
CONFIG_ARCH_CHIP="stm32h7"
CONFIG_ARCH_CHIP_STM32H743II=y
CONFIG_ARCH_CHIP_STM32H7=y
CONFIG_ARCH_CHIP_STM32H7_CORTEXM7=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARMV7M_DCACHE=y
CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y
CONFIG_ARMV7M_DTCM=y
CONFIG_ARMV7M_ICACHE=y
CONFIG_BOARDCTL_USBDEVCTRL=y
CONFIG_BOARD_LOOPSPERMSEC=43103
CONFIG_BUILTIN=y
CONFIG_CDCACM=y
CONFIG_CDCACM_COMPOSITE=y
CONFIG_CDCACM_CONSOLE=y
CONFIG_COMPOSITE_IAD=y
CONFIG_DEBUG_FULLOPT=y
CONFIG_DEBUG_SYMBOLS=y
CONFIG_EXPERIMENTAL=y
CONFIG_FS_PROCFS=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INTELHEX_BINARY=y
CONFIG_MMCSD=y
CONFIG_MMCSD_SDIO=y
CONFIG_NET=y
CONFIG_NETDB_DNSCLIENT=y
CONFIG_NETDB_DNSSERVER_IPv4ADDR=0x0
CONFIG_NETDEV_LATEINIT=y
CONFIG_NETDEV_STATISTICS=y
CONFIG_NETINIT_DHCPC=y
CONFIG_NETINIT_DRIPADDR=0x0
CONFIG_NETINIT_MACADDR_1=0xdeadcafe
CONFIG_NETINIT_NETMASK=0x0
CONFIG_NETINIT_NOMAC=y
CONFIG_NETINIT_THREAD=y
CONFIG_NETUTILS_DHCPC=y
CONFIG_NETUTILS_IPERF=y
CONFIG_NETUTILS_TELNETD=y
CONFIG_NET_ARP_SEND=y
CONFIG_NET_BROADCAST=y
CONFIG_NET_ICMP=y
CONFIG_NET_ICMP_SOCKET=y
CONFIG_NET_LOOPBACK=y
CONFIG_NET_STATISTICS=y
CONFIG_NET_TCP=y
CONFIG_NET_TCP_WRITE_BUFFERS=y
CONFIG_NET_UDP=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_DISABLE_IFUPDOWN=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_LINELEN=64
CONFIG_NSH_READLINE=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAM_SIZE=245760
CONFIG_RAM_START=0x20010000
CONFIG_RAW_BINARY=y
CONFIG_RNDIS=y
CONFIG_RNDIS_COMPOSITE=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_HPWORK=y
CONFIG_SCHED_LPWORK=y
CONFIG_SCHED_WAITPID=y
CONFIG_START_DAY=6
CONFIG_START_MONTH=12
CONFIG_START_YEAR=2011
CONFIG_STM32H7_HSI48=y
CONFIG_STM32H7_OTGFS=y
CONFIG_STM32H7_SDMMC1=y
CONFIG_SYSTEM_NSH=y
CONFIG_TASK_NAME_SIZE=0
CONFIG_USBDEV=y
CONFIG_USBDEV_COMPOSITE=y
CONFIG_USBMSC=y
CONFIG_USBMSC_COMPOSITE=y

97
boards/arm/stm32h7/openh743i/configs/composite_hs/defconfig Normal file
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@ -0,0 +1,97 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_DEV_CONSOLE is not set
# CONFIG_MMCSD_MMCSUPPORT is not set
# CONFIG_STM32H7_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="openh743i"
CONFIG_ARCH_BOARD_OPENH743I=y
CONFIG_ARCH_CHIP="stm32h7"
CONFIG_ARCH_CHIP_STM32H743II=y
CONFIG_ARCH_CHIP_STM32H7=y
CONFIG_ARCH_CHIP_STM32H7_CORTEXM7=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARMV7M_DCACHE=y
CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y
CONFIG_ARMV7M_DTCM=y
CONFIG_ARMV7M_ICACHE=y
CONFIG_BOARD_LOOPSPERMSEC=43103
CONFIG_BUILTIN=y
CONFIG_CDCACM=y
CONFIG_CDCACM_COMPOSITE=y
CONFIG_COMPOSITE_IAD=y
CONFIG_DEBUG_SYMBOLS=y
CONFIG_EXPERIMENTAL=y
CONFIG_FS_PROCFS=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INTELHEX_BINARY=y
CONFIG_MMCSD=y
CONFIG_MMCSD_SDIO=y
CONFIG_NET=y
CONFIG_NETDB_DNSCLIENT=y
CONFIG_NETDB_DNSSERVER_IPv4ADDR=0x0
CONFIG_NETDEV_LATEINIT=y
CONFIG_NETDEV_STATISTICS=y
CONFIG_NETINIT_DHCPC=y
CONFIG_NETINIT_DRIPADDR=0x0
CONFIG_NETINIT_MACADDR_1=0xdeadcafe
CONFIG_NETINIT_NETMASK=0x0
CONFIG_NETINIT_NOMAC=y
CONFIG_NETINIT_THREAD=y
CONFIG_NETUTILS_DHCPC=y
CONFIG_NETUTILS_IPERF=y
CONFIG_NETUTILS_TELNETD=y
CONFIG_NET_ARP_SEND=y
CONFIG_NET_BROADCAST=y
CONFIG_NET_ICMP=y
CONFIG_NET_ICMP_SOCKET=y
CONFIG_NET_LOOPBACK=y
CONFIG_NET_STATISTICS=y
CONFIG_NET_TCP=y
CONFIG_NET_TCP_WRITE_BUFFERS=y
CONFIG_NET_UDP=y
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_DISABLE_IFUPDOWN=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_LINELEN=64
CONFIG_NSH_READLINE=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAM_SIZE=245760
CONFIG_RAM_START=0x20010000
CONFIG_RAW_BINARY=y
CONFIG_RNDIS=y
CONFIG_RNDIS_COMPOSITE=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_HPWORK=y
CONFIG_SCHED_LPWORK=y
CONFIG_SCHED_WAITPID=y
CONFIG_START_DAY=6
CONFIG_START_MONTH=12
CONFIG_START_YEAR=2011
CONFIG_STM32H7_HSI48=y
CONFIG_STM32H7_OTGHS=y
CONFIG_STM32H7_OTGHS_EXTERNAL_ULPI=y
CONFIG_STM32H7_SDMMC1=y
CONFIG_STM32H7_SYSCFG_IOCOMPENSATION=y
CONFIG_SYSTEM_COMPOSITE=y
CONFIG_SYSTEM_NSH=y
CONFIG_TASK_NAME_SIZE=0
CONFIG_USBDEV=y
CONFIG_USBDEV_COMPOSITE=y
CONFIG_USBDEV_CUSTOM_TXFIFO_SIZE=y
CONFIG_USBDEV_DUALSPEED=y
CONFIG_USBDEV_EP1_TXFIFO_SIZE=128
CONFIG_USBDEV_EP2_TXFIFO_SIZE=128
CONFIG_USBDEV_EP3_TXFIFO_SIZE=128
CONFIG_USBDEV_EP4_TXFIFO_SIZE=128
CONFIG_USBDEV_EP5_TXFIFO_SIZE=512
CONFIG_USBMSC=y
CONFIG_USBMSC_COMPOSITE=y

49
boards/arm/stm32h7/openh743i/configs/nsh/defconfig Normal file
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@ -0,0 +1,49 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STANDARD_SERIAL is not set
# CONFIG_STM32H7_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="openh743i"
CONFIG_ARCH_BOARD_OPENH743I=y
CONFIG_ARCH_CHIP="stm32h7"
CONFIG_ARCH_CHIP_STM32H743II=y
CONFIG_ARCH_CHIP_STM32H7=y
CONFIG_ARCH_CHIP_STM32H7_CORTEXM7=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARMV7M_DCACHE=y
CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y
CONFIG_ARMV7M_DTCM=y
CONFIG_ARMV7M_ICACHE=y
CONFIG_BOARD_LOOPSPERMSEC=43103
CONFIG_BUILTIN=y
CONFIG_DEBUG_SYMBOLS=y
CONFIG_EXPERIMENTAL=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INTELHEX_BINARY=y
CONFIG_MM_REGIONS=4
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_LINELEN=64
CONFIG_NSH_READLINE=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAM_SIZE=245760
CONFIG_RAM_START=0x20010000
CONFIG_RAW_BINARY=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_WAITPID=y
CONFIG_START_DAY=6
CONFIG_START_MONTH=12
CONFIG_START_YEAR=2011
CONFIG_STM32H7_USART1=y
CONFIG_SYSTEM_NSH=y
CONFIG_TASK_NAME_SIZE=0
CONFIG_USART1_SERIAL_CONSOLE=y

73
boards/arm/stm32h7/openh743i/configs/usbdev_hs_host_fs/defconfig Normal file
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@ -0,0 +1,73 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_DEV_CONSOLE is not set
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STM32H7_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="openh743i"
CONFIG_ARCH_BOARD_OPENH743I=y
CONFIG_ARCH_CHIP="stm32h7"
CONFIG_ARCH_CHIP_STM32H743II=y
CONFIG_ARCH_CHIP_STM32H7=y
CONFIG_ARCH_CHIP_STM32H7_CORTEXM7=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARMV7M_DCACHE=y
CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y
CONFIG_ARMV7M_DTCM=y
CONFIG_ARMV7M_ICACHE=y
CONFIG_BOARD_LOOPSPERMSEC=43103
CONFIG_BUILTIN=y
CONFIG_CDCACM=y
CONFIG_DEBUG_ASSERTIONS=y
CONFIG_DEBUG_ASSERTIONS_EXPRESSION=y
CONFIG_DEBUG_FEATURES=y
CONFIG_DEBUG_SYMBOLS=y
CONFIG_EXPERIMENTAL=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_IDLETHREAD_STACKSIZE=2048
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INTELHEX_BINARY=y
CONFIG_MM_REGIONS=4
CONFIG_NDEBUG=y
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_LINELEN=64
CONFIG_NSH_READLINE=y
CONFIG_OPENH743I_DISABLE_OTGFS_PWRON=y
CONFIG_OTG_ID_GPIO_DISABLE=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAM_SIZE=245760
CONFIG_RAM_START=0x20010000
CONFIG_RAW_BINARY=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_HPWORK=y
CONFIG_SCHED_LPNTHREADS=2
CONFIG_SCHED_LPWORK=y
CONFIG_SCHED_WAITPID=y
CONFIG_STACK_COLORATION=y
CONFIG_STACK_USAGE=y
CONFIG_START_DAY=6
CONFIG_START_MONTH=12
CONFIG_START_YEAR=2011
CONFIG_STM32H7_HSI48=y
CONFIG_STM32H7_OTGFS=y
CONFIG_STM32H7_OTGFS_HOST=y
CONFIG_STM32H7_OTGHS=y
CONFIG_STM32H7_OTGHS_EXTERNAL_ULPI=y
CONFIG_STM32H7_SYSCFG_IOCOMPENSATION=y
CONFIG_SYSTEM_CDCACM=y
CONFIG_SYSTEM_NSH=y
CONFIG_TASK_NAME_SIZE=32
CONFIG_USBDEV=y
CONFIG_USBHOST=y
CONFIG_USBHOST_CDCACM=y
CONFIG_USBHOST_COMPOSITE=y
CONFIG_USBHOST_MSC=y

379
boards/arm/stm32h7/openh743i/include/board.h Normal file
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@ -0,0 +1,379 @@
/****************************************************************************
* boards/arm/stm32h7/openh743i/include/board.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __BOARDS_ARM_STM32H7_OPENH743I_INCLUDE_BOARD_H
#define __BOARDS_ARM_STM32H7_OPENH743I_INCLUDE_BOARD_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#ifndef __ASSEMBLY__
# include <stdint.h>
#endif
/* Do not include STM32 H7 header files here */
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Clocking *****************************************************************/
/* The Openh743i board provides the following clock sources:
*
* X2: 32.768 KHz crystal for LSE
* X2: 8 MHz HSE crystal oscillator
*
* So we have these clock source available within the STM32
*
* HSI: 16 MHz RC factory-trimmed
* LSI: 32 KHz RC
* HSE: 8 MHz oscillator X2
* LSE: 32.768 kHz
*/
#define STM32_BOARD_XTAL 8000000ul
#define STM32_HSI_FREQUENCY 16000000ul
#define STM32_LSI_FREQUENCY 32000
#define STM32_HSE_FREQUENCY STM32_BOARD_XTAL
#define STM32_LSE_FREQUENCY 32768
/* Main PLL Configuration.
*
* PLL source is HSE = 8,000,000
*
* When STM32_HSE_FREQUENCY / PLLM <= 2MHz VCOL must be selected.
* VCOH otherwise.
*
* PLL_VCOx = (STM32_HSE_FREQUENCY / PLLM) * PLLN
* Subject to:
*
* 1 <= PLLM <= 63
* 4 <= PLLN <= 512
* 150 MHz <= PLL_VCOL <= 420MHz
* 192 MHz <= PLL_VCOH <= 836MHz
*
* SYSCLK = PLL_VCO / PLLP
* CPUCLK = SYSCLK / D1CPRE
* Subject to
*
* PLLP1 = {2, 4, 6, 8, ..., 128}
* PLLP2,3 = {2, 3, 4, ..., 128}
* CPUCLK <= 400 MHz
*/
#define STM32_BOARD_USEHSE
#undef STM32_HSEBYP_ENABLE
#define STM32_PLLCFG_PLLSRC RCC_PLLCKSELR_PLLSRC_HSE
/* PLL1, wide 4 - 8 MHz input, enable DIVP, DIVQ, DIVR
*
* PLL1_VCO = (8,000,000 / 2) * 200 = 800 MHz
*
* PLL1P = PLL1_VCO/2 = 800 MHz / 2 = 400 MHz
* PLL1Q = PLL1_VCO/4 = 800 MHz / 4 = 200 MHz
* PLL1R = PLL1_VCO/8 = 800 MHz / 8 = 100 MHz
*/
#define STM32_PLLCFG_PLL1CFG (RCC_PLLCFGR_PLL1VCOSEL_WIDE | \
RCC_PLLCFGR_PLL1RGE_4_8_MHZ | \
RCC_PLLCFGR_DIVP1EN | \
RCC_PLLCFGR_DIVQ1EN | \
RCC_PLLCFGR_DIVR1EN)
#define STM32_PLLCFG_PLL1M RCC_PLLCKSELR_DIVM1(2)
#define STM32_PLLCFG_PLL1N RCC_PLL1DIVR_N1(200)
#define STM32_PLLCFG_PLL1P RCC_PLL1DIVR_P1(2)
#define STM32_PLLCFG_PLL1Q RCC_PLL1DIVR_Q1(4)
#define STM32_PLLCFG_PLL1R RCC_PLL1DIVR_R1(8)
#define STM32_VCO1_FREQUENCY ((STM32_HSE_FREQUENCY / 2) * 200)
#define STM32_PLL1P_FREQUENCY (STM32_VCO1_FREQUENCY / 2)
#define STM32_PLL1Q_FREQUENCY (STM32_VCO1_FREQUENCY / 4)
#define STM32_PLL1R_FREQUENCY (STM32_VCO1_FREQUENCY / 8)
/* PLL2 */
#define STM32_PLLCFG_PLL2CFG (RCC_PLLCFGR_PLL2VCOSEL_WIDE | \
RCC_PLLCFGR_PLL2RGE_4_8_MHZ | \
RCC_PLLCFGR_DIVP2EN)
#define STM32_PLLCFG_PLL2M RCC_PLLCKSELR_DIVM2(2)
#define STM32_PLLCFG_PLL2N RCC_PLL2DIVR_N2(200)
#define STM32_PLLCFG_PLL2P RCC_PLL2DIVR_P2(40)
#define STM32_PLLCFG_PLL2Q 0
#define STM32_PLLCFG_PLL2R 0
#define STM32_VCO2_FREQUENCY ((STM32_HSE_FREQUENCY / 2) * 200)
#define STM32_PLL2P_FREQUENCY (STM32_VCO2_FREQUENCY / 2)
#define STM32_PLL2Q_FREQUENCY
#define STM32_PLL2R_FREQUENCY
/* PLL3, wide 1 - 2 MHz input, enable DIVQ
*
* PLL3_VCO = (8,000,000 / 8) * 336 = 336 MHz
*
* PLL3P - TODO
* PLL3Q = PLL3_VCO / 7 = 336 MHz / 7 = 48 MHz
* PLL3R - TODO
*/
#define STM32_PLLCFG_PLL3CFG (RCC_PLLCFGR_PLL3VCOSEL_WIDE | \
RCC_PLLCFGR_PLL3RGE_1_2_MHZ | \
RCC_PLLCFGR_DIVQ3EN)
#define STM32_PLLCFG_PLL3M RCC_PLLCKSELR_DIVM3(8)
#define STM32_PLLCFG_PLL3N RCC_PLL3DIVR_N3(336)
#define STM32_PLLCFG_PLL3P RCC_PLL3DIVR_P3(2)
#define STM32_PLLCFG_PLL3Q RCC_PLL3DIVR_Q3(7)
#define STM32_PLLCFG_PLL3R RCC_PLL3DIVR_R3(2)
#define STM32_VCO3_FREQUENCY ((STM32_HSE_FREQUENCY / 2) * 100)
#define STM32_PLL3P_FREQUENCY
#define STM32_PLL3Q_FREQUENCY (STM32_VCO3_FREQUENCY / 8)
#define STM32_PLL3R_FREQUENCY
/* SYSCLK = PLL1P = 400 MHz
* CPUCLK = SYSCLK / 1 = 400 MHz
*/
#define STM32_RCC_D1CFGR_D1CPRE (RCC_D1CFGR_D1CPRE_SYSCLK)
#define STM32_SYSCLK_FREQUENCY (STM32_PLL1P_FREQUENCY)
#define STM32_CPUCLK_FREQUENCY (STM32_SYSCLK_FREQUENCY / 1)
/* Configure Clock Assignments */
/* AHB clock (HCLK) is SYSCLK/2 (200 MHz max)
* HCLK1 = HCLK2 = HCLK3 = HCLK4
*/
#define STM32_RCC_D1CFGR_HPRE RCC_D1CFGR_HPRE_SYSCLKd2 /* HCLK = SYSCLK / 2 */
#define STM32_ACLK_FREQUENCY (STM32_CPUCLK_FREQUENCY / 2) /* ACLK in D1, HCLK3 in D1 */
#define STM32_HCLK_FREQUENCY (STM32_CPUCLK_FREQUENCY / 2) /* HCLK in D2, HCLK4 in D3 */
/* APB1 clock (PCLK1) is HCLK/4 (54 MHz) */
#define STM32_RCC_D2CFGR_D2PPRE1 RCC_D2CFGR_D2PPRE1_HCLKd4 /* PCLK1 = HCLK / 4 */
#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/4)
/* APB2 clock (PCLK2) is HCLK/4 (54 MHz) */
#define STM32_RCC_D2CFGR_D2PPRE2 RCC_D2CFGR_D2PPRE2_HCLKd4 /* PCLK2 = HCLK / 4 */
#define STM32_PCLK2_FREQUENCY (STM32_HCLK_FREQUENCY/4)
/* APB3 clock (PCLK3) is HCLK/4 (54 MHz) */
#define STM32_RCC_D1CFGR_D1PPRE RCC_D1CFGR_D1PPRE_HCLKd4 /* PCLK3 = HCLK / 4 */
#define STM32_PCLK3_FREQUENCY (STM32_HCLK_FREQUENCY/4)
/* APB4 clock (PCLK4) is HCLK/4 (54 MHz) */
#define STM32_RCC_D3CFGR_D3PPRE RCC_D3CFGR_D3PPRE_HCLKd4 /* PCLK4 = HCLK / 4 */
#define STM32_PCLK4_FREQUENCY (STM32_HCLK_FREQUENCY/4)
/* Timer clock frequencies */
/* Timers driven from APB1 will be twice PCLK1 */
#define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM5_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM6_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM7_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM12_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM13_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM14_CLKIN (2*STM32_PCLK1_FREQUENCY)
/* Timers driven from APB2 will be twice PCLK2 */
#define STM32_APB2_TIM1_CLKIN (2*STM32_PCLK2_FREQUENCY)
#define STM32_APB2_TIM8_CLKIN (2*STM32_PCLK2_FREQUENCY)
#define STM32_APB2_TIM15_CLKIN (2*STM32_PCLK2_FREQUENCY)
#define STM32_APB2_TIM16_CLKIN (2*STM32_PCLK2_FREQUENCY)
#define STM32_APB2_TIM17_CLKIN (2*STM32_PCLK2_FREQUENCY)
/* Kernel Clock Configuration
*
* Note: look at Table 54 in ST Manual
*/
/* I2C123 clock source - HSI */
#define STM32_RCC_D2CCIP2R_I2C123SRC RCC_D2CCIP2R_I2C123SEL_HSI
/* I2C4 clock source - HSI */
#define STM32_RCC_D3CCIPR_I2C4SRC RCC_D3CCIPR_I2C4SEL_HSI
/* SPI123 clock source - PLL1Q */
#define STM32_RCC_D2CCIP1R_SPI123SRC RCC_D2CCIP1R_SPI123SEL_PLL1
/* SPI45 clock source - APB (PCLK2?) */
#define STM32_RCC_D2CCIP1R_SPI45SRC RCC_D2CCIP1R_SPI45SEL_APB
/* SPI6 clock source - APB (PCLK4) */
#define STM32_RCC_D3CCIPR_SPI6SRC RCC_D3CCIPR_SPI6SEL_PCLK4
#if 1
/* USB 1 and 2 clock source - HSI48 */
# define STM32_RCC_D2CCIP2R_USBSRC RCC_D2CCIP2R_USBSEL_HSI48
#else
/* USB 1 and 2 clock source - PLL3Q */
# define STM32_RCC_D2CCIP2R_USBSRC RCC_D2CCIP2R_USBSEL_PLL3
#endif
/* ADC 1 2 3 clock source - pll2_pclk */
#define STM32_RCC_D3CCIPR_ADCSEL RCC_D3CCIPR_ADCSEL_PLL2
/* FLASH wait states
*
* ------------ ---------- -----------
* Vcore MAX ACLK WAIT STATES
* ------------ ---------- -----------
* 1.15-1.26 V 70 MHz 0
* (VOS1 level) 140 MHz 1
* 210 MHz 2
* 1.05-1.15 V 55 MHz 0
* (VOS2 level) 110 MHz 1
* 165 MHz 2
* 220 MHz 3
* 0.95-1.05 V 45 MHz 0
* (VOS3 level) 90 MHz 1
* 135 MHz 2
* 180 MHz 3
* 225 MHz 4
* ------------ ---------- -----------
*/
#define BOARD_FLASH_WAITSTATES 2
#define BOARD_FLASH_PROGDELAY 3
#define STM32_PWR_VOS_SCALE PWR_D3CR_VOS_SCALE_1
#define STM32_VOS_OVERDRIVE 1 /* Enable VOS0 */
/* SDMMC definitions ********************************************************/
/* Init 400kHz, PLL1Q/(2*250) */
#define STM32_SDMMC_INIT_CLKDIV (250 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT)
/* Set these to 20 MHz (PLL1Q/(2*5)).
* Higher frequency doesn't work, probably due to poor board
* signal integrity
*/
#define STM32_SDMMC_MMCXFR_CLKDIV (5 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT)
#define STM32_SDMMC_SDXFR_CLKDIV (5 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT)
#define STM32_SDMMC_CLKCR_EDGE STM32_SDMMC_CLKCR_NEGEDGE
/* LED definitions **********************************************************/
/* LED index values for use with board_userled() */
#define BOARD_LED1 0
#define BOARD_LED2 1
#define BOARD_LED3 2
#define BOARD_LED4 3
#define BOARD_NLEDS 4
/* LED bits for use with board_userled_all() */
#define BOARD_LED1_BIT (1 << BOARD_LED1)
#define BOARD_LED2_BIT (1 << BOARD_LED2)
#define BOARD_LED3_BIT (1 << BOARD_LED3)
#define BOARD_LED4_BIT (1 << BOARD_LED4)
/* Alternate function pin selections ****************************************/
/* USART1 (CP2102 converter) */
#define GPIO_USART1_RX GPIO_USART1_RX_2 /* PA10 */
#define GPIO_USART1_TX GPIO_USART1_TX_2 /* PA9 */
/* USART3 */
#define GPIO_USART3_RX GPIO_USART3_RX_3 /* PD9 */
#define GPIO_USART3_TX GPIO_USART3_TX_3 /* PD8 */
/* USB OTG ULPI */
#define GPIO_OTG_HS_ULPI_CK (GPIO_OTG_HS_ULPI_CK_0|GPIO_SPEED_100MHz)
#define GPIO_OTG_HS_ULPI_D0 (GPIO_OTG_HS_ULPI_D0_0|GPIO_SPEED_100MHz)
#define GPIO_OTG_HS_ULPI_D1 (GPIO_OTG_HS_ULPI_D1_0|GPIO_SPEED_100MHz)
#define GPIO_OTG_HS_ULPI_D2 (GPIO_OTG_HS_ULPI_D2_0|GPIO_SPEED_100MHz)
#define GPIO_OTG_HS_ULPI_D3 (GPIO_OTG_HS_ULPI_D3_0|GPIO_SPEED_100MHz)
#define GPIO_OTG_HS_ULPI_D4 (GPIO_OTG_HS_ULPI_D4_0|GPIO_SPEED_100MHz)
#define GPIO_OTG_HS_ULPI_D5 (GPIO_OTG_HS_ULPI_D5_0|GPIO_SPEED_100MHz)
#define GPIO_OTG_HS_ULPI_D6 (GPIO_OTG_HS_ULPI_D6_0|GPIO_SPEED_100MHz)
#define GPIO_OTG_HS_ULPI_D7 (GPIO_OTG_HS_ULPI_D7_0|GPIO_SPEED_100MHz)
#define GPIO_OTG_HS_ULPI_DIR (GPIO_OTG_HS_ULPI_DIR_1|GPIO_SPEED_100MHz) /* PC2 */
#define GPIO_OTG_HS_ULPI_NXT (GPIO_OTG_HS_ULPI_NXT_1|GPIO_SPEED_100MHz) /* PC3 */
#define GPIO_OTG_HS_ULPI_STP (GPIO_OTG_HS_ULPI_STP_0|GPIO_SPEED_100MHz)
/* OTGFS */
#define GPIO_OTGFS_DM (GPIO_OTGFS_DM_0|GPIO_SPEED_100MHz)
#define GPIO_OTGFS_DP (GPIO_OTGFS_DP_0|GPIO_SPEED_100MHz)
#define GPIO_OTGFS_ID (GPIO_OTGFS_ID_0|GPIO_SPEED_100MHz)
/* SDMMC */
#define GPIO_SDMMC1_D0 (GPIO_SDMMC1_D0_0|GPIO_SPEED_50MHz)
#define GPIO_SDMMC1_D1 (GPIO_SDMMC1_D1_0|GPIO_SPEED_50MHz)
#define GPIO_SDMMC1_D2 (GPIO_SDMMC1_D2_0|GPIO_SPEED_50MHz)
#define GPIO_SDMMC1_D3 (GPIO_SDMMC1_D3_0|GPIO_SPEED_50MHz)
#define GPIO_SDMMC1_CK (GPIO_SDMMC1_CK_0|GPIO_SPEED_50MHz)
#define GPIO_SDMMC1_CMD (GPIO_SDMMC1_CMD_0|GPIO_SPEED_50MHz)
/****************************************************************************
* Public Data
****************************************************************************/
#ifndef __ASSEMBLY__
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __BOARDS_ARM_STM32H7_OPENH743I_INCLUDE_BOARD_H */

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############################################################################
# boards/arm/stm32h7/openh743i/scripts/Make.defs
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
############################################################################
include $(TOPDIR)/.config
include $(TOPDIR)/tools/Config.mk
include $(TOPDIR)/arch/arm/src/armv7-m/Toolchain.defs
LDSCRIPT = flash.ld
ARCHSCRIPT += $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)
ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
CFLAGS := $(ARCHCFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe
CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
CXXFLAGS := $(ARCHCXXFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe
CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
AFLAGS := $(CFLAGS) -D__ASSEMBLY__
NXFLATLDFLAGS1 = -r -d -warn-common
NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
LDNXFLATFLAGS = -e main -s 2048
# ELF module definitions
CELFFLAGS = $(CFLAGS) -mlong-calls # --target1-abs
CXXELFFLAGS = $(CXXFLAGS) -mlong-calls # --target1-abs
LDELFFLAGS = -r -e main
LDELFFLAGS += -T $(call CONVERT_PATH,$(TOPDIR)/binfmt/libelf/gnu-elf.ld)

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/****************************************************************************
* boards/arm/stm32h7/openh743i/scripts/flash.ld
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/* The STM32H743II has 2048Kb of main FLASH memory. The flash memory is
* partitioned into a User Flash memory and a System Flash memory. Each
* of these memories has two banks:
*
* 1) User Flash memory:
*
* Bank 1: Start address 0x0800:0000 to 0x080F:FFFF with 8 sectors, 128Kb each
* Bank 2: Start address 0x0810:0000 to 0x081F:FFFF with 8 sectors, 128Kb each
*
* 2) System Flash memory:
*
* Bank 1: Start address 0x1FF0:0000 to 0x1FF1:FFFF with 1 x 128Kb sector
* Bank 1: Start address 0x1FF4:0000 to 0x1FF5:FFFF with 1 x 128Kb sector
*
* 3) User option bytes for user configuration, only in Bank 1.
*
* In the STM32H743II, two different boot spaces can be selected through
* the BOOT pin and the boot base address programmed in the BOOT_ADD0 and
* BOOT_ADD1 option bytes:
*
* 1) BOOT=0: Boot address defined by user option byte BOOT_ADD0[15:0].
* ST programmed value: Flash memory at 0x0800:0000
* 2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0].
* ST programmed value: System bootloader at 0x1FF0:0000
*
* NuttX does not modify these option bytes. On the unmodified openh743i
* board, the BOOT0 pin is at ground so by default, the STM32 will boot
* to address 0x0800:0000 in FLASH.
*
* The STM32H743II also has 1024Kb of data SRAM.
* SRAM is split up into several blocks and into three power domains:
*
* 1) TCM SRAMs are dedicated to the Cortex-M7 and are accessible with
* 0 wait states by the Cortex-M7 and by MDMA through AHBS slave bus
*
* 1.1) 128Kb of DTCM-RAM beginning at address 0x2000:0000
*
* The DTCM-RAM is organized as 2 x 64Kb DTCM-RAMs on 2 x 32 bit
* DTCM ports. The DTCM-RAM could be used for critical real-time
* data, such as interrupt service routines or stack / heap memory.
* Both DTCM-RAMs can be used in parallel (for load/store operations)
* thanks to the Cortex-M7 dual issue capability.
*
* 1.2) 64Kb of ITCM-RAM beginning at address 0x0000:0000
*
* This RAM is connected to ITCM 64-bit interface designed for
* execution of critical real-times routines by the CPU.
*
* 2) AXI SRAM (D1 domain) accessible by all system masters except BDMA
* through D1 domain AXI bus matrix
*
* 2.1) 512Kb of SRAM beginning at address 0x2400:0000
*
* 3) AHB SRAM (D2 domain) accessible by all system masters except BDMA
* through D2 domain AHB bus matrix
*
* 3.1) 128Kb of SRAM1 beginning at address 0x3000:0000
* 3.2) 128Kb of SRAM2 beginning at address 0x3002:0000
* 3.3) 32Kb of SRAM3 beginning at address 0x3004:0000
*
* SRAM1 - SRAM3 are one contiguous block: 288Kb at address 0x3000:0000
*
* 4) AHB SRAM (D3 domain) accessible by most of system masters
* through D3 domain AHB bus matrix
*
* 4.1) 64Kb of SRAM4 beginning at address 0x3800:0000
* 4.1) 4Kb of backup RAM beginning at address 0x3880:0000
*
* When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
* where the code expects to begin execution by jumping to the entry point in
* the 0x0800:0000 address range.
*/
MEMORY
{
itcm (rwx) : ORIGIN = 0x00000000, LENGTH = 64K
flash (rx) : ORIGIN = 0x08000000, LENGTH = 2048K
dtcm1 (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
dtcm2 (rwx) : ORIGIN = 0x20010000, LENGTH = 64K
sram (rwx) : ORIGIN = 0x24000000, LENGTH = 512K
sram1 (rwx) : ORIGIN = 0x30000000, LENGTH = 128K
sram2 (rwx) : ORIGIN = 0x30020000, LENGTH = 128K
sram3 (rwx) : ORIGIN = 0x30040000, LENGTH = 32K
sram4 (rwx) : ORIGIN = 0x38000000, LENGTH = 64K
bbram (rwx) : ORIGIN = 0x38800000, LENGTH = 4K
}
OUTPUT_ARCH(arm)
EXTERN(_vectors)
ENTRY(_stext)
SECTIONS
{
.text :
{
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
_etext = ABSOLUTE(.);
} > flash
.init_section :
{
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > flash
.ARM.extab :
{
*(.ARM.extab*)
} > flash
__exidx_start = ABSOLUTE(.);
.ARM.exidx :
{
*(.ARM.exidx*)
} > flash
__exidx_end = ABSOLUTE(.);
_eronly = ABSOLUTE(.);
.data :
{
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
. = ALIGN(4);
_edata = ABSOLUTE(.);
} > sram AT > flash
.bss :
{
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN(4);
_ebss = ABSOLUTE(.);
} > sram
/* Emit the the D3 power domain section for locating BDMA data
*
* Static data with locate_data(".sram4") will be located
* at start of SRAM4; the rest of SRAM4 will be added to the heap.
*/
.sram4_reserve (NOLOAD) :
{
*(.sram4)
. = ALIGN(4);
_sram4_heap_start = ABSOLUTE(.);
} > sram4
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}

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# ##############################################################################
# boards/arm/stm32h7/openh743i/src/CMakeLists.txt
#
# Licensed to the Apache Software Foundation (ASF) under one or more contributor
# license agreements. See the NOTICE file distributed with this work for
# additional information regarding copyright ownership. The ASF licenses this
# file to you under the Apache License, Version 2.0 (the "License"); you may not
# use this file except in compliance with the License. You may obtain a copy of
# the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations under
# the License.
#
# ##############################################################################
set(SRCS stm32_boot.c stm32_bringup.c)
if(CONFIG_BOARDCTL)
list(APPEND SRCS stm32_appinitialize.c)
endif()
if(CONFIG_STM32H7_SDMMC)
list(APPEND SRCS stm32_sdmmc.c)
endif()
if(CONFIG_USBDEV OR CONFIG_USBHOST)
list(APPEND SRCS stm32_usb.c)
endif()
if(CONFIG_USBMSC)
list(APPEND SRCS stm32_usbmsc.c)
endif()
if(CONFIG_USBDEV_COMPOSITE)
list(APPEND SRCS stm32_composite.c)
endif()
target_sources(board PRIVATE ${SRCS})
set_property(GLOBAL PROPERTY LD_SCRIPT "${NUTTX_BOARD_DIR}/scripts/flash.ld")

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############################################################################
# boards/arm/stm32h7/openh743i/src/Makefile
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
############################################################################
include $(TOPDIR)/Make.defs
CSRCS = stm32_boot.c stm32_bringup.c
ifeq ($(CONFIG_BOARDCTL),y)
CSRCS += stm32_appinitialize.c
endif
ifeq ($(CONFIG_STM32H7_SDMMC),y)
CSRCS += stm32_sdmmc.c
endif
ifeq ($(CONFIG_USBDEV),y)
CSRCS += stm32_usb.c
else ifeq ($(CONFIG_USBHOST),y)
CSRCS += stm32_usb.c
endif
ifeq ($(CONFIG_USBMSC),y)
CSRCS += stm32_usbmsc.c
endif
ifeq ($(CONFIG_USBDEV_COMPOSITE),y)
CSRCS += stm32_composite.c
endif
include $(TOPDIR)/boards/Board.mk

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/****************************************************************************
* boards/arm/stm32h7/openh743i/src/openh743i.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __BOARDS_ARM_STM32H7_OPENH743I_SRC_OPENH743I_H
#define __BOARDS_ARM_STM32H7_OPENH743I_SRC_OPENH743I_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/compiler.h>
#include <stdint.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
/* procfs File System */
#ifdef CONFIG_FS_PROCFS
# ifdef CONFIG_NSH_PROC_MOUNTPOINT
# define STM32_PROCFS_MOUNTPOINT CONFIG_NSH_PROC_MOUNTPOINT
# else
# define STM32_PROCFS_MOUNTPOINT "/proc"
# endif
#endif
/* SD/TF Card'detected pin */
#if defined(CONFIG_DISABLE_MOUNTPOINT) || !defined(CONFIG_MMCSD_SDIO)
# undef HAVE_SDIO
#endif
#define GPIO_SDIO_NCD (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTC|GPIO_PIN13)
#define SDIO_SLOTNO 0
#define SDIO_MINOR 0
/* ULPI */
#define GPIO_ULPI_RESET (GPIO_OUTPUT|GPIO_PORTE|GPIO_PIN2|GPIO_OUTPUT_CLEAR)
/* USB OTG FS
*
* PA9 OTG_FS_VBUS VBUS sensing (also connected to the green LED)
* PE2 OTG_FS_PowerSwitchOn
* PE3 OTG_FS_Overcurrent
*/
#define GPIO_OTGFS_VBUS (GPIO_INPUT|GPIO_FLOAT|GPIO_SPEED_100MHz| \
GPIO_OPENDRAIN|GPIO_PORTA|GPIO_PIN9)
#define GPIO_OTGFS_PWRON (GPIO_OUTPUT|GPIO_FLOAT|GPIO_SPEED_100MHz| \
GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN2)
#define GPIO_OTGFS_OVER (GPIO_INPUT|GPIO_EXTI|GPIO_FLOAT| \
GPIO_SPEED_100MHz|GPIO_PUSHPULL| \
GPIO_PORTE|GPIO_PIN3)
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
/****************************************************************************
* Name: stm32_bringup
*
* Description:
* Perform architecture-specific initialization
*
* CONFIG_BOARD_LATE_INITIALIZE=y :
* Called from board_late_initialize().
*
* CONFIG_BOARD_LATE_INITIALIZE=y && CONFIG_BOARDCTL=y :
* Called from the NSH library
*
****************************************************************************/
int stm32_bringup(void);
/****************************************************************************
* Name: stm32_sdio_initialize
*
* Description:
* Initialize SDIO-based MMC/SD card support
*
****************************************************************************/
#ifdef CONFIG_STM32H7_SDMMC
int stm32_sdio_initialize(void);
#endif
/****************************************************************************
* Name: stm32_usbinitialize
*
* Description:
* Called from stm32_usbinitialize very early in inialization to setup
* USB-related GPIO pins for the board.
*
****************************************************************************/
#ifdef CONFIG_STM32H7_OTGFS
void weak_function stm32_usbinitialize(void);
#endif
/****************************************************************************
* Name: stm32_usbhost_initialize
*
* Description:
* Called at application startup time to initialize the USB host
* functionality. This function will start a thread that will monitor for
* device connection/disconnection events.
*
****************************************************************************/
#ifdef CONFIG_USBHOST
int stm32_usbhost_initialize(void);
#endif
#endif /* __BOARDS_ARM_STM32H7_OPENH743I_SRC_OPENH743I_H */

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/****************************************************************************
* boards/arm/stm32h7/openh743i/src/stm32_appinitialize.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <nuttx/board.h>
#include "openh743i.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_app_initialize
*
* Description:
* Perform application specific initialization. This function is never
* called directly from application code, but only indirectly via the
* (non-standard) boardctl() interface using the command BOARDIOC_INIT.
*
* Input Parameters:
* arg - The boardctl() argument is passed to the board_app_initialize()
* implementation without modification. The argument has no
* meaning to NuttX; the meaning of the argument is a contract
* between the board-specific initialization logic and the
* matching application logic. The value could be such things as a
* mode enumeration value, a set of DIP switch switch settings, a
* pointer to configuration data read from a file or serial FLASH,
* or whatever you would like to do with it. Every implementation
* should accept zero/NULL as a default configuration.
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is returned on
* any failure to indicate the nature of the failure.
*
****************************************************************************/
int board_app_initialize(uintptr_t arg)
{
#ifdef CONFIG_BOARD_LATE_INITIALIZE
/* Board initialization already performed by board_late_initialize() */
return OK;
#else
/* Perform board-specific initialization */
return stm32_bringup();
#endif
}

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/****************************************************************************
* boards/arm/stm32h7/openh743i/src/stm32_boot.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <debug.h>
#include <nuttx/board.h>
#include <arch/board/board.h>
#include "arm_internal.h"
#include "stm32_start.h"
#include "openh743i.h"
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_boardinitialize
*
* Description:
* All STM32 architectures must provide the following entry point.
* This entry point is called early in the initialization -- after all
* memory has been configured and mapped but before any devices have been
* initialized.
*
****************************************************************************/
void stm32_boardinitialize(void)
{
#if defined(CONFIG_STM32H7_OTGFS_HOST) || defined(CONFIG_STM32H7_OTGHS_HOST)
/* Initialize USB */
stm32_usbinitialize();
#endif
}
/****************************************************************************
* Name: board_late_initialize
*
* Description:
* If CONFIG_BOARD_LATE_INITIALIZE is selected, then an additional
* initialization call will be performed in the boot-up sequence to a
* function called board_late_initialize(). board_late_initialize()
* will be called immediately after up_initialize() is called and just
* before the initial application is started. This additional
* initialization phase may be used, for example, to initialize board-
* specific device drivers.
*
****************************************************************************/
#ifdef CONFIG_BOARD_LATE_INITIALIZE
void board_late_initialize(void)
{
#if defined(CONFIG_NSH_LIBRARY) && !defined(CONFIG_BOARDCTL)
/* Perform board bring-up here instead of from the
* board_app_initialize().
*/
stm32_bringup();
#endif
}
#endif

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/****************************************************************************
* boards/arm/stm32h7/openh743i/src/stm32_bringup.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <syslog.h>
#include <errno.h>
#include <arch/board/board.h>
#include <nuttx/fs/fs.h>
#ifdef CONFIG_RNDIS
# include <nuttx/usb/rndis.h>
#endif
#ifdef CONFIG_STM32H7_OTGFS
# include "stm32_usbhost.h"
#endif
#include "openh743i.h"
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_bringup
*
* Description:
* Perform architecture-specific initialization
*
* CONFIG_BOARD_LATE_INITIALIZE=y :
* Called from board_late_initialize().
*
* CONFIG_BOARD_LATE_INITIALIZE=n && CONFIG_BOARDCTL=y &&
* CONFIG_NSH_ARCHINIT:
* Called from the NSH library
*
****************************************************************************/
int stm32_bringup(void)
{
int ret = OK;
UNUSED(ret);
#ifdef CONFIG_FS_PROCFS
/* Mount the procfs file system */
ret = nx_mount(NULL, STM32_PROCFS_MOUNTPOINT, "procfs", 0, NULL);
if (ret < 0)
{
syslog(LOG_ERR,
"ERROR: Failed to mount the PROC filesystem: %d\n", ret);
}
#endif /* CONFIG_FS_PROCFS */
#if defined(CONFIG_RNDIS) && !defined(CONFIG_RNDIS_COMPOSITE)
uint8_t mac[6];
mac[0] = 0xa0; /* TODO */
mac[1] = (CONFIG_NETINIT_MACADDR_2 >> (8 * 0)) & 0xff;
mac[2] = (CONFIG_NETINIT_MACADDR_1 >> (8 * 3)) & 0xff;
mac[3] = (CONFIG_NETINIT_MACADDR_1 >> (8 * 2)) & 0xff;
mac[4] = (CONFIG_NETINIT_MACADDR_1 >> (8 * 1)) & 0xff;
mac[5] = (CONFIG_NETINIT_MACADDR_1 >> (8 * 0)) & 0xff;
usbdev_rndis_initialize(mac);
#endif
#if defined(CONFIG_STM32H7_SDMMC) && !defined(CONFIG_CDCACM_CONSOLE)
/* Initialize the SDIO block driver */
ret = stm32_sdio_initialize();
if (ret < 0)
{
syslog(LOG_ERR,
"ERROR: Failed to initialize MMC/SD driver: %d\n", ret);
}
#endif
#ifdef CONFIG_USBHOST
/* Initialize USB host operation. stm32_usbhost_initialize()
* starts a thread will monitor for USB connection and
* disconnection events.
*/
ret = stm32_usbhost_initialize();
if (ret != OK)
{
syslog(LOG_ERR,
"ERROR: Failed to initialize USB host: %d\n",
ret);
}
#endif
return OK;
}

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/****************************************************************************
* boards/arm/stm32h7/openh743i/src/stm32_composite.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <debug.h>
#include <assert.h>
#include <nuttx/usb/usbdev.h>
#include <nuttx/usb/rndis.h>
#include <nuttx/usb/cdcacm.h>
#include <nuttx/usb/usbmsc.h>
#include <nuttx/usb/composite.h>
#include "stm32_otg.h"
#include "openh743i.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define COMPOSITE0_DEV (3)
/****************************************************************************
* Private Data
****************************************************************************/
#ifdef CONFIG_USBMSC_COMPOSITE
static void *g_mschandle;
#endif
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: board_mscclassobject
*
* Description:
* If the mass storage class driver is part of composite device, then
* its instantiation and configuration is a multi-step, board-specific,
* process (See comments for usbmsc_configure below). In this case,
* board-specific logic must provide board_mscclassobject().
*
* board_mscclassobject() is called from the composite driver. It must
* encapsulate the instantiation and configuration of the mass storage
* class and the return the mass storage device's class driver instance
* to the composite driver.
*
* Input Parameters:
* classdev - The location to return the mass storage class' device
* instance.
*
* Returned Value:
* 0 on success; a negated errno on failure
*
****************************************************************************/
#ifdef CONFIG_USBMSC_COMPOSITE
static int board_mscclassobject(int minor,
struct usbdev_devinfo_s *devinfo,
struct usbdevclass_driver_s **classdev)
{
int ret;
DEBUGASSERT(g_mschandle == NULL);
/* Configure the mass storage device */
uinfo("Configuring with NLUNS=1\n");
ret = usbmsc_configure(1, &g_mschandle);
if (ret < 0)
{
uerr("ERROR: usbmsc_configure failed: %d\n", -ret);
return ret;
}
uinfo("MSC handle=%p\n", g_mschandle);
/* Bind the LUN(s) */
uinfo("Bind LUN=0 to /dev/mmcsd0\n");
ret = usbmsc_bindlun(g_mschandle, "/dev/mmcsd0", 0, 0, 0, false);
if (ret < 0)
{
uerr("ERROR: usbmsc_bindlun failed for LUN 1 at /dev/mmcsd0: %d\n",
ret);
usbmsc_uninitialize(g_mschandle);
g_mschandle = NULL;
return ret;
}
/* Get the mass storage device's class object */
ret = usbmsc_classobject(g_mschandle, devinfo, classdev);
if (ret < 0)
{
uerr("ERROR: usbmsc_classobject failed: %d\n", -ret);
usbmsc_uninitialize(g_mschandle);
g_mschandle = NULL;
}
return ret;
}
#endif
/****************************************************************************
* Name: board_mscuninitialize
*
* Description:
* Un-initialize the USB storage class driver.
* This is just an application specific wrapper for usbmsc_unitialize()
* that is called form the composite device logic.
*
* Input Parameters:
* classdev - The class driver instrance previously give to the composite
* driver by board_mscclassobject().
*
* Returned Value:
* None
*
****************************************************************************/
#ifdef CONFIG_USBMSC_COMPOSITE
static void board_mscuninitialize(struct usbdevclass_driver_s *classdev)
{
if (g_mschandle)
{
usbmsc_uninitialize(g_mschandle);
}
g_mschandle = NULL;
}
#endif
/****************************************************************************
* Name: board_composite_connect
*
* Description:
* Connect the USB composite device on the specified USB device port for
* configuration 0.
*
* Input Parameters:
* port - The USB device port.
*
* Returned Value:
* A non-NULL handle value is returned on success. NULL is returned on
* any failure.
*
****************************************************************************/
static void *board_composite0_connect(int port)
{
struct composite_devdesc_s dev[COMPOSITE0_DEV];
int ifnobase = 0;
int strbase = COMPOSITE_NSTRIDS;
int dev_idx = 0;
int epin = 1;
int epout = 1;
#ifdef CONFIG_RNDIS_COMPOSITE
/* Configure the RNDIS USB device */
/* Ask the rndis driver to fill in the constants we didn't
* know here.
*/
usbdev_rndis_get_composite_devdesc(&dev[dev_idx]);
/* Interfaces */
dev[dev_idx].devinfo.ifnobase = ifnobase;
dev[dev_idx].minor = 0;
/* Strings */
dev[dev_idx].devinfo.strbase = strbase;
/* Endpoints */
dev[dev_idx].devinfo.epno[RNDIS_EP_INTIN_IDX] = epin++;
dev[dev_idx].devinfo.epno[RNDIS_EP_BULKIN_IDX] = epin++;
dev[dev_idx].devinfo.epno[RNDIS_EP_BULKOUT_IDX] = epout++;
/* Count up the base numbers */
ifnobase += dev[dev_idx].devinfo.ninterfaces;
strbase += dev[dev_idx].devinfo.nstrings;
dev_idx += 1;
#endif
#ifdef CONFIG_CDCACM_COMPOSITE
/* Configure the CDC/ACM device */
/* Ask the cdcacm driver to fill in the constants we didn't
* know here.
*/
cdcacm_get_composite_devdesc(&dev[dev_idx]);
/* Overwrite and correct some values... */
/* The callback functions for the CDC/ACM class */
dev[dev_idx].classobject = cdcacm_classobject;
dev[dev_idx].uninitialize = cdcacm_uninitialize;
/* Interfaces */
dev[dev_idx].devinfo.ifnobase = ifnobase; /* Offset to Interface-IDs */
dev[dev_idx].minor = 0; /* The minor interface number */
/* Strings */
dev[dev_idx].devinfo.strbase = strbase; /* Offset to String Numbers */
/* Endpoints */
dev[dev_idx].devinfo.epno[CDCACM_EP_INTIN_IDX] = epin++;
dev[dev_idx].devinfo.epno[CDCACM_EP_BULKIN_IDX] = epin++;
dev[dev_idx].devinfo.epno[CDCACM_EP_BULKOUT_IDX] = epout++;
/* Count up the base numbers */
ifnobase += dev[dev_idx].devinfo.ninterfaces;
strbase += dev[dev_idx].devinfo.nstrings;
dev_idx += 1;
#endif
#ifdef CONFIG_USBMSC_COMPOSITE
/* Configure the mass storage device device */
/* Ask the usbmsc driver to fill in the constants we didn't
* know here.
*/
usbmsc_get_composite_devdesc(&dev[dev_idx]);
/* Overwrite and correct some values... */
/* The callback functions for the USBMSC class */
dev[dev_idx].classobject = board_mscclassobject;
dev[dev_idx].uninitialize = board_mscuninitialize;
/* Interfaces */
dev[dev_idx].devinfo.ifnobase = ifnobase; /* Offset to Interface-IDs */
dev[dev_idx].minor = 0; /* The minor interface number */
/* Strings */
dev[dev_idx].devinfo.strbase = strbase; /* Offset to String Numbers */
/* Endpoints */
dev[dev_idx].devinfo.epno[USBMSC_EP_BULKIN_IDX] = epin++;
dev[dev_idx].devinfo.epno[USBMSC_EP_BULKOUT_IDX] = epout++;
/* Count up the base numbers */
ifnobase += dev[dev_idx].devinfo.ninterfaces;
strbase += dev[dev_idx].devinfo.nstrings;
dev_idx += 1;
#endif
/* Sanity checks */
DEBUGASSERT(epin < STM32_NENDPOINTS);
DEBUGASSERT(epout < STM32_NENDPOINTS);
return composite_initialize(composite_getdevdescs(), dev, dev_idx);
}
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_composite_initialize
*
* Description:
* Perform architecture specific initialization of a composite USB device.
*
****************************************************************************/
int board_composite_initialize(int port)
{
#if defined(CONFIG_CDCACM_CONSOLE) && defined(CONFIG_USBMSC_COMPOSITE)
stm32_sdio_initialize();
#endif
return OK;
}
/****************************************************************************
* Name: board_composite_connect
*
* Description:
* Connect the USB composite device on the specified USB device port using
* the specified configuration. The interpretation of the configid is
* board specific.
*
* Input Parameters:
* port - The USB device port.
* configid - The USB composite configuration
*
* Returned Value:
* A non-NULL handle value is returned on success. NULL is returned on
* any failure.
*
****************************************************************************/
void *board_composite_connect(int port, int configid)
{
if (configid == 0)
{
return board_composite0_connect(port);
}
else
{
return NULL;
}
}

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/****************************************************************************
* boards/arm/stm32h7/openh743i/src/stm32_sdmmc.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdbool.h>
#include <stdio.h>
#include <debug.h>
#include <errno.h>
#include <nuttx/sdio.h>
#include <nuttx/mmcsd.h>
#include "stm32_gpio.h"
#include "stm32_sdmmc.h"
#include "openh743i.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
#ifndef CONFIG_STM32H7_SDMMC1
# error SDMMC1 supported only
#endif
/* If IDMA is enabled, internal SRAM must be excluded from heap */
#if CONFIG_MM_REGIONS > 1 && defined(CONFIG_STM32H7_SDMMC_IDMA)
# error SDMMC1 with IDMA doesnt work CONFIG_MM_REGIONS > 1
#endif
/****************************************************************************
* Private Data
****************************************************************************/
static struct sdio_dev_s *g_sdio_dev;
static bool g_sd_inserted = 0xff; /* Impossible value */
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_ncd_interrupt
*
* Description:
* Card detect interrupt handler.
*
****************************************************************************/
static int stm32_ncd_interrupt(int irq, void *context, void *param)
{
bool present;
present = !stm32_gpioread(GPIO_SDIO_NCD);
if (present != g_sd_inserted)
{
sdio_mediachange(g_sdio_dev, present);
g_sd_inserted = present;
}
return OK;
}
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_sdio_initialize
*
* Description:
* Initialize SDIO-based MMC/SD card support
*
****************************************************************************/
int stm32_sdio_initialize(void)
{
bool cd_status;
int ret;
/* Configure the card detect GPIO */
stm32_configgpio(GPIO_SDIO_NCD);
/* Register an interrupt handler for the card detect pin */
stm32_gpiosetevent(GPIO_SDIO_NCD, true, true, true,
stm32_ncd_interrupt, NULL);
/* Mount the SDIO-based MMC/SD block driver */
/* First, get an instance of the SDIO interface */
finfo("Initializing SDIO slot %d\n", SDIO_SLOTNO);
g_sdio_dev = sdio_initialize(SDIO_SLOTNO);
if (!g_sdio_dev)
{
ferr("ERROR: Failed to initialize SDIO slot %d\n", SDIO_SLOTNO);
return -ENODEV;
}
/* Now bind the SDIO interface to the MMC/SD driver */
finfo("Bind SDIO to the MMC/SD driver, minor=%d\n", SDIO_MINOR);
ret = mmcsd_slotinitialize(SDIO_MINOR, g_sdio_dev);
if (ret != OK)
{
ferr("ERROR: Failed to bind SDIO to the MMC/SD driver: %d\n", ret);
return ret;
}
finfo("Successfully bound SDIO to the MMC/SD driver\n");
/* Use SD card detect pin to check if a card is g_sd_inserted */
cd_status = !stm32_gpioread(GPIO_SDIO_NCD);
finfo("Card detect : %d\n", cd_status);
sdio_mediachange(g_sdio_dev, cd_status);
return OK;
}

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/****************************************************************************
* boards/arm/stm32h7/openh743i/src/stm32_usb.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include <debug.h>
#include <nuttx/arch.h>
#include <nuttx/kthread.h>
#include <nuttx/usb/usbdev.h>
#include <nuttx/usb/usbhost.h>
#include "stm32_gpio.h"
#include "stm32_otg.h"
#include "openh743i.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#if defined(CONFIG_STM32H7_OTGFS_HOST) && defined(CONFIG_STM32H7_OTGHS_USBDEV)
# ifndef CONFIG_OPENH743I_DISABLE_OTGFS_PWRON
# error PWRON must be disabled for this configuration
# endif
#endif
#define USBHOST_PRIO (100)
#define USBHOST_STACKSIZE (1024)
/****************************************************************************
* Private Data
****************************************************************************/
#ifdef CONFIG_USBHOST
static struct usbhost_connection_s *g_usbconn;
#endif
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: usbhost_waiter
*
* Description:
* Wait for USB devices to be connected.
*
****************************************************************************/
#ifdef CONFIG_USBHOST
static int usbhost_waiter(int argc, char *argv[])
{
struct usbhost_hubport_s *hport;
uinfo("Running\n");
for (; ; )
{
/* Wait for the device to change state */
DEBUGVERIFY(CONN_WAIT(g_usbconn, &hport));
uinfo("%s\n", hport->connected ? "connected" : "disconnected");
/* Did we just become connected? */
if (hport->connected)
{
/* Yes.. enumerate the newly connected device */
CONN_ENUMERATE(g_usbconn, hport);
}
}
/* Keep the compiler from complaining */
return 0;
}
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_usbinitialize
*
* Description:
* Called from stm32_usbinitialize very early in inialization to setup
* USB-related GPIO pins for the board.
*
****************************************************************************/
void stm32_usbinitialize(void)
{
/* Configure the OTG FS VBUS sensing GPIO,
* Power On, and Overcurrent GPIOs
*/
#ifdef CONFIG_STM32H7_OTGFS
stm32_configgpio(GPIO_OTGFS_VBUS);
stm32_configgpio(GPIO_OTGFS_PWRON);
stm32_configgpio(GPIO_OTGFS_OVER);
#endif
}
/****************************************************************************
* Name: stm32_usbhost_initialize
*
* Description:
* Called at application startup time to initialize the USB host
* functionality.
* This function will start a thread that will monitor for device
* connection/disconnection events.
*
****************************************************************************/
#ifdef CONFIG_USBHOST
int stm32_usbhost_initialize(void)
{
int ret;
/* First, register all of the class drivers needed to support the drivers
* that we care about:
*/
uinfo("Register class drivers\n");
#ifdef CONFIG_USBHOST_HUB
/* Initialize USB hub class support */
ret = usbhost_hub_initialize();
if (ret < 0)
{
uerr("ERROR: usbhost_hub_initialize failed: %d\n", ret);
}
#endif
#ifdef CONFIG_USBHOST_MSC
/* Register the USB mass storage class class */
ret = usbhost_msc_initialize();
if (ret != OK)
{
uerr("ERROR: Failed to register the mass storage class: %d\n", ret);
}
#endif
#ifdef CONFIG_USBHOST_CDCACM
/* Register the CDC/ACM serial class */
ret = usbhost_cdcacm_initialize();
if (ret != OK)
{
uerr("ERROR: Failed to register the CDC/ACM serial class: %d\n", ret);
}
#endif
#ifdef CONFIG_USBHOST_HIDKBD
/* Initialize the HID keyboard class */
ret = usbhost_kbdinit();
if (ret != OK)
{
uerr("ERROR: Failed to register the HID keyboard class\n");
}
#endif
#ifdef CONFIG_USBHOST_HIDMOUSE
/* Initialize the HID mouse class */
ret = usbhost_mouse_init();
if (ret != OK)
{
uerr("ERROR: Failed to register the HID mouse class\n");
}
#endif
/* Then get an instance of the USB host interface */
uinfo("Initialize USB host\n");
g_usbconn = stm32_otgfshost_initialize(0);
if (g_usbconn)
{
/* Start a thread to handle device connection. */
uinfo("Start usbhost_waiter\n");
ret = kthread_create("usbhost", USBHOST_PRIO, USBHOST_STACKSIZE,
usbhost_waiter, NULL);
return ret < 0 ? -ENOEXEC : OK;
}
return -ENODEV;
}
#endif
/****************************************************************************
* Name: stm32_usbhost_vbusdrive
*
* Description:
* Enable/disable driving of VBUS 5V output. This function must be
* provided be each platform that implements the STM32 OTG FS host
* interface
*
* "On-chip 5 V VBUS generation is not supported. For this reason, a
* charge pump or, if 5 V are available on the application board, a
* basic power switch, must be added externally to drive the 5 V VBUS
* line. The external charge pump can be driven by any GPIO output.
* When the application decides to power on VBUS using the chosen GPIO,
* it must also set the port power bit in the host port control and status
* register (PPWR bit in OTG_FS_HPRT).
*
* "The application uses this field to control power to this port, and
* the core clears this bit on an overcurrent condition."
*
* Input Parameters:
* iface - For future growth to handle multiple USB host interface.
* Should be zero.
* enable - true: enable VBUS power; false: disable VBUS power
*
* Returned Value:
* None
*
****************************************************************************/
#ifdef CONFIG_USBHOST
void stm32_usbhost_vbusdrive(int iface, bool enable)
{
DEBUGASSERT(iface == 0);
/* Set the Power Switch by driving the active high enable pin.
*
* NOTE: Setting PWRON in high state somehow breaks USBDEV on OTGHS.
* If both OTG peripherals are used and OTGFS is used as HOST,
* then the power switch enable pin must be set directly from
* 3.3V bus.
*/
#ifdef CONFIG_OPENH743I_DISABLE_OTGFS_PWRON
stm32_gpiowrite(GPIO_OTGFS_PWRON, enable);
#endif
}
#endif
/****************************************************************************
* Name: stm32_setup_overcurrent
*
* Description:
* Setup to receive an interrupt-level callback if an overcurrent
* condition is detected.
*
* Input Parameters:
* handler - New overcurrent interrupt handler
* arg - The argument provided for the interrupt handler
*
* Returned Value:
* Zero (OK) is returned on success. Otherwise, a negated errno value
* is returned to indicate the nature of the failure.
*
****************************************************************************/
#ifdef CONFIG_USBHOST
int stm32_setup_overcurrent(xcpt_t handler, void *arg)
{
return stm32_gpiosetevent(GPIO_OTGFS_OVER, true, true, true, handler, arg);
}
#endif
/****************************************************************************
* Name: stm32_usbsuspend
*
* Description:
* Board logic must provide the stm32_usbsuspend logic if the USBDEV
* driver is used. This function is called whenever the USB enters or
* leaves suspend mode. This is an opportunity for the board logic to
* shutdown clocks, power, etc. while the USB is suspended.
*
****************************************************************************/
void stm32_usbsuspend(struct usbdev_s *dev, bool resume)
{
uinfo("resume: %d\n", resume);
}
#ifdef CONFIG_STM32H7_OTGHS_EXTERNAL_ULPI
/****************************************************************************
* Name: stm32_usbulpireset
*
* Description:
* Reset external ULPI.
*
****************************************************************************/
void stm32_usbulpireset(struct usbdev_s *dev)
{
stm32_configgpio(GPIO_ULPI_RESET);
up_mdelay(5);
stm32_gpiowrite(GPIO_ULPI_RESET, true);
up_mdelay(10);
stm32_gpiowrite(GPIO_ULPI_RESET, false);
up_mdelay(10);
}
#endif

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/****************************************************************************
* boards/arm/stm32h7/openh743i/src/stm32_usbmsc.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdio.h>
#include <syslog.h>
#include <errno.h>
#include <nuttx/board.h>
#include "openh743i.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#if !defined(CONFIG_USBDEV_CUSTOM_TXFIFO_SIZE) && \
defined(CONFIG_USBDEV_DUALSPEED)
# error USBMSC high-speed require custom TXFIFO configuratin that set EPIN FIFO to >=512
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_usbmsc_initialize
*
* Description:
* Perform architecture specific initialization as needed to establish
* the mass storage device that will be exported by the USB MSC device.
*
****************************************************************************/
int board_usbmsc_initialize(int port)
{
/* If system/usbmsc is built as an NSH command, then SD slot should
* already have been initialized in board_app_initialize()
* (see stm32_appinit.c).
* In this case, there is nothing further to be done here.
*/
#ifndef CONFIG_NSH_BUILTIN_APPS
stm32_sdio_initialize();
#else
return OK;
#endif
}