Improve and remove not necessary board configuration
This commit is contained in:
Abdelatif Guettouche
Alin Jerpelea
parent
fccd5fbdd2
commit
8347a56bc0
10 changed files with 157 additions and 656 deletions
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@ -250,6 +250,15 @@ config ARCH_BOARD_ESP32C3_DEVKIT
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The ESP32-C3-DevKitM-1 version contains the ESP32-C3-MINI-1 module and the
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ESP32-C3-DevKitC-02 version the ESP32-C3-WROOM-02.
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config ARCH_BOARD_ESP32S2_SAOLA_1
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bool "Espressif ESP32-S2-Saola-1 V1.2"
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depends on ARCH_CHIP_ESP32S2WROVER
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select ARCH_HAVE_LEDS
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select ARCH_HAVE_BUTTONS
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select ARCH_HAVE_IRQBUTTONS if ESP32S2_GPIO_IRQ
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---help---
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This is the ESP32-S2-Saola-1 board
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config ARCH_BOARD_ET_STM32_STAMP
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bool "Futurlec: ET-STM32 Stamp"
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depends on ARCH_CHIP_STM32F103RE
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@ -2299,6 +2308,7 @@ config ARCH_BOARD
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default "esp32-ethernet-kit" if ARCH_BOARD_ESP32_ETHERNETKIT
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default "esp32-wrover-kit" if ARCH_BOARD_ESP32_WROVERKIT
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default "esp32c3-devkit" if ARCH_BOARD_ESP32C3_DEVKIT
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default "esp32s2-saola-1" if ARCH_BOARD_ESP32S2_SAOLA_1
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default "et-stm32-stamp" if ARCH_BOARD_ET_STM32_STAMP
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default "ez80f910200kitg" if ARCH_BOARD_EZ80F910200KITG
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default "ez80f910200zco" if ARCH_BOARD_EZ80F910200ZCO
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@ -3143,6 +3153,9 @@ endif
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if ARCH_BOARD_ESP32C3_DEVKIT
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source "boards/risc-v/esp32c3/esp32c3-devkit/Kconfig"
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endif
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if ARCH_BOARD_ESP32S2_SAOLA_1
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source "boards/xtensa/esp32s2/esp32s2-saola-1/Kconfig"
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endif
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if ARCH_BOARD_SIM
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source "boards/sim/sim/sim/Kconfig"
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endif
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@ -1,47 +0,0 @@
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#
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# This file is autogenerated: PLEASE DO NOT EDIT IT.
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#
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# You can use "make menuconfig" to make any modifications to the installed .config file.
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# You can then do "make savedefconfig" to generate a new defconfig file that includes your
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# modifications.
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#
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# CONFIG_ARCH_LEDS is not set
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# CONFIG_NSH_ARGCAT is not set
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# CONFIG_NSH_CMDOPT_HEXDUMP is not set
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# CONFIG_NSH_CMDPARMS is not set
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CONFIG_ARCH="xtensa"
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CONFIG_ARCH_BOARD="esp32s2-saola-1"
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CONFIG_ARCH_BOARD_ESP32S2_SAOLA_1=y
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CONFIG_ARCH_CHIP="esp32s2"
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CONFIG_ARCH_CHIP_ESP32S2=y
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CONFIG_ARCH_CHIP_ESP32S2WROVER=y
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CONFIG_ARCH_STACKDUMP=y
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CONFIG_ARCH_XTENSA=y
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CONFIG_BOARD_LOOPSPERMSEC=16717
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CONFIG_BUILTIN=y
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CONFIG_ESP32S2_DATA_CACHE_0KB=y
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CONFIG_ESP32S2_UART0=y
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CONFIG_FS_PROCFS=y
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CONFIG_HAVE_CXX=y
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CONFIG_HAVE_CXXINITIALIZE=y
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CONFIG_IDLETHREAD_STACKSIZE=3072
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CONFIG_INTELHEX_BINARY=y
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CONFIG_MAX_TASKS=16
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CONFIG_NSH_ARCHINIT=y
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CONFIG_NSH_BUILTIN_APPS=y
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CONFIG_NSH_FILEIOSIZE=512
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CONFIG_NSH_LINELEN=64
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CONFIG_NSH_READLINE=y
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CONFIG_PREALLOC_TIMERS=4
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CONFIG_RAM_SIZE=114688
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CONFIG_RAM_START=0x20000000
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CONFIG_RAW_BINARY=y
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CONFIG_RR_INTERVAL=200
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CONFIG_SCHED_WAITPID=y
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CONFIG_SDCLONE_DISABLE=y
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CONFIG_START_DAY=6
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CONFIG_START_MONTH=12
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CONFIG_START_YEAR=2011
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CONFIG_SYSTEM_NSH=y
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CONFIG_UART0_SERIAL_CONSOLE=y
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CONFIG_USER_ENTRYPOINT="nsh_main"
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@ -31,12 +31,12 @@
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#endif
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#define RAM_IRAM_START 0x40020000
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#define RAM_DRAM_START 0x3FFB0000
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#define RAM_DRAM_START 0x3ffb0000
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#define DATA_RAM_END 0x3FFE0000 /* 2nd stage bootloader iram_loader_seg
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#define DATA_RAM_END 0x3ffe0000 /* 2nd stage bootloader iram_loader_seg
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* starts at SRAM block 14 (reclaimed
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* after app boots)
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*/
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* after app boots)
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*/
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#define IRAM_ORG (RAM_IRAM_START + CONFIG_ESP32S2_INSTRUCTION_CACHE_SIZE \
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+ CONFIG_ESP32S2_DATA_CACHE_SIZE)
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@ -46,8 +46,6 @@
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#define I_D_RAM_SIZE DATA_RAM_END - DRAM_ORG
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#define STATIC_RAM_SIZE 0 /* FIXME: Should it be configurable? */
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MEMORY
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{
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/* All these values assume the flash cache is on, and have the blocks this
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@ -75,8 +73,7 @@ MEMORY
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* bss/data/stack.
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*/
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dram0_0_seg (RW) : org = DRAM_ORG, len = I_D_RAM_SIZE - \
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STATIC_RAM_SIZE
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dram0_0_seg (RW) : org = DRAM_ORG, len = I_D_RAM_SIZE
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/* Flash mapped constant data */
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@ -93,16 +90,5 @@ MEMORY
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rtc_slow_seg(RW) : org = 0x50000000 + CONFIG_ESP32S2_ULP_COPROC_RESERVE_MEM,
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len = 0x2000 - CONFIG_ESP32S2_ULP_COPROC_RESERVE_MEM
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/* External memory, including data and text */
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extmem_seg(RWX) : org = 0x3f800000, len = 0x400000
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}
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/* Heap ends at top of dram0_0_seg */
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_eheap = 0x40000000 - CONFIG_ESP32S2_TRACEMEM_RESERVE_DRAM;
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/* Module text area ends at top of dram0_0_seg */
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_emodtext = 0x400a0000;
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@ -14,7 +14,7 @@ SECTIONS
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{
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_iram_start = ABSOLUTE(.);
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/* Vectors go to IRAM */
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/* Vectors go to IRAM. */
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_init_start = ABSOLUTE(.);
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@ -47,24 +47,17 @@ SECTIONS
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*(.entry.text)
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*(.init.literal)
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*(.init)
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_init_end = ABSOLUTE(.);
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} > iram0_0_seg
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.iram0.text :
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{
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/* Code marked as running out of IRAM */
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_iram_text_start = ABSOLUTE(.);
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*(.iram1 .iram1.*)
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*librtc.a:(.literal .text .literal.* .text.*)
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*libarch.a:esp32s2_spiflash.*(.literal .text .literal.* .text.*)
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*(.wifirxiram .wifirxiram.*)
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*(.wifi0iram .wifi0iram.*)
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_iram_text_end = ABSOLUTE(.);
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/* Module text area starts at the end of iram0_0_seg */
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/* align + add 16B for CPU dummy speculative instr. fetch */
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_smodtext = ABSOLUTE(.);
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. = ALIGN(4) + 16;
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_iram_text = ABSOLUTE(.);
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} > iram0_0_seg
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@ -95,7 +88,6 @@ SECTIONS
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*(.share.mem)
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*(.gnu.linkonce.b.*)
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*(COMMON)
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*libarch.a:esp32s2_spiflash.*(.bss .bss.* COMMON)
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. = ALIGN(8);
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_ebss = ABSOLUTE(.);
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} >dram0_0_seg
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@ -106,7 +98,9 @@ SECTIONS
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* or during the application's initialization sequence.
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*/
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. = ALIGN(4);
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*(.noinit)
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. = ALIGN(4);
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} >dram0_0_seg
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.dram0.data :
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@ -126,8 +120,6 @@ SECTIONS
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KEEP (*(.gnu.linkonce.s2.*))
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KEEP (*(.jcr))
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*(.dram1 .dram1.*)
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*libphy.a:(.rodata .rodata.*)
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*libarch.a:esp32s2_spiflash.*(.rodata .rodata.*)
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. = ALIGN(4);
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_edata = ABSOLUTE(.);
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@ -136,16 +128,6 @@ SECTIONS
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_sheap = ABSOLUTE(.);
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} >dram0_0_seg
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/* External memory bss, from any global variable with EXT_RAM_ATTR attribute */
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.extmem.bss (NOLOAD) :
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{
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_sbss_extmem = ABSOLUTE(.);
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*(.extmem.bss .extmem.bss.*)
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. = ALIGN(4);
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_ebss_extmem = ABSOLUTE(.);
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} > extmem_seg
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.flash.rodata :
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{
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_srodata = ABSOLUTE(.);
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@ -187,7 +169,9 @@ SECTIONS
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*(.dynamic)
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*(.gnu.version_d)
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_erodata = ABSOLUTE(.);
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/* Literals are also RO data. */
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_lit4_start = ABSOLUTE(.);
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*(*.lit4)
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*(.lit4.*)
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@ -199,13 +183,20 @@ SECTIONS
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.flash.text :
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{
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_stext = .;
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_text_start = ABSOLUTE(.);
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*(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
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*(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */
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*(.fini.literal)
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*(.fini)
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*(.gnu.version)
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_text_end = ABSOLUTE(.);
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/* CPU will try to prefetch up to 16 bytes of instructions.
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* This means that any configuration (e.g. MMU, PMS) must allow
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* safe access to up to 16 bytes after the last real instruction, add
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* dummy bytes to ensure this
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*/
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. += 16;
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_etext = .;
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} >iram0_2_seg
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@ -52,27 +52,19 @@ SECTIONS
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{
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/* Code marked as running out of IRAM */
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_iram_text_start = ABSOLUTE(.);
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*(.iram1 .iram1.*)
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*libphy.a:(.literal .text .literal.* .text.*)
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*librtc.a:(.literal .text .literal.* .text.*)
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*libpp.a:(.literal .text .literal.* .text.*)
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*libhal.a:(.literal .text .literal.* .text.*)
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_iram_text_end = ABSOLUTE(.);
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_stext = .;
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_text_start = ABSOLUTE(.);
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*(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
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*(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */
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*(.fini.literal)
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*(.fini)
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*(.gnu.version)
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_text_end = ABSOLUTE(.);
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/* align + add 16B for CPU dummy speculative instr. fetch */
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. = ALIGN(4) + 16;
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_etext = .;
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/* Module text area starts at the end of iram0_0_seg */
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_smodtext = ABSOLUTE(.);
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} > iram0_0_seg
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/* Shared RAM */
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@ -102,7 +94,9 @@ SECTIONS
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/* Uninitialized .bss */
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. = ALIGN(4);
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*(.noinit)
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. = ALIGN(4);
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} >dram0_0_seg
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.dram0.data :
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@ -28,29 +28,6 @@ CSRCS = esp32s2_boot.c esp32s2_bringup.c
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ifeq ($(CONFIG_LIB_BOARDCTL),y)
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CSRCS += esp32s2_appinit.c
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ifeq ($(CONFIG_BOARDCTL_RESET),y)
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CSRCS += esp32s2_reset.c
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endif
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endif
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ifeq ($(CONFIG_ESP32S2_SPI),y)
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CSRCS += esp32s2_spi.c
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endif
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ifeq ($(CONFIG_ESP32S2_SPIFLASH),y)
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CSRCS += esp32s2_spiflash.c
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endif
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ifeq ($(CONFIG_DEV_GPIO),y)
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CSRCS += esp32s2_gpio.c
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endif
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ifeq ($(CONFIG_USERLED),y)
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CSRCS += esp32s2_userleds.c
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endif
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ifeq ($(CONFIG_ARCH_BUTTONS),y)
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CSRCS += esp32s2_buttons.c
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endif
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SCRIPTIN = $(SCRIPTDIR)$(DELIM)esp32s2.template.ld
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@ -18,8 +18,8 @@
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*
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****************************************************************************/
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#ifndef __BOARDS_XTENSA_ESP32S2_ESP32S2_CORE_SRC_ESP32S2_CORE_H
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#define __BOARDS_XTENSA_ESP32S2_ESP32S2_CORE_SRC_ESP32S2_CORE_H
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#ifndef __BOARDS_XTENSA_ESP32S2_ESP32S2_SAOLA_1_SRC_ESP32S2_SAOLA_1_H
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#define __BOARDS_XTENSA_ESP32S2_ESP32S2_SAOLA_1_SRC_ESP32S2_SAOLA_1_H
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/****************************************************************************
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* Included Files
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@ -39,29 +39,6 @@
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#define BUTTON_BOOT 0
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/* LED
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*
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* This is an externally connected LED used for testing.
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*/
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#define GPIO_LED1 2
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/* MCP2515 Interrupt pin */
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#define GPIO_MCP2515_IRQ 22
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/* TIMERS */
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#define TIMER0 0
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#define TIMER1 1
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#define TIMER2 2
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#define TIMER3 3
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/* ONESHOT */
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#define ONESHOT_TIMER 1
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#define ONESHOT_RESOLUTION_US 1
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/****************************************************************************
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* Public Types
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****************************************************************************/
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@ -92,49 +69,5 @@
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int esp32s2_bringup(void);
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/****************************************************************************
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* Name: esp32s2_mmcsd_initialize
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*
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* Description:
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* Initialize SPI-based SD card and card detect thread.
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****************************************************************************/
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int esp32s2_mmcsd_initialize(int minor);
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/****************************************************************************
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* Name: esp32s2_spiflash_init
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*
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* Description:
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* Initialize the SPIFLASH and register the MTD device.
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****************************************************************************/
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int esp32s2_spiflash_init(void);
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/****************************************************************************
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* Name: esp32s2_spiflash_encrypt_test
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*
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* Description:
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* Test ESP32S2 SPI Flash driver read/write with encryption.
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* None.
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*
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****************************************************************************/
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#ifdef CONFIG_ESP32S2_SPIFLASH_ENCRYPTION_TEST
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void esp32s2_spiflash_encrypt_test(void);
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#endif
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/****************************************************************************
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* Name: esp32s2_gpio_init
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****************************************************************************/
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#ifdef CONFIG_DEV_GPIO
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int esp32s2_gpio_init(void);
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* __BOARDS_XTENSA_ESP32S2_ESP32S2_CORE_SRC_ESP32S2_CORE_H */
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#endif /* __BOARDS_XTENSA_ESP32S2_ESP32S2_SAOLA_1_SRC_ESP32S2_SAOLA_1_H */
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@ -1,397 +0,0 @@
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/****************************************************************************
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* boards/xtensa/esp32s2/esp32s2-saola-1/src/esp32s2_gpio.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <sys/types.h>
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#include <syslog.h>
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#include <nuttx/irq.h>
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#include <arch/irq.h>
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#include <debug.h>
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#include <nuttx/ioexpander/gpio.h>
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#include <arch/board/board.h>
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#include "esp32s2-saola-1.h"
|
||||
#include "esp32s2_gpio.h"
|
||||
#include "hardware/esp32s2_gpio_sigmap.h"
|
||||
|
||||
#if defined(CONFIG_DEV_GPIO) && !defined(CONFIG_GPIO_LOWER_HALF)
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
#if !defined(CONFIG_ESP32S2_GPIO_IRQ) && BOARD_NGPIOINT > 0
|
||||
# error "NGPIOINT is > 0 and GPIO interrupts aren't enabled"
|
||||
#endif
|
||||
|
||||
/* Output pins. GPIO15 is used as an example, any other outputs could be
|
||||
* used.
|
||||
*/
|
||||
|
||||
#define GPIO_OUT1 15
|
||||
|
||||
/* Input pins. GPIO18 is used as an example, any other inputs could be
|
||||
* used.
|
||||
*/
|
||||
|
||||
#define GPIO_IN1 18
|
||||
|
||||
/* Interrupt pins. GPIO20 is used as an example, any other inputs could be
|
||||
* used.
|
||||
*/
|
||||
|
||||
#define GPIO_IRQPIN1 20
|
||||
|
||||
/****************************************************************************
|
||||
* Private Types
|
||||
****************************************************************************/
|
||||
|
||||
struct esp32s2gpio_dev_s
|
||||
{
|
||||
struct gpio_dev_s gpio;
|
||||
uint8_t id;
|
||||
};
|
||||
|
||||
struct esp32s2gpint_dev_s
|
||||
{
|
||||
struct esp32s2gpio_dev_s esp32s2gpio;
|
||||
pin_interrupt_t callback;
|
||||
};
|
||||
|
||||
/****************************************************************************
|
||||
* Private Function Prototypes
|
||||
****************************************************************************/
|
||||
|
||||
#if BOARD_NGPIOOUT > 0
|
||||
static int gpout_read(FAR struct gpio_dev_s *dev, FAR bool *value);
|
||||
static int gpout_write(FAR struct gpio_dev_s *dev, bool value);
|
||||
#endif
|
||||
|
||||
#if BOARD_NGPIOIN > 0
|
||||
static int gpin_read(FAR struct gpio_dev_s *dev, FAR bool *value);
|
||||
#endif
|
||||
|
||||
#if BOARD_NGPIOINT > 0
|
||||
static int gpint_read(FAR struct gpio_dev_s *dev, FAR bool *value);
|
||||
static int gpint_attach(FAR struct gpio_dev_s *dev,
|
||||
pin_interrupt_t callback);
|
||||
static int gpint_enable(FAR struct gpio_dev_s *dev, bool enable);
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Private Data
|
||||
****************************************************************************/
|
||||
|
||||
#if BOARD_NGPIOOUT > 0
|
||||
static const struct gpio_operations_s gpout_ops =
|
||||
{
|
||||
.go_read = gpout_read,
|
||||
.go_write = gpout_write,
|
||||
.go_attach = NULL,
|
||||
.go_enable = NULL,
|
||||
};
|
||||
|
||||
/* This array maps the GPIO pins used as OUTPUT */
|
||||
|
||||
static const uint32_t g_gpiooutputs[BOARD_NGPIOOUT] =
|
||||
{
|
||||
GPIO_OUT1
|
||||
};
|
||||
|
||||
static struct esp32s2gpio_dev_s g_gpout[BOARD_NGPIOOUT];
|
||||
#endif
|
||||
|
||||
#if BOARD_NGPIOIN > 0
|
||||
static const struct gpio_operations_s gpin_ops =
|
||||
{
|
||||
.go_read = gpin_read,
|
||||
.go_write = NULL,
|
||||
.go_attach = NULL,
|
||||
.go_enable = NULL,
|
||||
};
|
||||
|
||||
/* This array maps the GPIO pins used as INTERRUPT INPUTS */
|
||||
|
||||
static const uint32_t g_gpioinputs[BOARD_NGPIOIN] =
|
||||
{
|
||||
GPIO_IN1
|
||||
};
|
||||
|
||||
static struct esp32s2gpio_dev_s g_gpin[BOARD_NGPIOIN];
|
||||
#endif
|
||||
|
||||
#if BOARD_NGPIOINT > 0
|
||||
static const struct gpio_operations_s gpint_ops =
|
||||
{
|
||||
.go_read = gpint_read,
|
||||
.go_write = NULL,
|
||||
.go_attach = gpint_attach,
|
||||
.go_enable = gpint_enable,
|
||||
};
|
||||
|
||||
/* This array maps the GPIO pins used as INTERRUPT INPUTS */
|
||||
|
||||
static const uint32_t g_gpiointinputs[BOARD_NGPIOINT] =
|
||||
{
|
||||
GPIO_IRQPIN1,
|
||||
};
|
||||
|
||||
static struct esp32s2gpint_dev_s g_gpint[BOARD_NGPIOINT];
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Private Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: gpout_read
|
||||
****************************************************************************/
|
||||
|
||||
#if BOARD_NGPIOOUT > 0
|
||||
static int gpout_read(FAR struct gpio_dev_s *dev, FAR bool *value)
|
||||
{
|
||||
FAR struct esp32s2gpio_dev_s *esp32s2gpio =
|
||||
(FAR struct esp32s2gpio_dev_s *)dev;
|
||||
|
||||
DEBUGASSERT(esp32s2gpio != NULL && value != NULL);
|
||||
DEBUGASSERT(esp32s2gpio->id < BOARD_NGPIOOUT);
|
||||
gpioinfo("Reading...\n");
|
||||
|
||||
*value = esp32s2_gpioread(g_gpiooutputs[esp32s2gpio->id]);
|
||||
return OK;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: gpout_write
|
||||
****************************************************************************/
|
||||
|
||||
static int gpout_write(FAR struct gpio_dev_s *dev, bool value)
|
||||
{
|
||||
FAR struct esp32s2gpio_dev_s *esp32s2gpio =
|
||||
(FAR struct esp32s2gpio_dev_s *)dev;
|
||||
|
||||
DEBUGASSERT(esp32s2gpio != NULL);
|
||||
DEBUGASSERT(esp32s2gpio->id < BOARD_NGPIOOUT);
|
||||
gpioinfo("Writing %d\n", (int)value);
|
||||
|
||||
esp32s2_gpiowrite(g_gpiooutputs[esp32s2gpio->id], value);
|
||||
return OK;
|
||||
}
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: gpin_read
|
||||
****************************************************************************/
|
||||
|
||||
#if BOARD_NGPIOIN > 0
|
||||
static int gpin_read(FAR struct gpio_dev_s *dev, FAR bool *value)
|
||||
{
|
||||
FAR struct esp32s2gpio_dev_s *esp32s2gpio =
|
||||
(FAR struct esp32s2gpio_dev_s *)dev;
|
||||
|
||||
DEBUGASSERT(esp32s2gpio != NULL && value != NULL);
|
||||
DEBUGASSERT(esp32s2gpio->id < BOARD_NGPIOIN);
|
||||
gpioinfo("Reading... pin %d\n", g_gpioinputs[esp32s2gpio->id]);
|
||||
|
||||
*value = esp32s2_gpioread(g_gpioinputs[esp32s2gpio->id]);
|
||||
return OK;
|
||||
}
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp32s2gpio_interrupt
|
||||
****************************************************************************/
|
||||
|
||||
#if BOARD_NGPIOINT > 0
|
||||
static int esp32s2gpio_interrupt(int irq, void *context, void *arg)
|
||||
{
|
||||
FAR struct esp32s2gpint_dev_s *esp32s2gpint =
|
||||
(FAR struct esp32s2gpint_dev_s *)arg;
|
||||
|
||||
DEBUGASSERT(esp32s2gpint != NULL && esp32s2gpint->callback != NULL);
|
||||
gpioinfo("Interrupt! callback=%p\n", esp32s2gpint->callback);
|
||||
|
||||
esp32s2gpint->callback(&esp32s2gpint->esp32s2gpio.gpio,
|
||||
esp32s2gpint->esp32s2gpio.id);
|
||||
return OK;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: gpint_read
|
||||
****************************************************************************/
|
||||
|
||||
static int gpint_read(FAR struct gpio_dev_s *dev, FAR bool *value)
|
||||
{
|
||||
FAR struct esp32s2gpint_dev_s *esp32s2gpint =
|
||||
(FAR struct esp32s2gpint_dev_s *)dev;
|
||||
|
||||
DEBUGASSERT(esp32s2gpint != NULL && value != NULL);
|
||||
DEBUGASSERT(esp32s2gpint->esp32s2gpio.id < BOARD_NGPIOINT);
|
||||
gpioinfo("Reading int pin...\n");
|
||||
|
||||
*value = esp32s2_gpioread(g_gpiointinputs[esp32s2gpint->esp32s2gpio.id]);
|
||||
return OK;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: gpint_attach
|
||||
****************************************************************************/
|
||||
|
||||
static int gpint_attach(FAR struct gpio_dev_s *dev,
|
||||
pin_interrupt_t callback)
|
||||
{
|
||||
FAR struct esp32s2gpint_dev_s *esp32s2gpint =
|
||||
(FAR struct esp32s2gpint_dev_s *)dev;
|
||||
int irq = ESP32S2_PIN2IRQ(g_gpiointinputs[esp32s2gpint->esp32s2gpio.id]);
|
||||
int ret;
|
||||
|
||||
gpioinfo("Attaching the callback\n");
|
||||
|
||||
/* Make sure the interrupt is disabled */
|
||||
|
||||
esp32s2_gpioirqdisable(irq);
|
||||
ret = irq_attach(irq,
|
||||
esp32s2gpio_interrupt,
|
||||
&g_gpint[esp32s2gpint->esp32s2gpio.id]);
|
||||
if (ret < 0)
|
||||
{
|
||||
syslog(LOG_ERR, "ERROR: gpint_attach() failed: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
gpioinfo("Attach %p\n", callback);
|
||||
esp32s2gpint->callback = callback;
|
||||
return OK;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: gpint_enable
|
||||
****************************************************************************/
|
||||
|
||||
static int gpint_enable(FAR struct gpio_dev_s *dev, bool enable)
|
||||
{
|
||||
FAR struct esp32s2gpint_dev_s *esp32s2gpint =
|
||||
(FAR struct esp32s2gpint_dev_s *)dev;
|
||||
int irq = ESP32S2_PIN2IRQ(g_gpiointinputs[esp32s2gpint->esp32s2gpio.id]);
|
||||
|
||||
if (enable)
|
||||
{
|
||||
if (esp32s2gpint->callback != NULL)
|
||||
{
|
||||
gpioinfo("Enabling the interrupt\n");
|
||||
|
||||
/* Configure the interrupt for rising edge */
|
||||
|
||||
esp32s2_gpioirqenable(irq, RISING);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
gpioinfo("Disable the interrupt\n");
|
||||
esp32s2_gpioirqdisable(irq);
|
||||
}
|
||||
|
||||
return OK;
|
||||
}
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp32s2_gpio_init
|
||||
****************************************************************************/
|
||||
|
||||
int esp32s2_gpio_init(void)
|
||||
{
|
||||
int i;
|
||||
int pincount = 0;
|
||||
|
||||
#if BOARD_NGPIOOUT > 0
|
||||
for (i = 0; i < BOARD_NGPIOOUT; i++)
|
||||
{
|
||||
/* Setup and register the GPIO pin */
|
||||
|
||||
g_gpout[i].gpio.gp_pintype = GPIO_OUTPUT_PIN;
|
||||
g_gpout[i].gpio.gp_ops = &gpout_ops;
|
||||
g_gpout[i].id = i;
|
||||
gpio_pin_register(&g_gpout[i].gpio, pincount);
|
||||
|
||||
/* Configure the pins that will be used as output */
|
||||
|
||||
esp32s2_gpio_matrix_out(g_gpiooutputs[i], SIG_GPIO_OUT_IDX, 0, 0);
|
||||
esp32s2_configgpio(g_gpiooutputs[i], OUTPUT_FUNCTION_3);
|
||||
esp32s2_gpiowrite(g_gpiooutputs[i], 0);
|
||||
|
||||
pincount++;
|
||||
}
|
||||
#endif
|
||||
|
||||
pincount = 0;
|
||||
|
||||
#if BOARD_NGPIOIN > 0
|
||||
for (i = 0; i < BOARD_NGPIOIN; i++)
|
||||
{
|
||||
/* Setup and register the GPIO pin */
|
||||
|
||||
g_gpin[i].gpio.gp_pintype = GPIO_INPUT_PIN;
|
||||
g_gpin[i].gpio.gp_ops = &gpin_ops;
|
||||
g_gpin[i].id = i;
|
||||
gpio_pin_register(&g_gpin[i].gpio, pincount);
|
||||
|
||||
/* Configure the pins that will be used as INPUT */
|
||||
|
||||
esp32s2_configgpio(g_gpioinputs[i], INPUT_FUNCTION_3);
|
||||
|
||||
pincount++;
|
||||
}
|
||||
#endif
|
||||
|
||||
pincount = 0;
|
||||
|
||||
#if BOARD_NGPIOINT > 0
|
||||
for (i = 0; i < BOARD_NGPIOINT; i++)
|
||||
{
|
||||
/* Setup and register the GPIO pin */
|
||||
|
||||
g_gpint[i].esp32s2gpio.gpio.gp_pintype = GPIO_INTERRUPT_PIN;
|
||||
g_gpint[i].esp32s2gpio.gpio.gp_ops = &gpint_ops;
|
||||
g_gpint[i].esp32s2gpio.id = i;
|
||||
gpio_pin_register(&g_gpint[i].esp32s2gpio.gpio, pincount);
|
||||
|
||||
/* Configure the pins that will be used as interrupt input */
|
||||
|
||||
esp32s2_configgpio(g_gpiointinputs[i], INPUT_FUNCTION_3 | PULLDOWN);
|
||||
|
||||
pincount++;
|
||||
}
|
||||
#endif
|
||||
|
||||
return OK;
|
||||
}
|
||||
#endif /* CONFIG_DEV_GPIO && !CONFIG_GPIO_LOWER_HALF */
|
||||
|
|
@ -1,63 +0,0 @@
|
|||
/****************************************************************************
|
||||
* boards/xtensa/esp32s2/esp32s2-saola-1/src/esp32s2_reset.c
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <nuttx/arch.h>
|
||||
#include <nuttx/board.h>
|
||||
|
||||
#ifdef CONFIG_BOARDCTL_RESET
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: board_reset
|
||||
*
|
||||
* Description:
|
||||
* Reset board. Support for this function is required by board-level
|
||||
* logic if CONFIG_BOARDCTL_RESET is selected.
|
||||
*
|
||||
* Input Parameters:
|
||||
* status - Status information provided with the reset event. This
|
||||
* meaning of this status information is board-specific. If not
|
||||
* used by a board, the value zero may be provided in calls to
|
||||
* board_reset().
|
||||
*
|
||||
* Returned Value:
|
||||
* If this function returns, then it was not possible to power-off the
|
||||
* board due to some constraints. The return value in this case is a
|
||||
* board-specific reason for the failure to shutdown.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int board_reset(int status)
|
||||
{
|
||||
up_systemreset();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#endif /* CONFIG_BOARDCTL_RESET */
|
||||
114
tools/esp32s2/Config.mk
Normal file
114
tools/esp32s2/Config.mk
Normal file
|
|
@ -0,0 +1,114 @@
|
|||
############################################################################
|
||||
# tools/esp32s2/Config.mk
|
||||
#
|
||||
# Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
# contributor license agreements. See the NOTICE file distributed with
|
||||
# this work for additional information regarding copyright ownership. The
|
||||
# ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
# "License"); you may not use this file except in compliance with the
|
||||
# License. You may obtain a copy of the License at
|
||||
#
|
||||
# http://www.apache.org/licenses/LICENSE-2.0
|
||||
#
|
||||
# Unless required by applicable law or agreed to in writing, software
|
||||
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
# License for the specific language governing permissions and limitations
|
||||
# under the License.
|
||||
#
|
||||
############################################################################
|
||||
|
||||
# These are the macros that will be used in the NuttX make system to compile
|
||||
# and assemble source files and to insert the resulting object files into an
|
||||
# archive. These replace the default definitions at tools/Config.mk
|
||||
|
||||
ifeq ($(CONFIG_ESP32S2_FLASH_2M),y)
|
||||
FLASH_SIZE := 2MB
|
||||
else ifeq ($(CONFIG_ESP32S2_FLASH_4M),y)
|
||||
FLASH_SIZE := 4MB
|
||||
else ifeq ($(CONFIG_ESP32S2_FLASH_8M),y)
|
||||
FLASH_SIZE := 8MB
|
||||
else ifeq ($(CONFIG_ESP32S2_FLASH_16M),y)
|
||||
FLASH_SIZE := 16MB
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_ESP32S2_FLASH_MODE_DIO),y)
|
||||
FLASH_MODE := dio
|
||||
else ifeq ($(CONFIG_ESP32S2_FLASH_MODE_DOUT),y)
|
||||
FLASH_MODE := dout
|
||||
else ifeq ($(CONFIG_ESP32S2_FLASH_MODE_QIO),y)
|
||||
FLASH_MODE := qio
|
||||
else ifeq ($(CONFIG_ESP32S2_FLASH_MODE_QOUT),y)
|
||||
FLASH_MODE := qout
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_ESP32S2_FLASH_FREQ_80M),y)
|
||||
FLASH_FREQ := 80m
|
||||
else ifeq ($(CONFIG_ESP32S2_FLASH_FREQ_40M),y)
|
||||
FLASH_FREQ := 40m
|
||||
else ifeq ($(CONFIG_ESP32S2_FLASH_FREQ_26M),y)
|
||||
FLASH_FREQ := 26m
|
||||
else ifeq ($(CONFIG_ESP32S2_FLASH_FREQ_20M),y)
|
||||
FLASH_FREQ := 20m
|
||||
endif
|
||||
|
||||
ESPTOOL_ELF2IMG_OPTS := -fs $(FLASH_SIZE) -fm $(FLASH_MODE) -ff $(FLASH_FREQ)
|
||||
|
||||
ifeq ($(CONFIG_ESP32S2_FLASH_DETECT),y)
|
||||
ESPTOOL_WRITEFLASH_OPTS := -fs detect -fm dio -ff $(FLASH_FREQ)
|
||||
else
|
||||
ESPTOOL_WRITEFLASH_OPTS := -fs $(FLASH_SIZE) -fm dio -ff $(FLASH_FREQ)
|
||||
endif
|
||||
|
||||
ifdef ESPTOOL_BINDIR
|
||||
BL_OFFSET=0x1000
|
||||
PT_OFFSET=0x8000
|
||||
BOOTLOADER=$(ESPTOOL_BINDIR)/bootloader-esp32s2.bin
|
||||
PARTITION_TABLE=$(ESPTOOL_BINDIR)/partition-table-esp32s2.bin
|
||||
FLASH_BL=$(BL_OFFSET) $(BOOTLOADER)
|
||||
FLASH_PT=$(PT_OFFSET) $(PARTITION_TABLE)
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_ESP32S2_QEMU_IMAGE),y)
|
||||
MK_QEMU_IMG=$(TOPDIR)/tools/esp32s2/mk_qemu_img.sh -b $(BOOTLOADER) -p $(PARTITION_TABLE)
|
||||
else
|
||||
MK_QEMU_IMG=
|
||||
endif
|
||||
|
||||
# POSTBUILD -- Perform post build operations
|
||||
|
||||
define POSTBUILD
|
||||
$(Q) echo "MKIMAGE: ESP32S2 binary"
|
||||
$(Q) if ! esptool.py version 1>/dev/null 2>&1; then \
|
||||
echo ""; \
|
||||
echo "esptool.py not found. Please run: \"pip install esptool\""; \
|
||||
echo ""; \
|
||||
echo "Run make again to create the nuttx.bin image."; \
|
||||
exit 1; \
|
||||
fi
|
||||
$(Q) if [ -z $(FLASH_SIZE) ]; then \
|
||||
echo "Missing Flash memory size configuration for the ESP32S2 chip."; \
|
||||
exit 1; \
|
||||
fi
|
||||
esptool.py -c esp32-s2 elf2image $(ESPTOOL_ELF2IMG_OPTS) -o nuttx.bin nuttx
|
||||
$(Q) echo "Generated: nuttx.bin (ESP32S2 compatible)"
|
||||
$(Q) $(MK_QEMU_IMG)
|
||||
endef
|
||||
|
||||
# ESPTOOL_BAUD -- Serial port baud rate used when flashing/reading via esptool.py
|
||||
|
||||
ESPTOOL_BAUD ?= 921600
|
||||
|
||||
# DOWNLOAD -- Download binary image via esptool.py
|
||||
|
||||
define DOWNLOAD
|
||||
|
||||
$(eval ESPTOOL_BINS := $(FLASH_BL) $(FLASH_PT) 0x10000 $(1).bin)
|
||||
|
||||
$(Q) if [ -z $(ESPTOOL_PORT) ]; then \
|
||||
echo "DOWNLOAD error: Missing serial port device argument."; \
|
||||
echo "USAGE: make download ESPTOOL_PORT=<port> [ ESPTOOL_BAUD=<baud> ] [ ESPTOOL_BINDIR=<dir> ]"; \
|
||||
exit 1; \
|
||||
fi
|
||||
esptool.py -c esp32-s2 -p $(ESPTOOL_PORT) -b $(ESPTOOL_BAUD) write_flash $(ESPTOOL_WRITEFLASH_OPTS) $(ESPTOOL_BINS)
|
||||
endef
|
||||
Loading…
Reference in a new issue