Remove trailing spaces at the end of lines.
This commit is contained in:
Gregory Nutt
parent
81c6bda341
commit
8c61c2f31b
71 changed files with 153 additions and 153 deletions
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@ -18170,7 +18170,7 @@
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almost complete... still lacking GPIO support and LED support. There are
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still no significant drivers available.
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* SMP: Introduce spin_lock_irqsave() and spin_unlock_irqrestore(). These
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APIs are simplified version of enter_critical_section() and
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APIs are simplified version of enter_critical_section() and
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leave_critical_section() to protect data (e.g. registers) in SMP mode. By
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using these APIs inside drivers, performance will be improved. From
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Masayuki Ishikawa (2017-12-07).
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@ -18660,7 +18660,7 @@
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longer returns an errno. From Gregory Nutt (2018-01-31).
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* graphics/: Review return values for all calls to kthread_start() because
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it no longer returns an errno. From Gregory Nutt (2018-01-31).
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* sched/: Convert legitimate uses of task_create() to nxtask_create().
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* sched/: Convert legitimate uses of task_create() to nxtask_create().
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Review handling of returned values from all uses of kthread_create() (as
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well as nxtask_create()). From Gregory Nutt (2018-01-31).
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* arm/src/kinetis: Correct some Ethernet PHY register bit tests for the
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@ -18815,7 +18815,7 @@
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Mayencourt (2018-02-19).
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* drivers/mtd: mtd_config.c: Add still more error handling (to detect bad
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underlying flash implementations). Remove MTD_ERASE that was erasing data
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block instead of erase block. This is a partial revert of 4f18b4.
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block instead of erase block. This is a partial revert of 4f18b4.
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Reported-by: Pascal Speck <iktek01@yahoo.com>
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* arch/arm/src/stm32l4: stm32l4_flash: change flash programming to use
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page buffer for unaligned writes. From Juha Niskanen (2018-02-19).
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@ -487,7 +487,7 @@
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As an example, all ARM processor architectures are provided under the <code>arch/arm/</code> directory which is selected with the <code>CONFIG_ARCH="arm"</code> configuration option.
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</p>
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<p>
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Variants of the processor architecture may be provided in sub-directories of the
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Variants of the processor architecture may be provided in sub-directories of the
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Extending this example, the ARMv7-M ARM family is supported by logic in <code>arch/arm/include/armv7-m</code> and <code>arch/arm/src/armv7-m</code> directories which are selected by the <code>CONFIG_ARCH_CORTEXM3=y</code>, <code>CONFIG_ARCH_CORTEXM4=y</code>, or <code>CONFIG_ARCH_CORTEXM7=y</code> configuration options
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</p>
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</li>
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@ -33,8 +33,8 @@
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* POSSIBILITY OF SUCH DAMAGE.
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*
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*Change Record:
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* bf20171107 Created file. It's identical to stm32f74xx75xx_irq except for the
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* exclusions noted by this tag, and the addition of the last IRQ
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* bf20171107 Created file. It's identical to stm32f74xx75xx_irq except for the
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* exclusions noted by this tag, and the addition of the last IRQ
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* for SDMMC2 (IRQ103).
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****************************************************************************************************/
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@ -62,7 +62,7 @@ g_undeftmp:
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g_aborttmp:
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.word 0 /* Saved lr */
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.word 0 /* Saved spsr */
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#ifdef CONFIG_ARMV7A_DECODEFIQ
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g_fiqtmp:
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.word 0 /* Saved lr */
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@ -71,7 +71,7 @@
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#define LC823450_PART5_START (LC823450_PART4_START + LC823450_PART4_NBLOCKS)
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#define LC823450_PART5_NBLOCKS 32768
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#define LC823450_PART6_START (LC823450_PART5_START + LC823450_PART5_NBLOCKS)
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#define LC823450_PART6_NBLOCKS 131072
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#define LC823450_PART6_NBLOCKS 131072
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#define LC823450_PART7_START (LC823450_PART6_START + LC823450_PART6_NBLOCKS)
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#define LC823450_PART7_NBLOCKS 32768
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#define LC823450_PART8_START (LC823450_PART7_START + LC823450_PART7_NBLOCKS)
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@ -251,7 +251,7 @@ SINT_T fixedSdDrReadSector(UI_32 addr, UI_32 cnt, void *buf, SINT_T type,
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struct SdDrCfg_s *cfg);
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UI_32 sdif_get_status(UI_32);
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#if defined(__cplusplus)
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}
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#endif
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@ -280,7 +280,7 @@ static uart_dev_t g_uart0port =
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.size = CONFIG_UART0_RXBUFSIZE,
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.buffer = g_uart0rxbuffer,
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},
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.xmit =
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.xmit =
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{
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.size = CONFIG_UART0_TXBUFSIZE,
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.buffer = g_uart0txbuffer,
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@ -491,7 +491,7 @@ void lpc54_emc_sram_initialize(FAR uint32_t *extwait,
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unsigned int i;
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/* Initialize extended wait. */
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DEBUGASSERT(statconfig != NULL && nchips > 0);
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if (extwait)
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@ -175,7 +175,7 @@ struct emc_static_chip_config_s
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* read access in units of nanoseconds */
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uint32_t waitreadpage; /* In page mode, the read after the first read
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* wait states in units of nanoseconds */
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uint32_t waitwrite; /* The delay from chip select to write access in
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uint32_t waitwrite; /* The delay from chip select to write access in
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* units of nanoseconds */
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uint32_t waitturn; /* The Bus turn-around time in units of
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* nanoseconds */
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@ -3793,16 +3793,16 @@ static void sam_hw_setup(struct sam_usbdev_s *priv)
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/* Load USB factory calibration values from NVRAM */
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calib_transn = getreg32(SYSCTRL_FUSES_USBTRANSN_ADDR) &
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calib_transn = getreg32(SYSCTRL_FUSES_USBTRANSN_ADDR) &
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SYSCTRL_FUSES_USBTRANSN_MASK >> SYSCTRL_FUSES_USBTRANSN_SHIFT;
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calib_transp = getreg32(SYSCTRL_FUSES_USBTRANSP_ADDR) &
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calib_transp = getreg32(SYSCTRL_FUSES_USBTRANSP_ADDR) &
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SYSCTRL_FUSES_USBTRANSP_MASK >> SYSCTRL_FUSES_USBTRANSP_SHIFT;
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calib_trim = getreg32(SYSCTRL_FUSES_USBTRIM_ADDR) &
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SYSCTRL_FUSES_USBTRIM_MASK >> SYSCTRL_FUSES_USBTRIM_SHIFT;
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padcalib = USB_PADCAL_TRANSP(calib_transp) |
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padcalib = USB_PADCAL_TRANSP(calib_transp) |
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USB_PADCAL_TRANSN(calib_transn) |
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USB_PADCAL_TRIM(calib_trim);
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@ -294,7 +294,7 @@
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#define USART_CTRLC_BRKLEN_SHIFT (8) /* Bits 8-9: LIN Master Break Length */
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#define USART_CTRLC_BRKLEN_MASK (3 << USART_CTRLC_BRKLEN_SHIFT)
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# define USART_CTRLC_BRKLEN_13BITS (0 << USART_CTRLC_BRKLEN_SHIFT) /* 13 bit times */
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# define USART_CTRLC_BRKLEN_17BITS (1 << USART_CTRLC_BRKLEN_SHIFT) /* 17 bit times */
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# define USART_CTRLC_BRKLEN_17BITS (1 << USART_CTRLC_BRKLEN_SHIFT) /* 17 bit times */
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# define USART_CTRLC_BRKLEN_21BITS (2 << USART_CTRLC_BRKLEN_SHIFT) /* 21 bit times */
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# define USART_CTRLC_BRKLEN_26BITS (3 << USART_CTRLC_BRKLEN_SHIFT) /* 26 bit times */
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#define USART_CTRLC_HDRDLY_SHIFT (10) /* Bits 10-11: LIN Master Header Delay */
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@ -47,7 +47,7 @@
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#include <arch/stm32/chip.h>
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/* Include the chip interrupt definition file */
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#include <arch/stm32/irq.h>
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/* Include the chip pin configuration file */
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@ -140,7 +140,7 @@
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# define RCC_PLLCFG_PLLN(n) ((n) << RCC_PLLCFG_PLLN_SHIFT) /* n = 2..432 */
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#define RCC_PLLCFG_PLLP_SHIFT (16) /* Bits 16-17: Main PLL (PLL) main system clock divider */
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#define RCC_PLLCFG_PLLP_MASK (3 << RCC_PLLCFG_PLLP_SHIFT)
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# define RCC_PLLCFG_PLLP(n) ((((n)>>1)-1)<< RCC_PLLCFG_PLLP_SHIFT) /* n=2,4,6,8 */
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# define RCC_PLLCFG_PLLP(n) ((((n)>>1)-1)<< RCC_PLLCFG_PLLP_SHIFT) /* n=2,4,6,8 */
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# define RCC_PLLCFG_PLLP_2 (0 << RCC_PLLCFG_PLLP_SHIFT) /* 00: PLLP = 2 */
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# define RCC_PLLCFG_PLLP_4 (1 << RCC_PLLCFG_PLLP_SHIFT) /* 01: PLLP = 4 */
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# define RCC_PLLCFG_PLLP_6 (2 << RCC_PLLCFG_PLLP_SHIFT) /* 10: PLLP = 6 */
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@ -54,7 +54,7 @@
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#define STM32_SYSCFG_MEMRMP_OFFSET 0x0000 /* SYSCFG memory remap register */
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#define STM32_SYSCFG_PMC_OFFSET 0x0004 /* SYSCFG peripheral mode configuration register */
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#define STM32_SYSCFG_EXTICR_OFFSET(p) (0x0008 + ((p) & 0x000c)) /* Registers are displaced by 4! */
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#define STM32_SYSCFG_EXTICR1_OFFSET 0x0008 /* SYSCFG external interrupt configuration register 1 */
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#define STM32_SYSCFG_EXTICR2_OFFSET 0x000c /* SYSCFG external interrupt configuration register 2 */
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@ -44,7 +44,7 @@
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#include <nuttx/config.h>
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#if defined(CONFIG_STM32F7_STM32F72XX) || defined(CONFIG_STM32F7_STM32F73XX)
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#if defined(CONFIG_STM32F7_STM32F72XX) || defined(CONFIG_STM32F7_STM32F73XX)
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/************************************************************************************
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* Pre-processor Definitions
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@ -735,7 +735,7 @@ static void stm32_dma2d_lpfc(int lid, uint32_t blendmode, uint8_t alpha,
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: stm32_dma2d_setclut
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*
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@ -185,7 +185,7 @@ static inline irqstate_t up_irq_save(void)
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/* Restore saved interrupt state */
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static inline void up_irq_restore(irqstate_t flags)
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{
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{
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if ((flags & AVR32_SR_GM_MASK) == 0)
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{
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__asm__ __volatile__ (
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@ -232,7 +232,7 @@
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#define SPR_CPUCFGR_NSGF_SHIFT (0)
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#define SPR_CPUCFGR_NSGF_MASK (0xf << SPR_CPUCFGR_NSGF_SHIFT)
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#define SPR_CPUCFGR_CGF (1 << 4)
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#define SPR_CPUCFGR_CGF (1 << 4)
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#define SPR_CPUCFGR_OB32S (1 << 5) /* ORBIS32 Supported */
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#define SPR_CPUCFGR_OB64S (1 << 6) /* ORBIS64 Supported */
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#define SPR_CPUCFGR_OF32S (1 << 7) /* ORFPX32 Supported */
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@ -77,7 +77,7 @@
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void up_task_start(main_t taskentry, int argc, FAR char *argv[])
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{
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/* Let sys_call3() do all of the work */
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sinfo("entry %p argc %d\n", taskentry, argc);
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sys_call3(SYS_task_start, (uintptr_t)taskentry, (uintptr_t)argc,
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@ -77,7 +77,7 @@ static int or1k_timer_isr(int irq, uint32_t *regs, void *arg)
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mtspr(SPR_TICK_TTMR, ttmr);
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sched_process_timer();
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return OK;
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}
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@ -89,7 +89,7 @@ static int or1k_timer_isr(int irq, uint32_t *regs, void *arg)
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* Name: or1k_timer_initialize
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*
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* Description:
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* Initialize the OpenRISC Tick Timer unit
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* Initialize the OpenRISC Tick Timer unit
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*
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****************************************************************************/
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@ -104,6 +104,6 @@ void or1k_timer_initialize(void)
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mtspr(SPR_TICK_TTCR, 0);
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/* Write TTMR */
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mtspr(SPR_TICK_TTMR, ttmr);
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mtspr(SPR_TICK_TTMR, ttmr);
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}
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@ -81,7 +81,7 @@ ifeq ($(CONFIG_DEBUG_FEATURES),y)
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endif
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CHIP_ASRCS =
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CHIP_CSRCS =
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CHIP_CSRCS =
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ifneq ($(CONFIG_SCHED_TICKLESS),y)
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#CHIP_CSRCS += sam_timerisr.c
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@ -250,7 +250,7 @@ _reset_vector:
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/* Set the stack pointer */
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l.movhi r1,hi(_ebss);
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l.ori r1,r1,lo(_ebss);
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l.ori r1,r1,lo(_ebss);
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l.addi r1,r1,CONFIG_IDLETHREAD_STACKSIZE-4;
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l.ori r2,r1,0;
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l.nop
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@ -262,7 +262,7 @@ _reset_vector:
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l.nop;
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/* Should never reach here */
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l.j 0;
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l.nop;
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@ -281,7 +281,7 @@ _data_page_fault:
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l.nop;
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l.j 0;
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l.nop;
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/* Instruction page fault */
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.org 0x400
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@ -289,7 +289,7 @@ _instruction_page_fault:
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l.nop;
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l.j 0;
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l.nop;
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/* Tick Timer */
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.org 0x500
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@ -354,7 +354,7 @@ _itlb_miss:
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/* Range exception */
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.org 0xB00
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.org 0xB00
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_range_exception:
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l.nop;
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l.j 0;
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@ -96,7 +96,7 @@ int lpc43_max31855initialize(FAR const char *devpath, int bus, uint16_t devid)
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{
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snerr("ERROR: Error registering MAX31855\n");
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}
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return ret;
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}
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@ -76,12 +76,12 @@ void weak_function lpc43_sspdev_initialize(void)
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{
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snerr("ERROR: Error configuring chip select GPIO pin\n");
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}
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lpc43_pin_config(PINCONFIG_MAX31855_CS2);
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ret = lpc43_gpio_config(GPIO_MAX31855_CS2);
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if (ret < 0)
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{
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snerr("ERROR: Error configuring chip select GPIO pin\n")
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snerr("ERROR: Error configuring chip select GPIO pin\n")
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}
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#endif
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}
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@ -108,7 +108,7 @@ void lpc43_ssp0select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
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{
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lpc43_gpio_write(GPIO_MAX31855_CS1, !selected);
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}
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if (devid == SPIDEV_TEMPERATURE(1))
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{
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lpc43_gpio_write(GPIO_MAX31855_CS2, !selected);
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@ -157,7 +157,7 @@ void lpc43_ssp1select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
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{
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lpc43_gpio_write(GPIO_MAX31855_CS1, !selected);
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}
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if (devid == SPIDEV_TEMPERATURE(1))
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{
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lpc43_gpio_write(GPIO_MAX31855_CS2, !selected);
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@ -18,7 +18,7 @@
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORSMULTILINK
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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@ -57,12 +57,12 @@ index 687f50ca..8418eff8 100644
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+++ b/examples/ostest/waitpid.c
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@@ -54,7 +54,7 @@
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****************************************************************************/
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#define RETURN_STATUS 14
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-#define NCHILDREN 3
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+#define NCHILDREN 2
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#define PRIORITY 100
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/****************************************************************************
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Other Status
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@ -373,7 +373,7 @@ FPU Configuration Options
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-------------------------
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There are two version of the FPU support built into the most NuttX Cortex-M4
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ports.
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ports.
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1. Non-Lazy Floating Point Register Save
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@ -53,7 +53,7 @@
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* ------------------- ---------------------------- ------
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* SYMBOL Meaning LED
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* ------------------- ---------------------------- ------
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*
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*
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* LED_STARTED NuttX has been started OFF
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* LED_HEAPALLOCATE Heap has been allocated OFF
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* LED_IRQSENABLED Interrupts enabled OFF
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@ -55,7 +55,7 @@
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* Name: sam_board_initialize
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*
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* Description:
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* All SAMD5/E5 architectures must provide the following entry point.
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* All SAMD5/E5 architectures must provide the following entry point.
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* This entry point is called early in the initialization -- after all
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* memory has been configured and mapped but before any devices have been
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* initialized.
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@ -146,7 +146,7 @@
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|||
#define STM32_APB2_TIM11_CLKIN (STM32_PCLK2_FREQUENCY)
|
||||
|
||||
/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx
|
||||
* otherwise frequency is 2xAPBx.
|
||||
* otherwise frequency is 2xAPBx.
|
||||
* Note: TIM1,9,11 are on APB2, others on APB1
|
||||
*/
|
||||
/* REVISIT */
|
||||
|
|
|
|||
|
|
@ -80,7 +80,7 @@ void stm32_boardinitialize(void)
|
|||
|
||||
#ifdef CONFIG_ARCH_BUTTONS
|
||||
/* Configure on-board BUTTONs if BUTTON support has been selected. */
|
||||
|
||||
|
||||
board_button_initialize();
|
||||
#endif
|
||||
}
|
||||
|
|
|
|||
|
|
@ -330,7 +330,7 @@ int stm32l4_gpio_initialize(void)
|
|||
pincount++;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif /* CONFIG_DEV_GPIO && !CONFIG_GPIO_LOWER_HALF */
|
||||
|
|
|
|||
|
|
@ -78,7 +78,7 @@ void board_autoled_initialize(void)
|
|||
/* Set the or1k GPIO direction register to output */
|
||||
|
||||
/* The Terasic C5G has 18 LEDs on GPIO0[0:17] */
|
||||
|
||||
|
||||
*led_dir = 0x3fff;
|
||||
*led_data = 0x0;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1204,7 +1204,7 @@ Configuration Sub-directories
|
|||
1. Prepare USB flash storage. This configuration depends on .WAV files
|
||||
provided to the system via a USB flash stick. There are some sample
|
||||
audio files at https://github.com/tdrozdovskiy/CS43L22-Audio-driver
|
||||
and these steps will put those sample .WAV files onto the USB flash:
|
||||
and these steps will put those sample .WAV files onto the USB flash:
|
||||
|
||||
a. Format the USB flash storage into FAT. For example by next command
|
||||
|
||||
|
|
|
|||
|
|
@ -105,7 +105,7 @@ int attach_disc_lis3dsh(FAR struct lis3dsh_config_s *config, xcpt_t interrupt_ha
|
|||
* Zero (OK) on success; a negated errno value on failure.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
|
||||
int stm32_lis3dshinitialize(FAR const char *devpath)
|
||||
{
|
||||
static struct lis3dsh_config_s acc0_config;
|
||||
|
|
@ -113,7 +113,7 @@ int stm32_lis3dshinitialize(FAR const char *devpath)
|
|||
int ret;
|
||||
|
||||
sninfo("Initializing LIS3DSH\n");
|
||||
|
||||
|
||||
acc0_config.irq=22;
|
||||
acc0_config.spi_devid=0;
|
||||
acc0_config.attach = &attach_disc_lis3dsh;
|
||||
|
|
|
|||
|
|
@ -406,7 +406,7 @@
|
|||
/* Vertical Sync Polarity */
|
||||
#define BOARD_LTDC_GCR_VSPOL 0 /* !LTDC_GCR_VSPOL */
|
||||
/* Horicontal Sync Polarity */
|
||||
#define BOARD_LTDC_GCR_HSPOL 0 /* !LTDC_GCR_HSPOL */
|
||||
#define BOARD_LTDC_GCR_HSPOL 0 /* !LTDC_GCR_HSPOL */
|
||||
|
||||
/* GPIO pinset */
|
||||
|
||||
|
|
|
|||
|
|
@ -54,7 +54,7 @@
|
|||
*
|
||||
* ------------------ ------------------------ ------
|
||||
* SYMBOL Meaning LED
|
||||
* ------------------ ------------------------ ------
|
||||
* ------------------ ------------------------ ------
|
||||
*
|
||||
* LED_STARTED NuttX has been started OFF
|
||||
* LED_HEAPALLOCATE Heap has been allocated OFF
|
||||
|
|
|
|||
|
|
@ -222,7 +222,7 @@ static int dac7571_send(FAR struct dac_dev_s *dev, FAR struct dac_msg_s *msg)
|
|||
|
||||
/* Then perform the transfer. */
|
||||
|
||||
ret = i2c_write(priv->i2c, &config, buffer, BUFFER_SIZE);
|
||||
ret = i2c_write(priv->i2c, &config, buffer, BUFFER_SIZE);
|
||||
if (ret < 0)
|
||||
{
|
||||
aerr("ERROR: dac7571_send failed code:%d\n", ret);
|
||||
|
|
|
|||
|
|
@ -841,7 +841,7 @@ static inline void up_clear(FAR struct max7219_dev_s *priv)
|
|||
* spi - An instance of the SPI interface to use to communicate
|
||||
* with the MAX7219.
|
||||
* devno - Device number to identify current display.
|
||||
*
|
||||
*
|
||||
* Returned Value:
|
||||
* Zero (OK) on success; a negated errno value on failure.
|
||||
*
|
||||
|
|
|
|||
|
|
@ -570,7 +570,7 @@ static ssize_t adxl372_dvr_read(FAR void *instance_handle, FAR char *buffer,
|
|||
size_t buflen)
|
||||
{
|
||||
FAR struct adxl372_dev_s *priv = ((FAR struct adxl372_dev_s *)instance_handle);
|
||||
union
|
||||
union
|
||||
{
|
||||
int16_t d16;
|
||||
char d8[2];
|
||||
|
|
|
|||
|
|
@ -218,16 +218,16 @@ static void apds9960_resetgesture(FAR struct apds9960_dev_s *priv)
|
|||
{
|
||||
priv->gesture_data.index = 0;
|
||||
priv->gesture_data.total_gestures = 0;
|
||||
|
||||
|
||||
priv->gesture_ud_delta = 0;
|
||||
priv->gesture_lr_delta = 0;
|
||||
|
||||
|
||||
priv->gesture_ud_count = 0;
|
||||
priv->gesture_lr_count = 0;
|
||||
|
||||
|
||||
priv->gesture_near_count = 0;
|
||||
priv->gesture_far_count = 0;
|
||||
|
||||
|
||||
priv->gesture_state = 0;
|
||||
}
|
||||
|
||||
|
|
@ -288,7 +288,7 @@ static int apds9960_setdefault(FAR struct apds9960_dev_s *priv)
|
|||
}
|
||||
|
||||
/* Set LED driver strength to 100mA, AGAIN 4X and PGAIN 4X */
|
||||
|
||||
|
||||
ret = apds9960_i2c_write8(priv, APDS9960_CONTROL, DEFAULT_CONTROL);
|
||||
if (ret < 0)
|
||||
{
|
||||
|
|
@ -443,7 +443,7 @@ static int apds9960_setdefault(FAR struct apds9960_dev_s *priv)
|
|||
return ret;
|
||||
}
|
||||
|
||||
return OK;
|
||||
return OK;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
|
|
@ -600,7 +600,7 @@ static bool apds9960_isgestureavailable(FAR struct apds9960_dev_s *priv)
|
|||
{
|
||||
int ret;
|
||||
uint8_t val;
|
||||
|
||||
|
||||
/* Read value from GSTATUS register */
|
||||
|
||||
ret = apds9960_i2c_read8(priv, APDS9960_GSTATUS, &val);
|
||||
|
|
@ -656,7 +656,7 @@ static bool apds9960_processgesture(FAR struct apds9960_dev_s *priv)
|
|||
priv->gesture_data.total_gestures);
|
||||
return false;
|
||||
}
|
||||
|
||||
|
||||
/* Check to make sure our data isn't out of bounds */
|
||||
|
||||
if ((priv->gesture_data.total_gestures <= 32) && \
|
||||
|
|
@ -678,7 +678,7 @@ static bool apds9960_processgesture(FAR struct apds9960_dev_s *priv)
|
|||
break;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/* If one of the _first values is 0, then there is no good data */
|
||||
|
||||
if ((u_first == 0) || (d_first == 0) || \
|
||||
|
|
@ -712,14 +712,14 @@ static bool apds9960_processgesture(FAR struct apds9960_dev_s *priv)
|
|||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/* Calculate the first vs. last ratio of up/down and left/right */
|
||||
|
||||
ud_ratio_first = ((u_first - d_first) * 100) / (u_first + d_first);
|
||||
lr_ratio_first = ((l_first - r_first) * 100) / (l_first + r_first);
|
||||
ud_ratio_last = ((u_last - d_last) * 100) / (u_last + d_last);
|
||||
lr_ratio_last = ((l_last - r_last) * 100) / (l_last + r_last);
|
||||
|
||||
|
||||
sninfo("Last Values: \n");
|
||||
sninfo("U: %03d\n", u_last);
|
||||
sninfo("D: %03d\n", d_last);
|
||||
|
|
@ -736,7 +736,7 @@ static bool apds9960_processgesture(FAR struct apds9960_dev_s *priv)
|
|||
|
||||
ud_delta = ud_ratio_last - ud_ratio_first;
|
||||
lr_delta = lr_ratio_last - lr_ratio_first;
|
||||
|
||||
|
||||
sninfo("Deltas: \n");
|
||||
sninfo("UD: %03d\n", ud_delta);
|
||||
sninfo("LR: %03d\n", lr_delta);
|
||||
|
|
@ -745,11 +745,11 @@ static bool apds9960_processgesture(FAR struct apds9960_dev_s *priv)
|
|||
|
||||
priv->gesture_ud_delta += ud_delta;
|
||||
priv->gesture_lr_delta += lr_delta;
|
||||
|
||||
|
||||
sninfo("Accumulations: \n");
|
||||
sninfo("UD: %03d\n", priv->gesture_ud_delta);
|
||||
sninfo("LR: %03d\n", priv->gesture_lr_delta);
|
||||
|
||||
|
||||
/* Determine U/D gesture */
|
||||
|
||||
if (priv->gesture_ud_delta >= GESTURE_SENSITIVITY_1)
|
||||
|
|
@ -767,7 +767,7 @@ static bool apds9960_processgesture(FAR struct apds9960_dev_s *priv)
|
|||
priv->gesture_ud_count = 0;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/* Determine L/R gesture */
|
||||
|
||||
if (priv->gesture_lr_delta >= GESTURE_SENSITIVITY_1)
|
||||
|
|
@ -804,7 +804,7 @@ static bool apds9960_processgesture(FAR struct apds9960_dev_s *priv)
|
|||
priv->gesture_far_count++;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
if ((priv->gesture_near_count >= 10) && \
|
||||
(priv->gesture_far_count >= 2))
|
||||
{
|
||||
|
|
@ -833,7 +833,7 @@ static bool apds9960_processgesture(FAR struct apds9960_dev_s *priv)
|
|||
{
|
||||
priv->gesture_near_count++;
|
||||
}
|
||||
|
||||
|
||||
if (priv->gesture_near_count >= 10)
|
||||
{
|
||||
priv->gesture_ud_count = 0;
|
||||
|
|
@ -843,13 +843,13 @@ static bool apds9960_processgesture(FAR struct apds9960_dev_s *priv)
|
|||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
sninfo(" UD_CT: %03d\n", priv->gesture_ud_count);
|
||||
sninfo(" LR_CT: %03d\n", priv->gesture_lr_count);
|
||||
sninfo(" NEAR_CT: %03d\n", priv->gesture_near_count);
|
||||
sninfo(" FAR_CT: %03d\n", priv->gesture_far_count);
|
||||
sninfo("----------------------\n");
|
||||
|
||||
|
||||
return false;
|
||||
}
|
||||
|
||||
|
|
@ -996,7 +996,7 @@ static int apds9960_readgesture(FAR struct apds9960_dev_s *priv)
|
|||
int motion;
|
||||
int ret;
|
||||
int i;
|
||||
|
||||
|
||||
/* Make sure that power and gesture is on and data is valid */
|
||||
|
||||
if (!apds9960_isgestureavailable(priv))
|
||||
|
|
@ -1011,7 +1011,7 @@ static int apds9960_readgesture(FAR struct apds9960_dev_s *priv)
|
|||
/* Wait some time to collect next batch of FIFO data */
|
||||
|
||||
nxsig_usleep(FIFO_PAUSE_TIME);
|
||||
|
||||
|
||||
/* Get the contents of the STATUS register. Is data still valid? */
|
||||
|
||||
ret = apds9960_i2c_read8(priv, APDS9960_GSTATUS, &gstatus);
|
||||
|
|
@ -1020,7 +1020,7 @@ static int apds9960_readgesture(FAR struct apds9960_dev_s *priv)
|
|||
snerr("ERROR: Failed to read APDS9960_GSTATUS!\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
/* If we have valid data, read in FIFO */
|
||||
|
||||
if ((gstatus & GVALID) == GVALID)
|
||||
|
|
@ -1091,7 +1091,7 @@ static int apds9960_readgesture(FAR struct apds9960_dev_s *priv)
|
|||
//sninfo("gesture_motion = %d\n", gesture_motion);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/* Reset data */
|
||||
|
||||
priv->gesture_data.index = 0;
|
||||
|
|
|
|||
|
|
@ -1095,7 +1095,7 @@ static int lsm330_dvr_ioctl(FAR void *instance_handle, int cmd,
|
|||
* None
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
|
||||
static void lsm330_dvr_exchange(FAR void *instance_handle,
|
||||
FAR const void *txbuffer,
|
||||
FAR void *rxbuffer, size_t nwords)
|
||||
|
|
|
|||
|
|
@ -173,7 +173,7 @@ struct rndis_query_cmplt
|
|||
uint32_t buffer[]; /* Buffer */
|
||||
};
|
||||
|
||||
struct rndis_set_msg
|
||||
struct rndis_set_msg
|
||||
{
|
||||
struct rndis_command_header hdr;
|
||||
uint32_t objid; /* ObjectID */
|
||||
|
|
|
|||
|
|
@ -310,7 +310,7 @@
|
|||
#define USBMSC_MKEPBULKOUT(devDesc) ((devDesc)->epno[USBMSC_EP_BULKOUT_IDX])
|
||||
#define USBMSC_EPOUTBULK_ATTR (USB_EP_ATTR_XFER_BULK)
|
||||
|
||||
#define USBMSC_MKEPBULKIN(devDesc) (USB_DIR_IN | (devDesc)->epno[USBMSC_EP_BULKIN_IDX])
|
||||
#define USBMSC_MKEPBULKIN(devDesc) (USB_DIR_IN | (devDesc)->epno[USBMSC_EP_BULKIN_IDX])
|
||||
#define USBMSC_EPINBULK_ATTR (USB_EP_ATTR_XFER_BULK)
|
||||
|
||||
#define USBMSC_HSBULKMAXPACKET (512)
|
||||
|
|
|
|||
|
|
@ -54,7 +54,7 @@
|
|||
* In order to decrypt data, the user must manage the AES_END IRQ and have a
|
||||
* decryption key. There are two operative modes to make the data
|
||||
* decryption:
|
||||
*
|
||||
*
|
||||
* 1. Derive the decryption key from the encryption key and decrypt data
|
||||
* directly using the spirit_aes_derivekey_decrypt() function
|
||||
*
|
||||
|
|
@ -126,7 +126,7 @@ int spirit_aes_enable(FAR struct spirit_library_s *spirit,
|
|||
enum spirit_functional_state_e newstate);
|
||||
|
||||
/******************************************************************************
|
||||
* Name:
|
||||
* Name: spirit_aes_write_datain
|
||||
*
|
||||
* Description:
|
||||
* Writes the data to encrypt or decrypt, or the encryption key for the
|
||||
|
|
@ -151,7 +151,7 @@ int spirit_aes_write_datain(FAR struct spirit_library_s *spirit,
|
|||
FAR const uint8_t *buffer, uint8_t buflen);
|
||||
|
||||
/******************************************************************************
|
||||
* Name:
|
||||
* Name: spirit_aes_read_dataout
|
||||
*
|
||||
* Description:
|
||||
* Returns the encrypted or decrypted data or the decription key from the
|
||||
|
|
@ -195,7 +195,7 @@ int spirit_aes_write_key(FAR struct spirit_library_s *spirit,
|
|||
FAR const uint8_t *key);
|
||||
|
||||
/******************************************************************************
|
||||
* Name:
|
||||
* Name: spirit_aes_read_key
|
||||
*
|
||||
* Description:
|
||||
* Returns the encryption/decryption key from the AES_KEY_IN register.
|
||||
|
|
@ -247,7 +247,7 @@ int spirit_aes_enc2deckey(FAR struct spirit_library_s *spirit);
|
|||
int spirit_aes_encrypt(FAR struct spirit_library_s *spirit);
|
||||
|
||||
/******************************************************************************
|
||||
* Name:
|
||||
* Name: spirit_aes_decrypt
|
||||
*
|
||||
* Description:
|
||||
* Executes the decryption operation.
|
||||
|
|
|
|||
|
|
@ -124,7 +124,7 @@ int spirit_directrf_set_rxmode(FAR struct spirit_library_s *spirit,
|
|||
enum spirit_directrx_e directrx);
|
||||
|
||||
/******************************************************************************
|
||||
* Name:
|
||||
* Name: spirit_directrf_get_rxmode
|
||||
*
|
||||
* Description:
|
||||
* Returns the DirectRF RX mode of SPIRIT.
|
||||
|
|
@ -141,7 +141,7 @@ enum spirit_directrx_e
|
|||
spirit_directrf_get_rxmode(FAR struct spirit_library_s *spirit);
|
||||
|
||||
/******************************************************************************
|
||||
* Name:
|
||||
* Name: spirit_directrf_set_txmode
|
||||
*
|
||||
* Description:
|
||||
* Sets the TX mode of SPIRIT.
|
||||
|
|
@ -159,7 +159,7 @@ int spirit_directrf_set_txmode(FAR struct spirit_library_s *spirit,
|
|||
enum spirit_directtx_e directtx);
|
||||
|
||||
/******************************************************************************
|
||||
* Name:
|
||||
* Name: spirit_directrf_get_txmode
|
||||
*
|
||||
* Description:
|
||||
* Returns the DirectRF TX mode of SPIRIT.
|
||||
|
|
|
|||
|
|
@ -258,7 +258,7 @@ int spirit_pktmbus_set_postamble(FAR struct spirit_library_s *spirit,
|
|||
uint8_t postamble);
|
||||
|
||||
/******************************************************************************
|
||||
* Name:
|
||||
* Name: spirit_pktmbus_get_postamble
|
||||
*
|
||||
* Description:
|
||||
* Returns how many chip sequence "01" are used in the postamble
|
||||
|
|
@ -274,7 +274,7 @@ int spirit_pktmbus_set_postamble(FAR struct spirit_library_s *spirit,
|
|||
uint8_t spirit_pktmbus_get_postamble(FAR struct spirit_library_s *spirit);
|
||||
|
||||
/******************************************************************************
|
||||
* Name:
|
||||
* Name: spirit_pktmbus_set_submode
|
||||
*
|
||||
* Description:
|
||||
* Sets the MBUS submode used.
|
||||
|
|
|
|||
|
|
@ -98,7 +98,7 @@ int spirit_aes_enable(FAR struct spirit_library_s *spirit,
|
|||
}
|
||||
|
||||
/******************************************************************************
|
||||
* Name:
|
||||
* Name: spirit_aes_write_datain
|
||||
*
|
||||
* Description:
|
||||
* Writes the data to encrypt or decrypt, or the encryption key for the
|
||||
|
|
@ -149,7 +149,7 @@ int spirit_aes_write_datain(FAR struct spirit_library_s *spirit,
|
|||
}
|
||||
|
||||
/******************************************************************************
|
||||
* Name:
|
||||
* Name: spirit_aes_read_dataout
|
||||
*
|
||||
* Description:
|
||||
* Returns the encrypted or decrypted data or the decription key from the
|
||||
|
|
@ -239,7 +239,7 @@ int spirit_aes_write_key(FAR struct spirit_library_s *spirit,
|
|||
}
|
||||
|
||||
/******************************************************************************
|
||||
* Name:
|
||||
* Name: spirit_aes_read_key
|
||||
*
|
||||
* Description:
|
||||
* Returns the encryption/decryption key from the AES_KEY_IN register.
|
||||
|
|
@ -319,7 +319,7 @@ int spirit_aes_encrypt(FAR struct spirit_library_s *spirit)
|
|||
}
|
||||
|
||||
/******************************************************************************
|
||||
* Name:
|
||||
* Name: spirit_aes_decrypt
|
||||
*
|
||||
* Description:
|
||||
* Executes the decryption operation.
|
||||
|
|
|
|||
|
|
@ -91,7 +91,7 @@ int spirit_directrf_set_rxmode(FAR struct spirit_library_s *spirit,
|
|||
}
|
||||
|
||||
/******************************************************************************
|
||||
* Name:
|
||||
* Name: spirit_directrf_get_rxmode
|
||||
*
|
||||
* Description:
|
||||
* Returns the DirectRF RX mode of SPIRIT.
|
||||
|
|
@ -119,7 +119,7 @@ enum spirit_directrx_e
|
|||
}
|
||||
|
||||
/******************************************************************************
|
||||
* Name:
|
||||
* Name: spirit_directrf_set_txmode
|
||||
*
|
||||
* Description:
|
||||
* Sets the TX mode of SPIRIT.
|
||||
|
|
@ -162,7 +162,7 @@ int spirit_directrf_set_txmode(FAR struct spirit_library_s *spirit,
|
|||
}
|
||||
|
||||
/******************************************************************************
|
||||
* Name:
|
||||
* Name: spirit_directrf_get_txmode
|
||||
*
|
||||
* Description:
|
||||
* Returns the DirectRF TX mode of SPIRIT.
|
||||
|
|
|
|||
|
|
@ -107,7 +107,7 @@ int spirit_gpio_enable_tempsensor(FAR struct spirit_library_s *spirit,
|
|||
|
||||
DEBUGASSERT(IS_SPIRIT_FUNCTIONAL_STATE(newstate));
|
||||
|
||||
/* Reads the ANA_FUNC_CONF0 register and mask the result to enable or disable
|
||||
/* Reads the ANA_FUNC_CONF0 register and mask the result to enable or disable
|
||||
* the temperature sensor */
|
||||
|
||||
ret = spirit_reg_read(spirit, ANA_FUNC_CONF0_BASE, ®val, 1);
|
||||
|
|
|
|||
|
|
@ -282,7 +282,7 @@ int spirit_pktmbus_set_postamble(FAR struct spirit_library_s *spirit,
|
|||
}
|
||||
|
||||
/******************************************************************************
|
||||
* Name:
|
||||
* Name: spirit_pktmbus_get_postamble
|
||||
*
|
||||
* Description:
|
||||
* Returns how many chip sequence "01" are used in the postamble
|
||||
|
|
@ -309,7 +309,7 @@ uint8_t spirit_pktmbus_get_postamble(FAR struct spirit_library_s *spirit)
|
|||
}
|
||||
|
||||
/******************************************************************************
|
||||
* Name:
|
||||
* Name: spirit_pktmbus_set_submode
|
||||
*
|
||||
* Description:
|
||||
* Sets the MBUS submode used.
|
||||
|
|
|
|||
|
|
@ -1917,7 +1917,7 @@ static int tmpfs_opendir(FAR struct inode *mountpt, FAR const char *relpath,
|
|||
{
|
||||
dir->u.tmpfs.tf_tdo = tdo;
|
||||
dir->u.tmpfs.tf_index = 0;
|
||||
|
||||
|
||||
tmpfs_unlock_directory(tdo);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -26,7 +26,7 @@ at the present, but here is the longer term roadmap:
|
|||
operations. The toolkit can be used for window-oriented graphics
|
||||
without NxWidgets and is built on top of NX.
|
||||
NXFONTS - A set of C graphics tools for presenting (bitmap) font images.
|
||||
NX - The tiny NuttX windowing system. This includes the small-footprint
|
||||
NX - The tiny NuttX windowing system. This includes the small-footprint
|
||||
multi-user implentation (NXMU as described below). NX can be used
|
||||
without NxWidgets and without NXTOOLKIT for raw access to window memory.
|
||||
NXGLIB - Low level graphics utilities and direct framebuffer rendering logic.
|
||||
|
|
|
|||
|
|
@ -4,17 +4,17 @@
|
|||
*
|
||||
* Copyright (c) 2000-2008 Marc Alexander Lehmann <schmorp@schmorp.de>
|
||||
* This algorithm is believed to be patent-free.
|
||||
*
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modifica-
|
||||
* tion, are permitted provided that the following conditions are met:
|
||||
*
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MER-
|
||||
* CHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO
|
||||
|
|
|
|||
|
|
@ -110,7 +110,7 @@ extern "C"
|
|||
* spi - An instance of the SPI interface to use to communicate
|
||||
* with the MAX7219.
|
||||
* devno - Device number to identify current display.
|
||||
*
|
||||
*
|
||||
* Returned Value:
|
||||
* Zero (OK) on success; a negated errno value on failure.
|
||||
*
|
||||
|
|
|
|||
|
|
@ -143,7 +143,7 @@ struct radiodev_properties_s
|
|||
*
|
||||
* The radio network driver should then inform the network of the recipt
|
||||
* of a frame by calling sixlowpan_input() or ieee802154_input(). That
|
||||
* single frame (or, perhaps, list of frames) should be provided as
|
||||
* single frame (or, perhaps, list of frames) should be provided as
|
||||
* second argument of that call.
|
||||
*
|
||||
* The network will free the IOB by calling iob_free after it has
|
||||
|
|
|
|||
|
|
@ -45,7 +45,7 @@
|
|||
* priority" priority level. This mechanism is commonly supported by writing
|
||||
* the collection/processing task as a kernel driver worker thread that can
|
||||
* access multiple sensors.
|
||||
*
|
||||
*
|
||||
* A clean way to implement this is to implement this collection/processing
|
||||
* mechanism is as a driver that has efficient kernel-to-kernel access to
|
||||
* other sensor leaf-drivers that support the cluster driver interface.
|
||||
|
|
@ -175,7 +175,7 @@ extern "C"
|
|||
* leaf driver's register function.
|
||||
* It is passed as a parameter to the leaf driver's
|
||||
* driver_open() and driver_close() functions.
|
||||
*
|
||||
*
|
||||
* Returned Value:
|
||||
* Zero (OK) on success; a negated errno value on failure.
|
||||
*
|
||||
|
|
|
|||
|
|
@ -15,7 +15,7 @@ creatures. The have these properties:
|
|||
3. When used by the OS, some special care must be taken to assure that the
|
||||
OS logic does not disrupt the user's errno value and that the OS does
|
||||
not create inappropriate cancellation points.
|
||||
|
||||
|
||||
For example, sem_wait() is both a cancellation point and modifies the
|
||||
errno value. So within the FLAT build and without kernel version for
|
||||
the PROTECTED and KERNEL builds, the special internal OS interface
|
||||
|
|
|
|||
|
|
@ -2,17 +2,17 @@
|
|||
* libs/libc/lzf/lzf.h
|
||||
*
|
||||
* Copyright (c) 2000-2007 Marc Alexander Lehmann <schmorp@schmorp.de>
|
||||
*
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modifica-
|
||||
* tion, are permitted provided that the following conditions are met:
|
||||
*
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MER-
|
||||
* CHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO
|
||||
|
|
|
|||
|
|
@ -2,17 +2,17 @@
|
|||
* libs/libc/lzf/lzf_c.c
|
||||
*
|
||||
* Copyright (c) 2000-2010 Marc Alexander Lehmann <schmorp@schmorp.de>
|
||||
*
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modifica-
|
||||
* tion, are permitted provided that the following conditions are met:
|
||||
*
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MER-
|
||||
* CHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO
|
||||
|
|
@ -429,7 +429,7 @@ genhdr:
|
|||
|
||||
header = (FAR struct lzf_type1_header_s *)
|
||||
((uintptr_t)out_data - LZF_TYPE1_HDR_SIZE);
|
||||
|
||||
|
||||
header->lzf_magic[0] = 'Z';
|
||||
header->lzf_magic[1] = 'V';
|
||||
header->lzf_type = LZF_TYPE1_HDR;
|
||||
|
|
|
|||
|
|
@ -2,17 +2,17 @@
|
|||
* libs/libc/lzf/lzf_c.c
|
||||
*
|
||||
* Copyright (c) 2000-2010 Marc Alexander Lehmann <schmorp@schmorp.de>
|
||||
*
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modifica-
|
||||
* tion, are permitted provided that the following conditions are met:
|
||||
*
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MER-
|
||||
* CHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO
|
||||
|
|
@ -58,7 +58,7 @@
|
|||
*
|
||||
****************************************************************************/
|
||||
|
||||
unsigned int lzf_decompress (FAR const void *const in_data,
|
||||
unsigned int lzf_decompress (FAR const void *const in_data,
|
||||
unsigned int in_len, FAR void *out_data,
|
||||
unsigned int out_len)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -38,7 +38,7 @@
|
|||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
|
||||
/* __cos( x, y )
|
||||
*
|
||||
* kernel cos function on [-pi/4, pi/4], pi/4 ~ 0.785398164
|
||||
|
|
|
|||
|
|
@ -71,7 +71,7 @@
|
|||
# define ARGS(a) ()
|
||||
#endif
|
||||
|
||||
#define LARGS(a) () /* Relay on include files for libary func defs.
|
||||
#define LARGS(a) () /* Relay on include files for libary func defs.
|
||||
*/
|
||||
|
||||
#ifndef SIG_TYPE
|
||||
|
|
@ -90,7 +90,7 @@
|
|||
# define OBUFSIZ BUFSIZ /* Default output buffer size */
|
||||
#endif
|
||||
|
||||
#define MAXPATHLEN 1024 /* MAXPATHLEN - maximum length of a pathname we
|
||||
#define MAXPATHLEN 1024 /* MAXPATHLEN - maximum length of a pathname we
|
||||
* allow */
|
||||
#define SIZE_INNER_LOOP 256 /* Size of the inter (fast) compress loop */
|
||||
|
||||
|
|
@ -112,7 +112,7 @@
|
|||
#define INIT_BITS 9 /* initial number of bits/code */
|
||||
|
||||
#ifndef SACREDMEM
|
||||
/*
|
||||
/*
|
||||
* SACREDMEM is the amount of physical memory saved for others; compress
|
||||
* will hog the rest.
|
||||
*/
|
||||
|
|
@ -120,7 +120,7 @@
|
|||
#endif
|
||||
|
||||
#ifndef USERMEM
|
||||
/*
|
||||
/*
|
||||
* Set USERMEM to the maximum amount of physical user memory available
|
||||
* in bytes. USERMEM is used to determine the maximum BITS that can be used
|
||||
* for compression.
|
||||
|
|
@ -320,7 +320,7 @@ int block_mode = BLOCK_MODE; /* Block compress mode -C compatible with 2.0 */
|
|||
int maxbits = BITS; /* user settable max # bits/code */
|
||||
int zcat_flg = 0; /* Write output on stdout, suppress messages */
|
||||
int recursive = 0; /* compress directories */
|
||||
int exit_code = -1; /* Exitcode of compress (-1 no file compressed)
|
||||
int exit_code = -1; /* Exitcode of compress (-1 no file compressed)
|
||||
*/
|
||||
|
||||
char_type inbuf[IBUFSIZ + 64]; /* Input buffer */
|
||||
|
|
@ -436,7 +436,7 @@ int primetab[256] = /* Special secudary hash table. */
|
|||
/*
|
||||
* compress fdin to fdout
|
||||
*
|
||||
* Algorithm: use open addressing double hashing (no chaining) on the
|
||||
* Algorithm: use open addressing double hashing (no chaining) on the
|
||||
* prefix code / next character combination. We do a variant of Knuth's
|
||||
* algorithm D (vol. 3, sec. 6.4) along with G. Knott's relatively-prime
|
||||
* secondary probe. Here, the modular division first probe is gives way
|
||||
|
|
@ -541,8 +541,8 @@ void compress(int fdin, int fdout)
|
|||
}
|
||||
else
|
||||
rat = (bytes_in << 8) / (bytes_out + (outbits >> 3)); /* 8
|
||||
* fractional
|
||||
* bits
|
||||
* fractional
|
||||
* bits
|
||||
*/
|
||||
if (rat >= ratio)
|
||||
ratio = (int)rat;
|
||||
|
|
|
|||
|
|
@ -62,17 +62,17 @@
|
|||
* suspended until one or more becomes pending. The signals defined by set
|
||||
* will been blocked at the time of the call to sigwait(); otherwise the
|
||||
* behavior is undefined. The effect of sigwait() on the signal actions
|
||||
* for the signals in set is unspecified.
|
||||
* for the signals in set is unspecified.
|
||||
*
|
||||
* If more than one thread is using sigwait() to wait for the same
|
||||
* signal, no more than one of these threads will return from sigwait()
|
||||
* with the signal number. Which thread returns from sigwait() if more
|
||||
* than a single thread is waiting is unspecified.
|
||||
* than a single thread is waiting is unspecified.
|
||||
*
|
||||
* Should any of the multiple pending signals in the range SIGRTMIN to
|
||||
* SIGRTMAX be selected, it shall be the lowest numbered one. The selection
|
||||
* order between realtime and non-realtime signals, or between multiple
|
||||
* pending non-realtime signals, is unspecified.
|
||||
* pending non-realtime signals, is unspecified.
|
||||
*
|
||||
* Input Parameters:
|
||||
* set - The set of pending signals to wait for
|
||||
|
|
@ -81,7 +81,7 @@
|
|||
* Returned Value:
|
||||
* Upon successful completion, sigwait() stores the signal number of the
|
||||
* received signal at the location referenced by sig and returns zero.
|
||||
* Otherwise, an error number is returned to indicate the error.
|
||||
* Otherwise, an error number is returned to indicate the error.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
|
|
|
|||
|
|
@ -63,7 +63,7 @@
|
|||
* values used for name.
|
||||
*
|
||||
* Variable Value of Name
|
||||
*
|
||||
*
|
||||
* {AIO_LISTIO_MAX} _SC_AIO_LISTIO_MAX
|
||||
* {AIO_MAX} _SC_AIO_MAX
|
||||
* {AIO_PRIO_DELTA_MAX} _SC_AIO_PRIO_DELTA_MAX
|
||||
|
|
|
|||
|
|
@ -60,7 +60,7 @@
|
|||
*
|
||||
* Description:
|
||||
* Generic output conversion hook. Only needed for IEEE802.15.4 (and
|
||||
* other, non-standard packet radios) for now but this is a point where
|
||||
* other, non-standard packet radios) for now but this is a point where
|
||||
* support for other conversions may be provided.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
|
|
|||
|
|
@ -200,7 +200,7 @@ void net_freeroute_ipv6(FAR struct net_route_ipv6_s *route);
|
|||
* Name: (various low-level list operations)
|
||||
*
|
||||
* Description:
|
||||
* Perform operations on in-memory routing table lists
|
||||
* Perform operations on in-memory routing table lists
|
||||
*
|
||||
* Input Parameters:
|
||||
* entry - A pointer to the new entry to add to the list
|
||||
|
|
|
|||
|
|
@ -69,7 +69,7 @@
|
|||
*
|
||||
* Returned Value:
|
||||
* On success, sched_reporioritize() returns 0 (OK). On error, a negated
|
||||
* errno value is returned.
|
||||
* errno value is returned.
|
||||
*
|
||||
* EINVAL The parameter 'param' is invalid or does not make sense for the
|
||||
* current scheduling policy.
|
||||
|
|
|
|||
|
|
@ -388,7 +388,7 @@ FAR struct bt_conn_s *bt_conn_create_le(FAR const bt_addr_le_t *peer);
|
|||
* Input Parameters:
|
||||
* conn - The connection to send the command on.
|
||||
* rand, ediv - Values to use for the encryption key
|
||||
* ltk -
|
||||
* ltk -
|
||||
*
|
||||
* Returned Value:
|
||||
* Zero is returned on success; a negated errno value is returned on any
|
||||
|
|
|
|||
|
|
@ -10,21 +10,21 @@
|
|||
*
|
||||
* Copyright (c) 2016, Intel Corporation
|
||||
* All rights reserved.
|
||||
*
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
|
|
|
|||
|
|
@ -675,7 +675,7 @@ static int lo_addmac(FAR struct net_driver_s *dev, FAR const uint8_t *mac)
|
|||
{
|
||||
#if CONFIG_PKTRADIO_ADDRLEN == 1
|
||||
ninfo("MAC: %02x\n", mac[0]);
|
||||
|
||||
|
||||
#elif CONFIG_PKTRADIO_ADDRLEN == 2
|
||||
ninfo("MAC: %02x:%02x\n", mac[0], mac[1]);
|
||||
|
||||
|
|
@ -713,7 +713,7 @@ static int lo_rmmac(FAR struct net_driver_s *dev, FAR const uint8_t *mac)
|
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{
|
||||
#if CONFIG_PKTRADIO_ADDRLEN == 1
|
||||
ninfo("MAC: %02x\n", mac[0]);
|
||||
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||||
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||||
#elif CONFIG_PKTRADIO_ADDRLEN == 2
|
||||
ninfo("MAC: %02x:%02x\n", mac[0], mac[1]);
|
||||
|
||||
|
|
|
|||
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Reference in a new issue