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riscv: Add CSRs for Smcsrind/Sscsrind

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Add CSR registers for RISC-V Indirect CSR Access (Smcsrind/Sscsrind) Extension.

Refer to: https://github.com/riscvarchive/riscv-indirect-csr-access/tree/main

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
This commit is contained in:
Huang Qi 2024-06-14 18:22:30 +08:00 committed by Xiang Xiao
parent 38664cee78
commit 8ee461fa0e
1 changed files with 26 additions and 0 deletions
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26
arch/risc-v/include/csr.h
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@ -328,6 +328,32 @@
#define CSR_VTYPE 0xc21 /* Vector Data Type */
#define CSR_VLENB 0xc22 /* Vector Length in Bytes (VLEN/8) */
/* Indirect CSR Access CSRs */
#define CSR_MISELECT 0x350 /* Machine indirect register select */
#define CSR_MIREG 0x351 /* Machine indirect register alias */
#define CSR_MIREG2 0x352 /* Machine indirect register alias 2 */
#define CSR_MIREG3 0x353 /* Machine indirect register alias 3 */
#define CSR_MIREG4 0x355 /* Machine indirect register alias 4 */
#define CSR_MIREG5 0x356 /* Machine indirect register alias 5 */
#define CSR_MIREG6 0x357 /* Machine indirect register alias 6 */
#define CSR_SISELECT 0x150 /* Supervisor indirect register select */
#define CSR_SIREG 0x151 /* Supervisor indirect register alias */
#define CSR_SIREG2 0x152 /* Supervisor indirect register alias 2 */
#define CSR_SIREG3 0x153 /* Supervisor indirect register alias 3 */
#define CSR_SIREG4 0x155 /* Supervisor indirect register alias 4 */
#define CSR_SIREG5 0x156 /* Supervisor indirect register alias 5 */
#define CSR_SIREG6 0x157 /* Supervisor indirect register alias 6 */
#define CSR_VSISELECT 0x250 /* Virtual supervisor indirect register select */
#define CSR_VSIREG 0x251 /* Virtual supervisor indirect register alias */
#define CSR_VSIREG2 0x252 /* Virtual supervisor indirect register alias 2 */
#define CSR_VSIREG3 0x253 /* Virtual supervisor indirect register alias 3 */
#define CSR_VSIREG4 0x255 /* Virtual supervisor indirect register alias 4 */
#define CSR_VSIREG5 0x256 /* Virtual supervisor indirect register alias 5 */
#define CSR_VSIREG6 0x257 /* Virtual supervisor indirect register alias 6 */
/* In mstatus register */
#define MSTATUS_UIE (0x1 << 0) /* User Interrupt Enable */