From 91511ae28065e22c741b1f9936300ff332e97d0f Mon Sep 17 00:00:00 2001
From: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
Date: Mon, 6 Jan 2025 11:33:54 -0300
Subject: [PATCH] boards/xtensa: merge MCUBoot and Simple Boot linker scripts
 on ESP32|S2

---
 ...ple_boot_sections.ld => esp32_sections.ld} | 55 +++++++++++++--
 ...e_boot_sections.ld => esp32s2_sections.ld} | 69 +++++++++++++++----
 2 files changed, 105 insertions(+), 19 deletions(-)
 rename boards/xtensa/esp32/common/scripts/{simple_boot_sections.ld => esp32_sections.ld} (93%)
 rename boards/xtensa/esp32s2/common/scripts/{simple_boot_sections.ld => esp32s2_sections.ld} (89%)

diff --git a/boards/xtensa/esp32/common/scripts/simple_boot_sections.ld b/boards/xtensa/esp32/common/scripts/esp32_sections.ld
similarity index 93%
rename from boards/xtensa/esp32/common/scripts/simple_boot_sections.ld
rename to boards/xtensa/esp32/common/scripts/esp32_sections.ld
index e655920dfc..3dc66d776f 100644
--- a/boards/xtensa/esp32/common/scripts/simple_boot_sections.ld
+++ b/boards/xtensa/esp32/common/scripts/esp32_sections.ld
@@ -28,6 +28,39 @@ ENTRY(__start);
 
 SECTIONS
 {
+#ifdef CONFIG_ESP32_APP_FORMAT_MCUBOOT
+  .metadata :
+  {
+    /* Magic for load header */
+
+    LONG(0xace637d3)
+
+    /* Application entry point address */
+
+    KEEP(*(.entry_addr))
+
+    /* IRAM metadata:
+     * - Destination address (VMA) for IRAM region
+     * - Flash offset (LMA) for start of IRAM region
+     * - Size of IRAM region
+     */
+
+    LONG(ADDR(.iram0.vectors))
+    LONG(LOADADDR(.iram0.vectors))
+    LONG(LOADADDR(.iram0.text) + SIZEOF(.iram0.text) - LOADADDR(.iram0.vectors))
+
+    /* DRAM metadata:
+     * - Destination address (VMA) for DRAM region
+     * - Flash offset (LMA) for start of DRAM region
+     * - Size of DRAM region
+     */
+
+    LONG(ADDR(.dram0.data))
+    LONG(LOADADDR(.dram0.data))
+    LONG(SIZEOF(.dram0.data))
+  } >metadata
+#endif
+
   /* Send .iram0 code to iram */
 
   .iram0.vectors :
@@ -396,20 +429,28 @@ SECTIONS
    * be equal.
    */
 
+#ifndef CONFIG_ESP32_APP_FORMAT_MCUBOOT
   .flash.rodata_dummy (NOLOAD) :
   {
     . = ALIGN(0x10000);
   } > ROM
+#endif
 
-  .flash.rodata :
+  .flash.rodata : ALIGN(0x10000)
   {
     _rodata_reserved_start = ABSOLUTE(.);
     . = ALIGN(4);
     _srodata = ABSOLUTE(.);
-    *(EXCLUDE_FILE (*libarch.a:esp32_spiflash.* *libarch.a:esp32_spicache.*
-                    *libarch.a:esp_loader.* esp32_start.*) .rodata)
-    *(EXCLUDE_FILE (*libarch.a:esp32_spiflash.* *libarch.a:esp32_spicache.*
-                    *libarch.a:esp_loader.* esp32_start.*) .rodata.*)
+    *(EXCLUDE_FILE (*libarch.a:esp32_spiflash.* esp32_start.*
+                    *libarch.a:*esp_loader.*
+                    *libarch.a:*uart_hal.*
+                    *libarch.a:*mmu_hal.*
+                    ) .rodata)
+    *(EXCLUDE_FILE (*libarch.a:esp32_spiflash.* esp32_start.*
+                    *libarch.a:*esp_loader.*
+                    *libarch.a:*uart_hal.*
+                    *libarch.a:*mmu_hal.*
+                    ) .rodata.*)
     *(.srodata.*)
     *(.rodata)
     *(.rodata.*)
@@ -504,13 +545,15 @@ SECTIONS
    * be equal.
    */
 
+#ifndef CONFIG_ESP32_APP_FORMAT_MCUBOOT
   .flash.text_dummy (NOLOAD) :
   {
     . += SIZEOF(.flash.rodata);
     . = ALIGN(0x10000);
   } >default_code_seg AT> ROM
+#endif
 
-  .flash.text :
+  .flash.text : ALIGN(0x00010000)
   {
     _stext = .;
     _text_start = ABSOLUTE(.);
diff --git a/boards/xtensa/esp32s2/common/scripts/simple_boot_sections.ld b/boards/xtensa/esp32s2/common/scripts/esp32s2_sections.ld
similarity index 89%
rename from boards/xtensa/esp32s2/common/scripts/simple_boot_sections.ld
rename to boards/xtensa/esp32s2/common/scripts/esp32s2_sections.ld
index 5954180538..8e995abba3 100644
--- a/boards/xtensa/esp32s2/common/scripts/simple_boot_sections.ld
+++ b/boards/xtensa/esp32s2/common/scripts/esp32s2_sections.ld
@@ -1,5 +1,5 @@
 /****************************************************************************
- * boards/xtensa/esp32s2/common/scripts/simple_boot_sections.ld
+ * boards/xtensa/esp32s2/common/scripts/esp32s2_sections.ld
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -28,6 +28,39 @@ ENTRY(__start);
 
 SECTIONS
 {
+#ifdef CONFIG_ESP32S2_APP_FORMAT_MCUBOOT
+  .metadata :
+  {
+    /* Magic for load header */
+
+    LONG(0xace637d3)
+
+    /* Application entry point address */
+
+    KEEP(*(.entry_addr))
+
+    /* IRAM metadata:
+     * - Destination address (VMA) for IRAM region
+     * - Flash offset (LMA) for start of IRAM region
+     * - Size of IRAM region
+     */
+
+    LONG(ADDR(.iram0.vectors))
+    LONG(LOADADDR(.iram0.vectors))
+    LONG(LOADADDR(.iram0.text) + SIZEOF(.iram0.text) - LOADADDR(.iram0.vectors))
+
+    /* DRAM metadata:
+     * - Destination address (VMA) for DRAM region
+     * - Flash offset (LMA) for start of DRAM region
+     * - Size of DRAM region
+     */
+
+    LONG(ADDR(.dram0.data))
+    LONG(LOADADDR(.dram0.data))
+    LONG(SIZEOF(.dram0.data))
+  } >metadata
+#endif
+
   /* Send .iram0 code to iram */
 
   .iram0.vectors : ALIGN(4)
@@ -80,6 +113,7 @@ SECTIONS
     esp32s2_region.*(.text .text.* .literal .literal.*)
 
     *libarch.a:*esp_loader.*(.literal .text .literal.* .text.*)
+    *libarch.a:esp32s2_spiflash.*(.literal .text .literal.* .text.*)
     *libarch.a:*brownout_hal.*(.text .text.* .literal .literal.*)
     *libarch.a:*cpu.*(.text .text.* .literal .literal.*)
     *libarch.a:*gpio_hal.*(.text .text.* .literal .literal.*)
@@ -231,6 +265,7 @@ SECTIONS
     esp32s2_region.*(.rodata .rodata.*)
 
     *libarch.a:*esp_loader.*(.rodata .rodata.*)
+    *libarch.a:esp32s2_spiflash.*(.rodata .rodata.*)
     *libarch.a:*brownout.*(.rodata .rodata.*)
     *libarch.a:*cpu.*(.rodata .rodata.*)
     *libarch.a:*gpio_hal.*(.rodata .rodata.*)
@@ -313,17 +348,20 @@ SECTIONS
     . = ALIGN(0x10000);
   } > ROM
 
-  .flash.rodata :
+  .flash.rodata : ALIGN(0x10000)
   {
     _rodata_reserved_start = ABSOLUTE(.);
-
     _srodata = ABSOLUTE(.);
-    *(EXCLUDE_FILE (esp32s2_start.*) .rodata)
-    *(EXCLUDE_FILE (esp32s2_start.*) .rodata.*)
-
-    *(.srodata.*)
-    *(.rodata)
-    *(.rodata.*)
+    *(EXCLUDE_FILE (esp32s2_start.* esp32s2_region.*
+                    *libarch.a:*esp_loader.*
+                    *libarch.a:esp32s2_spiflash.*
+                    *libarch.a:*cache_hal.* *libarch.a:*mmu_hal.*
+                    *libarch.a:*mpu_hal.*) .rodata)
+    *(EXCLUDE_FILE (esp32s2_start.* esp32s2_region.*
+                    *libarch.a:*esp_loader.*
+                    *libarch.a:esp32s2_spiflash.*
+                    *libarch.a:*cache_hal.* *libarch.a:*mmu_hal.*
+                    *libarch.a:*mpu_hal.*) .rodata.*)
 
 #ifdef CONFIG_ESPRESSIF_WIRELESS
     *(.rodata_wlog_verbose.*)
@@ -376,11 +414,11 @@ SECTIONS
     *(.lit4.*)
     *(.gnu.linkonce.lit4.*)
     _lit4_end = ABSOLUTE(.);
+
     /* TLS data. */
 
     . = ALIGN(4);
     _thread_local_start = ABSOLUTE(.);
-
     _stdata = ABSOLUTE(.);
     *(.tdata .tdata.* .gnu.linkonce.td.*);
     _etdata = ABSOLUTE(.);
@@ -389,9 +427,8 @@ SECTIONS
     _etbss = ABSOLUTE(.);
 
     _thread_local_end = ABSOLUTE(.);
-
     _rodata_reserved_end = ABSOLUTE(.);
-  } >default_rodata_seg AT>ROM
+  } >drom0_0_seg AT>ROM
   _rodata_reserved_align = ALIGNOF(.flash.rodata);
 
   _image_irom_vma = ADDR(.flash.text);
@@ -409,13 +446,19 @@ SECTIONS
    * be equal.
    */
 
+#ifndef CONFIG_ESP32S2_RUN_IRAM
   .flash.text_dummy (NOLOAD) :
   {
+    /* This section is required to skip .flash.rodata area because irom0_0_seg
+     * and drom0_0_seg reflect the same address space on different buses.
+     */
+
     . += SIZEOF(.flash.rodata);
     . = ALIGN(0x10000);
   } >default_code_seg AT> ROM
+#endif
 
-  .flash.text :
+  .flash.text : ALIGN(0x00010000)
   {
     _stext = .;