Squashed commit of the following:
Update some comments drivers/usbhost/usbhost_max3421e.c: Fix issue with uninitialized data.
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903a4d866a
commit
a74246d14e
3 changed files with 56 additions and 28 deletions
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@ -1690,7 +1690,7 @@ static void spi_bus_initialize(FAR struct stm32_spidev_s *priv)
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* Mode 0: CR1.CPHA=0 and CR1.CPOL=0
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* Master: CR1.MSTR=1
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* 8-bit: CR2.DS=7
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* MSB tranmitted first: CR1.LSBFIRST=0
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* MSB transmitted first: CR1.LSBFIRST=0
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* Replace NSS with SSI & SSI=1: CR1.SSI=1 CR1.SSM=1 (prevents MODF error)
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* Two lines full duplex: CR1.BIDIMODE=0 CR1.BIDIOIE=(Don't care) and CR1.RXONLY=0
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*/
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@ -1708,7 +1708,7 @@ static void spi_bus_initialize(FAR struct stm32_spidev_s *priv)
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* Mode 0: CPHA=0 and CPOL=0
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* Master: MSTR=1
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* 8-bit: DFF=0
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* MSB tranmitted first: LSBFIRST=0
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* MSB transmitted first: LSBFIRST=0
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* Replace NSS with SSI & SSI=1: SSI=1 SSM=1 (prevents MODF error)
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* Two lines full duplex: BIDIMODE=0 BIDIOIE=(Don't care) and RXONLY=0
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*/
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@ -706,33 +706,35 @@ MAX3421E Integration
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Using SPI1on J8 pins 7-12, discretes on J18
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------ ----------- -----------
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NAME VIEWTOOL STM32
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------ ----------- -----------
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CS# J8 Pin 12 PA4/NSS1
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SCK J8 Pin 11 PA5/SCK1
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MISO J8 Pin 9 PA6/MISO1
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MOSI J8 Pin 10 PA7/MOSI1
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INT# J18 Pin 6 PC5
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RST# J18 Pin 8 PA1
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VBUS J18 Pin 10 PA0
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3.3V J8 Pin 7
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GND J8 Pin 8
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------ ----------- ----------- ------------------
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NAME VIEWTOOL STM32 USBHostShield-v13
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------ ----------- ----------- ------------------
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CS# J8 Pin 12 PA4/NSS1 D10
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SCK J8 Pin 11 PA5/SCK1 D13
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MISO J8 Pin 9 PA6/MISO1 D12
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MOSI J8 Pin 10 PA7/MOSI1 D11
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INT# J18 Pin 10 PA0 D9
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RST# J18 Pin 8 PA1 D7
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GPX D8
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VBUS J18 Pin 2 5V VIN
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3.3V J8 Pin 7 N/C
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GND J8 Pin 8 GND
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Using SPI2 on J8 pins 1-6, discretes on J18
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------ ----------- -----------
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NAME VIEWTOOL STM32
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------ ----------- -----------
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CS# J8 Pin 6 PB12/NSS2
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SCK J8 Pin 5 PB13/SCK2
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MISO J8 Pin 3 PB14/MISO2
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MOSI J8 Pin 4 PB15/MOSI2
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INT# J18 Pin 6 PC5
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RST# J18 Pin 8 PA1
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VBUS J18 Pin 10 PA0
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3.3V J8 Pin 1
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GND J8 Pin 2
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------ ----------- ----------- ------------------
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NAME VIEWTOOL STM32 USBHostShield-v13
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------ ----------- ----------- ------------------
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CS# J8 Pin 6 PB12/NSS2 D10
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SCK J8 Pin 5 PB13/SCK2 D13
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MISO J8 Pin 3 PB14/MISO2 D12
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MOSI J8 Pin 4 PB15/MOSI2 D11
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INT# J18 Pin 10 PA0 D9
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RST# J18 Pin 8 PA1 D7
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GPX D8
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VBUS J18 Pin 2 5V VIN
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3.3V J8 Pin 1 N/C
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GND J8 Pin 2 GND
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5V VBUS power is also needed. This might be directly connected to the USB
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host connector (as assumed here), or switched via additional logic. Then
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@ -752,6 +754,15 @@ MAX3421E Integration
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CONFIG_USBHOST_MAX3421E=y # MAX3421E support
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CONFIG_USBHOST_MSC=y # USB MSC class
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Using SPI1:
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CONFIG_VIEWTOOL_MAX3421E_SPI1=y
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CONFIG_VIEWTOOL_MAX3421E_FREQUENCY=20000000
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CONFIG_VIEWTOOL_MAX3421E_RST=y
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# CONFIG_VIEWTOOL_MAX3421E_PWR is not set
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CONFIG_VIEWTOOL_MAX3421E_CONNMON_STACKSIZE=2048
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CONFIG_VIEWTOOL_MAX3421E_CONNMON_PRIORITY=100
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Settings not listed above can be left at their default values.
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Toolchains
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@ -4598,12 +4598,25 @@ static inline int max3421e_hw_initialize(FAR struct max3421e_usbhost_s *priv)
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max3421e_lock(priv);
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/* NOTE: Initially, the MAX3421E operations in half-duplex mode. MISO is
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* tristated and there is no status response to commands. Writes are not
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* effected: The MISO pin continues to be high impedance and the master
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* continues to drive MOSI.
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*
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* For reads, however, after the 8-bit command, the max3421e starts driving
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* the MOSI pin. The master must turn off its driver to the MOSI pin to
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* avoid contention.
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*/
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/* Reset the MAX3421E by toggling the CHIPRES bit in the USBCTRL register. */
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max3421e_putreg(priv, MAX3421E_USBHOST_USBCTL, USBHOST_USBCTL_CHIPRES);
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max3421e_putreg(priv, MAX3421E_USBHOST_USBCTL, 0);
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/* Wait for the oscillator to become stable */
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/* Wait for the oscillator to become stable
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*
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* REVISIT: This can't work in half duplex mode!
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*/
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while ((max3421e_getreg(priv, MAX3421E_USBHOST_USBIRQ) &
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USBHOST_USBIRQ_OSCOKIRQ) == 0)
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@ -4612,6 +4625,8 @@ static inline int max3421e_hw_initialize(FAR struct max3421e_usbhost_s *priv)
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/* Disable interrupts, clear pending interrupts, and reset the interrupt
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* state
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*
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* REVISIT: modifyreg() will not work correctly in half duplex mode.
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*/
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max3421e_modifyreg(priv, MAX3421E_USBHOST_CPUCTL, USBHOST_CPUCTL_IE, 0);
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@ -4629,6 +4644,8 @@ static inline int max3421e_hw_initialize(FAR struct max3421e_usbhost_s *priv)
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regval |= USBHOST_PINCTL_FDUPSPI;
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max3421e_putreg(priv, MAX3421E_USBHOST_PINCTL, regval);
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/* Beyond this point the SPI is operating in full duplex */
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/* Configure as full-speed USB host */
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max3421e_modifyreg(priv, MAX3421E_USBHOST_MODE,
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@ -4711,7 +4728,7 @@ max3421e_usbhost_initialize(FAR const struct max3421e_lowerhalf_s *lower)
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/* Allocate and instance of the MAX4321E state structure */
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alloc = (FAR struct usbhost_alloc_s *)
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kmm_malloc(sizeof(struct usbhost_alloc_s));
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kmm_zalloc(sizeof(struct usbhost_alloc_s));
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if (alloc < 0)
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{
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