Misoc/LM32: Changes to get a clean compilation after initial review and commit
This commit is contained in:
Ramtin Amin
Gregory Nutt
parent
19f5a5f49d
commit
b5a94e255a
11 changed files with 259 additions and 89 deletions
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@ -62,11 +62,11 @@ config MISOC_UART_TX_BUF_SIZE
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---help---
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Size of TX buffers for MISOC UARTs
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ifdef ARCH_CHIP_LM32
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if ARCH_CHIP_LM32
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source arch/misoc/src/lm32/Kconfig
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endif
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ifdef ARCH_CHIP_MOR1K
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source arch/misoc/src/mor1k/Kconfig
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if ARCH_CHIP_MOR1K
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#source arch/misoc/src/mor1k/Kconfig
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endif
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endif # ARCH_MISOC
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245
arch/misoc/include/inttypes.h
Normal file
245
arch/misoc/include/inttypes.h
Normal file
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@ -0,0 +1,245 @@
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/****************************************************************************
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* arch/misoc/include/inttypes.h
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*
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* Copyright (C) 2016 Omni Hoverboards Inc. All rights reserved.
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* Author: Paul Alexander Patience <paul-a.patience@polymtl.ca>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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#ifndef __ARCH_MISOC_INCLUDE_INTTYPES_H
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#define __ARCH_MISOC_INCLUDE_INTTYPES_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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#define PRId8 "d"
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#define PRId16 "d"
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#define PRId32 "d"
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#define PRId64 "lld"
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#define PRIdLEAST8 "d"
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#define PRIdLEAST16 "d"
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#define PRIdLEAST32 "d"
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#define PRIdLEAST64 "lld"
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#define PRIdFAST8 "d"
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#define PRIdFAST16 "d"
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#define PRIdFAST32 "d"
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#define PRIdFAST64 "lld"
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#define PRIdMAX "lld"
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#define PRIdPTR "d"
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#define PRIi8 "i"
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#define PRIi16 "i"
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#define PRIi32 "i"
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#define PRIi64 "lli"
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#define PRIiLEAST8 "i"
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#define PRIiLEAST16 "i"
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#define PRIiLEAST32 "i"
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#define PRIiLEAST64 "lli"
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#define PRIiFAST8 "i"
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#define PRIiFAST16 "i"
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#define PRIiFAST32 "i"
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#define PRIiFAST64 "lli"
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#define PRIiMAX "lli"
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#define PRIiPTR "i"
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#define PRIo8 "o"
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#define PRIo16 "o"
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#define PRIo32 "o"
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#define PRIo64 "llo"
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#define PRIoLEAST8 "o"
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#define PRIoLEAST16 "o"
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#define PRIoLEAST32 "o"
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#define PRIoLEAST64 "llo"
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#define PRIoFAST8 "o"
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#define PRIoFAST16 "o"
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#define PRIoFAST32 "o"
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#define PRIoFAST64 "llo"
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#define PRIoMAX "llo"
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#define PRIoPTR "o"
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#define PRIu8 "u"
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#define PRIu16 "u"
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#define PRIu32 "u"
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#define PRIu64 "llu"
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#define PRIuLEAST8 "u"
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#define PRIuLEAST16 "u"
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#define PRIuLEAST32 "u"
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#define PRIuLEAST64 "llu"
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#define PRIuFAST8 "u"
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#define PRIuFAST16 "u"
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#define PRIuFAST32 "u"
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#define PRIuFAST64 "llu"
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#define PRIuMAX "llu"
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#define PRIuPTR "u"
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#define PRIx8 "x"
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#define PRIx16 "x"
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#define PRIx32 "x"
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#define PRIx64 "llx"
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#define PRIxLEAST8 "x"
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#define PRIxLEAST16 "x"
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#define PRIxLEAST32 "x"
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#define PRIxLEAST64 "llx"
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#define PRIxFAST8 "x"
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#define PRIxFAST16 "x"
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#define PRIxFAST32 "x"
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#define PRIxFAST64 "llx"
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#define PRIxMAX "llx"
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#define PRIxPTR "x"
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#define PRIX8 "X"
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#define PRIX16 "X"
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#define PRIX32 "X"
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#define PRIX64 "llX"
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#define PRIXLEAST8 "X"
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#define PRIXLEAST16 "X"
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#define PRIXLEAST32 "X"
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#define PRIXLEAST64 "llX"
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#define PRIXFAST8 "X"
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#define PRIXFAST16 "X"
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#define PRIXFAST32 "X"
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#define PRIXFAST64 "llX"
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#define PRIXMAX "llX"
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#define PRIXPTR "X"
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#define SCNd8 "hhd"
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#define SCNd16 "hd"
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#define SCNd32 "d"
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#define SCNd64 "lld"
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#define SCNdLEAST8 "hhd"
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#define SCNdLEAST16 "hd"
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#define SCNdLEAST32 "d"
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#define SCNdLEAST64 "lld"
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#define SCNdFAST8 "hhd"
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#define SCNdFAST16 "hd"
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#define SCNdFAST32 "d"
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#define SCNdFAST64 "lld"
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#define SCNdMAX "lld"
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#define SCNdPTR "d"
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#define SCNi8 "hhi"
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#define SCNi16 "hi"
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#define SCNi32 "i"
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#define SCNi64 "lli"
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#define SCNiLEAST8 "hhi"
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#define SCNiLEAST16 "hi"
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#define SCNiLEAST32 "i"
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#define SCNiLEAST64 "lli"
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#define SCNiFAST8 "hhi"
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#define SCNiFAST16 "hi"
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#define SCNiFAST32 "i"
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#define SCNiFAST64 "lli"
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#define SCNiMAX "lli"
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#define SCNiPTR "i"
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#define SCNo8 "hho"
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#define SCNo16 "ho"
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#define SCNo32 "o"
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#define SCNo64 "llo"
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#define SCNoLEAST8 "hho"
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#define SCNoLEAST16 "ho"
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#define SCNoLEAST32 "o"
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#define SCNoLEAST64 "llo"
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#define SCNoFAST8 "hho"
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#define SCNoFAST16 "ho"
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#define SCNoFAST32 "o"
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#define SCNoFAST64 "llo"
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#define SCNoMAX "llo"
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#define SCNoPTR "o"
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#define SCNu8 "hhu"
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#define SCNu16 "hu"
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#define SCNu32 "u"
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#define SCNu64 "llu"
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#define SCNuLEAST8 "hhu"
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#define SCNuLEAST16 "hu"
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#define SCNuLEAST32 "u"
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#define SCNuLEAST64 "llu"
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#define SCNuFAST8 "hhu"
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#define SCNuFAST16 "hu"
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#define SCNuFAST32 "u"
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#define SCNuFAST64 "llu"
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#define SCNuMAX "llu"
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#define SCNuPTR "u"
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#define SCNx8 "hhx"
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#define SCNx16 "hx"
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#define SCNx32 "x"
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#define SCNx64 "llx"
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#define SCNxLEAST8 "hhx"
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#define SCNxLEAST16 "hx"
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#define SCNxLEAST32 "x"
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#define SCNxLEAST64 "llx"
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#define SCNxFAST8 "hhx"
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#define SCNxFAST16 "hx"
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#define SCNxFAST32 "x"
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#define SCNxFAST64 "llx"
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#define SCNxMAX "llx"
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#define SCNxPTR "x"
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#endif /* __ARCH_MISOC_INCLUDE_INTTYPES_H */
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@ -3,7 +3,6 @@
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#
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# Copyright (C) 2016 Gregory Nutt. All rights reserved.
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# Author: Gregory Nutt <gnutt@nuttx.org>
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# Ramtin Amin <keytwo@gmail.com>
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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@ -139,9 +138,8 @@ board/libboard$(LIBEXT):
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$(Q) $(MAKE) -C board TOPDIR="$(TOPDIR)" libboard$(LIBEXT) EXTRADEFINES=$(EXTRADEFINES)
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nuttx$(EXEEXT): $(HEAD_OBJ) board/libboard$(LIBEXT)
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@echo "LD: nuttx toto $(LIBGCC)"
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$(Q) $(LD) --entry=__start $(LDFLAGS) $(LIBPATHS) -o $(NUTTX) $(HEAD_OBJ) $(EXTRA_OBJS) \
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$(LDSTARTGROUP) $(LDLIBS) $(EXTRA_LIBS) $(LDENDGROUP)
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$(LDSTARTGROUP) $(LDLIBS) $(EXTRA_LIBS) $(LIBGCC) $(LDENDGROUP)
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ifneq ($(CONFIG_WINDOWS_NATIVE),y)
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$(Q) $(NM) $(NUTTX) | \
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grep -v '\(compiled\)\|\(\$(OBJEXT)$$\)\|\( [aUw] \)\|\(\.\.ng$$\)\|\(LASH[RL]DI\)' | \
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@ -39,11 +39,11 @@ HEAD_ASRC = lm32_vectors.S
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CMN_ASRCS =
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CMN_CSRCS = misoc_uart.c
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CHIP_ASRCS = lm32_start.S lm32_syscall.S
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CHIP_ASRCS = lm32_syscall.S
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CHIP_CSRCS = lm32_allocateheap.c lm32_assert.c lm32_blocktask.c
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CHIP_CSRCS += lm32_copystate.c lm32_createstack.c lm32_doirq.c lm32_dumpstate.c
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CHIP_CSRCS += lm32_dumpstate.c lm32_exit.c lm32_idle.c lm32_initialize.c
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CHIP_CSRCS += lm32_initialstate.c lm32_interruptcontext.c lm32_irq.c
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CHIP_CSRCS += lm32_isr.c lm32_releasepending.c lm32_releasestack.c
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CHIP_CSRCS += lm32_releasepending.c lm32_releasestack.c
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CHIP_CSRCS += lm32_stackframe.c lm32_swint.c lm32_unblocktask.c
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@ -92,7 +92,4 @@ static inline unsigned int irq_pending(void)
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* Public Function Prototypes
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****************************************************************************/
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void uart_isr(void);
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void isr(void);
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#endif /* __ARCH_MISOC_SRC_LM32_CHIP_H */
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@ -147,7 +147,7 @@ void lm32_timer_initialize(void);
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/* Software interrupts ******************************************************/
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uint32_t lm32_swint(int irq, FAR void *context);
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uint32_t *lm32_swint(int irq, FAR void *context);
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/* Signal handling **********************************************************/
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@ -46,7 +46,7 @@
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#include <nuttx/arch.h>
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#include <arch/irq.h>
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#include "chip_irqasm.h"
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#include "chip.h"
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#include "lm32.h"
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/****************************************************************************
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@ -1,61 +0,0 @@
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/****************************************************************************
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* arch/misoc/src/lm32/lm32_isr.c
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*
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* Copyright (C) 2016 Gregory Nutt. All rights reserved.
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* Author: Ramtin Amin <keytwo@gmail.com>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
|
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <arch/board/generated/csr.h>
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#include "chip_irqasm.h"
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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void uart_isr()
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{
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}
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void isr(void)
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{
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unsigned int irqs;
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irqs = irq_pending() & irq_getmask();
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if (irqs & (1 << UART_INTERRUPT))
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{
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uart_isr();
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}
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}
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@ -130,7 +130,7 @@ static void dispatch_syscall(void)
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*
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****************************************************************************/
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uint32_t lm32_swint(int irq, FAR void *context)
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uint32_t *lm32_swint(int irq, FAR void *context)
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{
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uint32_t *regs = (uint32_t *)context;
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@ -36,23 +36,14 @@
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OUTPUT_FORMAT("elf32-lm32")
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ENTRY(_stext)
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/*INCLUDE configs/misoc/include/generated/regions.ld*/
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MEMORY
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{
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rom : ORIGIN = 0x00000000, LENGTH = 0x00008000
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sram : ORIGIN = 0x10000000, LENGTH = 0x00004000
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main_ram : ORIGIN = 0x40000000, LENGTH = 0x00080000
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rom : ORIGIN = 0x00000000, LENGTH = 0x00008000
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sram : ORIGIN = 0x10000000, LENGTH = 0x00004000
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main_ram : ORIGIN = 0x40000000, LENGTH = 0x00080000
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}
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/*
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MEMORY
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{
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flash (rxai!w) : ORIGIN = 0x80002000, LENGTH = 256K - 8K
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intram (wxa!ri) : ORIGIN = 0x00000004, LENGTH = 32K
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userpage : ORIGIN = 0x80800000, LENGTH = 512
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factorypage : ORIGIN = 0x80800200, LENGTH = 512
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}
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*/
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SECTIONS
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{
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.text : {
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@ -37,6 +37,6 @@
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-include $(TOPDIR)/Make.defs
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ASRCS =
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CSRCS = atmega_boot.c
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CSRCS = lm32_boot.c
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include $(TOPDIR)/configs/Board.mk
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