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armv8-r/cp15: fix the problem of op1 operand confusion in ICC_SGI1R

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Reference:

https://developer.arm.com/documentation/100026/0103/Generic-Interrupt-Controller/GIC-programmers-model/CPU-Interface-Registers

              CRn   Op1    CRm    Op2
    ICC_SGI0R  -     2     c12     -
    ICC_SGI1R  -     0     c12     -

Signed-off-by: fanjiangang <fanjiangang@lixiang.com>
Signed-off-by: chao an <anchao@lixiang.com>
This commit is contained in:
fanjiangang 2024-10-16 14:28:30 +08:00 committed by GUIDINGLI
parent 72e7935431
commit b6a4e91ef0
1 changed files with 1 additions and 1 deletions
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arch/arm/include/armv8-r/cp15.h
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@ -173,7 +173,7 @@
#define CP15_ICC_SRE(r) _CP15(0, r, c12, c12, 5) /* ICC_SRE */
#define CP15_ICC_HSRE(r) _CP15(4, r, c12, c9, 5) /* ICC_HSRE */
#define CP15_ICC_IGRPEN1(r) _CP15(0, r, c12, c12, 7) /* ICC_IGRPEN1 */
#define CP15_ICC_SGI1R(lo,hi) _CP15_64(2, lo, hi, c12) /* ICC_SGI1R */
#define CP15_ICC_SGI1R(lo,hi) _CP15_64(0, lo, hi, c12) /* ICC_SGI1R */
#define CP15_SET(reg, value) \
do \