boards/stm32f7: add intial support for ST steval-eth001v1 board

2022-07-19 20:57:07 +02:00 · 2022-07-19 20:57:07 +02:00 · d933a227af
commit d933a227af
parent 2b0e28e492
12 changed files with 789 additions and 0 deletions
--- a/boards/Kconfig
+++ b/boards/Kconfig
@ -2032,6 +2032,13 @@ config ARCH_BOARD_STM32F769I_DISCO
 		MCU. The STM32F769NIH6 is a 216MHz Cortex-M7 with 2048Kb Flash
 		memory and 512Kb SRAM.

+config ARCH_BOARD_STEVAL_ETH001V1
+	bool "STMicro STEVAL-ETH001V1 board"
+	depends on ARCH_CHIP_STM32F767ZI
+	---help---
+		The STMicro STEVAL-ETH001V1 servo drive evaluation board featuring
+		the STM32F767ZI MCU.
+
 config ARCH_BOARD_STM32H747I_DISCO
 	bool "STMicro STM32H747I-DISCO board"
 	depends on ARCH_CHIP_STM32H747XI
@ -2734,6 +2741,7 @@ config ARCH_BOARD
 	default "stm32f429i-disco"         if ARCH_BOARD_STM32F429I_DISCO
 	default "stm32f746g-disco"         if ARCH_BOARD_STM32F746G_DISCO
 	default "stm32f769i-disco"         if ARCH_BOARD_STM32F769I_DISCO
+	default "steval-eth001v1"          if ARCH_BOARD_STEVAL_ETH001V1
 	default "stm32h747i-disco"         if ARCH_BOARD_STM32H747I_DISCO
 	default "stm32f746-ws"             if ARCH_BOARD_STM32F746_WS
 	default "b-g474e-dpow1"            if ARCH_BOARD_B_G474E_DPOW1
@ -3155,6 +3163,9 @@ endif
 if ARCH_BOARD_STM32F769I_DISCO
 source "boards/arm/stm32f7/stm32f769i-disco/Kconfig"
 endif
+if ARCH_BOARD_STEVAL_ETH001V1
+source "boards/arm/stm32f7/steval-eth001v1/Kconfig"
+endif
 if ARCH_BOARD_STM32H747I_DISCO
 source "boards/arm/stm32h7/stm32h747i-disco/Kconfig"
 endif
--- a/boards/arm/stm32f7/steval-eth001v1/Kconfig
+++ b/boards/arm/stm32f7/steval-eth001v1/Kconfig
@ -0,0 +1,8 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#
+
+if ARCH_BOARD_STEVAL_ETH001V1
+
+endif # ARCH_BOARD_STEVAL_ETH001V1
--- a/boards/arm/stm32f7/steval-eth001v1/README.txt
+++ b/boards/arm/stm32f7/steval-eth001v1/README.txt
@ -0,0 +1,18 @@
+README
+======
+
+  This README discusses issues unique to NuttX configurations for the
+  STMicro STEVAL-ETH001V1 servo drive evaluation board.
+  The STEVAL-ETH001V1 board is based on the STM32F767ZI MCU (2Mbytes FLASH
+  and 512Kbytes of SRAM).
+
+  The boards features:
+
+    - Three-phase motor driver inverter based on STDRIVE101 gate driver and
+      STH270N8F7-2 power MOSFET
+    - NETX90 network controller
+    - Operating supply voltage up to 48 V with a max. overvoltage robustness
+      of 60 V
+    - Motor brake dissipative energy circuit
+    - Digital actuation section for industrial loads
+    - RS485 interface for digital encoder and host interface
--- a/boards/arm/stm32f7/steval-eth001v1/configs/nsh/defconfig
+++ b/boards/arm/stm32f7/steval-eth001v1/configs/nsh/defconfig
@ -0,0 +1,45 @@
+#
+# This file is autogenerated: PLEASE DO NOT EDIT IT.
+#
+# You can use "make menuconfig" to make any modifications to the installed .config file.
+# You can then do "make savedefconfig" to generate a new defconfig file that includes your
+# modifications.
+#
+# CONFIG_ARCH_FPU is not set
+# CONFIG_NSH_DISABLE_IFCONFIG is not set
+# CONFIG_NSH_DISABLE_PS is not set
+CONFIG_ARCH="arm"
+CONFIG_ARCH_BOARD="steval-eth001v1"
+CONFIG_ARCH_BOARD_STEVAL_ETH001V1=y
+CONFIG_ARCH_CHIP="stm32f7"
+CONFIG_ARCH_CHIP_STM32F767ZI=y
+CONFIG_ARCH_CHIP_STM32F7=y
+CONFIG_ARCH_STACKDUMP=y
+CONFIG_ARMV7M_DCACHE=y
+CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y
+CONFIG_ARMV7M_DTCM=y
+CONFIG_ARMV7M_ICACHE=y
+CONFIG_BOARD_LOOPSPERMSEC=43103
+CONFIG_BUILTIN=y
+CONFIG_HAVE_CXX=y
+CONFIG_HAVE_CXXINITIALIZE=y
+CONFIG_INIT_ENTRYPOINT="nsh_main"
+CONFIG_INTELHEX_BINARY=y
+CONFIG_MM_REGIONS=3
+CONFIG_NSH_BUILTIN_APPS=y
+CONFIG_NSH_FILEIOSIZE=512
+CONFIG_NSH_LINELEN=64
+CONFIG_NSH_READLINE=y
+CONFIG_PREALLOC_TIMERS=4
+CONFIG_RAM_SIZE=524288
+CONFIG_RAM_START=0x20010000
+CONFIG_RAW_BINARY=y
+CONFIG_RR_INTERVAL=200
+CONFIG_SCHED_WAITPID=y
+CONFIG_START_DAY=6
+CONFIG_START_MONTH=12
+CONFIG_START_YEAR=2011
+CONFIG_STM32F7_USART3=y
+CONFIG_SYSTEM_NSH=y
+CONFIG_TASK_NAME_SIZE=0
+CONFIG_USART3_SERIAL_CONSOLE=y
--- a/boards/arm/stm32f7/steval-eth001v1/include/board.h
+++ b/boards/arm/stm32f7/steval-eth001v1/include/board.h
@ -0,0 +1,216 @@
+/****************************************************************************
+ * boards/arm/stm32f7/steval-eth001v1/include/board.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __BOARDS_ARM_STM32F7_STEVAL_ETH001V1_INCLUDE_BOARD_H
+#define __BOARDS_ARM_STM32F7_STEVAL_ETH001V1_INCLUDE_BOARD_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#ifndef __ASSEMBLY__
+# include <stdint.h>
+#endif
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Clocking */
+
+/* HSI: 16 MHz RC factory-trimmed
+ * LSI: 32 KHz RC
+ * HSE: On-board crystal frequency is 26MHz
+ * LSE: 32.768 kHz
+ */
+
+#define STM32_BOARD_XTAL        26000000ul
+
+#define STM32_HSI_FREQUENCY     16000000ul
+#define STM32_LSI_FREQUENCY     32000
+#define STM32_HSE_FREQUENCY     STM32_BOARD_XTAL
+#define STM32_LSE_FREQUENCY     32768
+
+/* Main PLL Configuration.
+ *
+ * PLL source is HSE = 26,000,000
+ *
+ * PLL_VCO = (STM32_HSE_FREQUENCY / PLLM) * PLLN
+ * Subject to:
+ *
+ *     2 <= PLLM <= 63
+ *   192 <= PLLN <= 432
+ *   192 MHz <= PLL_VCO <= 432MHz
+ *
+ * SYSCLK  = PLL_VCO / PLLP
+ * Subject to
+ *
+ *   PLLP = {2, 4, 6, 8}
+ *   SYSCLK <= 216 MHz
+ *
+ * USB OTG FS, SDMMC and RNG Clock = PLL_VCO / PLLQ
+ * Subject to
+ *   The USB OTG FS requires a 48 MHz clock to work correctly. The SDMMC
+ *   and the random number generator need a frequency lower than or equal
+ *   to 48 MHz to work correctly.
+ *
+ * 2 <= PLLQ <= 15
+ */
+
+/* Highest SYSCLK
+ *
+ * PLL_VCO = (26,000,000 / 26) * 432 = 432 MHz
+ * SYSCLK  = 432 MHz / 2 = 216 MHz
+ */
+
+#define STM32_PLLCFG_PLLM       RCC_PLLCFG_PLLM(26)
+#define STM32_PLLCFG_PLLN       RCC_PLLCFG_PLLN(432)
+#define STM32_PLLCFG_PLLP       RCC_PLLCFG_PLLP_2
+#define STM32_PLLCFG_PLLQ       RCC_PLLCFG_PLLQ(10)
+
+#define STM32_VCO_FREQUENCY     ((STM32_HSE_FREQUENCY / 26) * 432)
+#define STM32_SYSCLK_FREQUENCY  (STM32_VCO_FREQUENCY / 2)
+
+/* Configure Dedicated Clock Configuration Register */
+
+#define STM32_RCC_DCKCFGR1_PLLI2SDIVQ  RCC_DCKCFGR1_PLLI2SDIVQ(0)
+#define STM32_RCC_DCKCFGR1_PLLSAIDIVQ  RCC_DCKCFGR1_PLLSAIDIVQ(0)
+#define STM32_RCC_DCKCFGR1_PLLSAIDIVR  RCC_DCKCFGR1_PLLSAIDIVR(1)
+#define STM32_RCC_DCKCFGR1_SAI1SRC     0
+#define STM32_RCC_DCKCFGR1_SAI2SRC     0
+#define STM32_RCC_DCKCFGR1_TIMPRESRC   0
+#define STM32_RCC_DCKCFGR1_DFSDM1SRC   0
+#define STM32_RCC_DCKCFGR1_ADFSDM1SRC  0
+
+/* Configure Dedicated Clock Configuration Register 2 */
+
+#define STM32_RCC_DCKCFGR2_USART1SRC  RCC_DCKCFGR2_USART1SEL_APB
+#define STM32_RCC_DCKCFGR2_USART2SRC  RCC_DCKCFGR2_USART2SEL_APB
+#define STM32_RCC_DCKCFGR2_UART4SRC   RCC_DCKCFGR2_UART4SEL_APB
+#define STM32_RCC_DCKCFGR2_UART5SRC   RCC_DCKCFGR2_UART5SEL_APB
+#define STM32_RCC_DCKCFGR2_USART6SRC  RCC_DCKCFGR2_USART6SEL_APB
+#define STM32_RCC_DCKCFGR2_UART7SRC   RCC_DCKCFGR2_UART7SEL_APB
+#define STM32_RCC_DCKCFGR2_UART8SRC   RCC_DCKCFGR2_UART8SEL_APB
+#define STM32_RCC_DCKCFGR2_I2C1SRC    RCC_DCKCFGR2_I2C1SEL_HSI
+#define STM32_RCC_DCKCFGR2_I2C2SRC    RCC_DCKCFGR2_I2C2SEL_HSI
+#define STM32_RCC_DCKCFGR2_I2C3SRC    RCC_DCKCFGR2_I2C3SEL_HSI
+#define STM32_RCC_DCKCFGR2_I2C4SRC    RCC_DCKCFGR2_I2C4SEL_HSI
+#define STM32_RCC_DCKCFGR2_LPTIM1SRC  RCC_DCKCFGR2_LPTIM1SEL_APB
+#define STM32_RCC_DCKCFGR2_CECSRC     RCC_DCKCFGR2_CECSEL_HSI
+#define STM32_RCC_DCKCFGR2_CK48MSRC   RCC_DCKCFGR2_CK48MSEL_PLLSAI
+#define STM32_RCC_DCKCFGR2_SDMMCSRC   RCC_DCKCFGR2_SDMMCSEL_48MHZ
+#define STM32_RCC_DCKCFGR2_SDMMC2SRC  RCC_DCKCFGR2_SDMMC2SEL_48MHZ
+
+/* Several prescalers allow the configuration of the two AHB buses, the
+ * high-speed APB (APB2) and the low-speed APB (APB1) domains. The maximum
+ * frequency of the two AHB buses is 216 MHz while the maximum frequency of
+ * the high-speed APB domains is 108 MHz. The maximum allowed frequency of
+ * the low-speed APB domain is 54 MHz.
+ */
+
+/* AHB clock (HCLK) is SYSCLK (216 MHz) */
+
+#define STM32_RCC_CFGR_HPRE     RCC_CFGR_HPRE_SYSCLK  /* HCLK  = SYSCLK / 1 */
+#define STM32_HCLK_FREQUENCY    STM32_SYSCLK_FREQUENCY
+
+/* APB1 clock (PCLK1) is HCLK/4 (54 MHz) */
+
+#define STM32_RCC_CFGR_PPRE1    RCC_CFGR_PPRE1_HCLKd4     /* PCLK1 = HCLK / 4 */
+#define STM32_PCLK1_FREQUENCY   (STM32_HCLK_FREQUENCY/4)
+
+/* Timers driven from APB1 will be twice PCLK1 */
+
+#define STM32_APB1_TIM2_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM3_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM4_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM5_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM6_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM7_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM12_CLKIN  (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM13_CLKIN  (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM14_CLKIN  (2*STM32_PCLK1_FREQUENCY)
+
+/* APB2 clock (PCLK2) is HCLK/2 (108MHz) */
+
+#define STM32_RCC_CFGR_PPRE2    RCC_CFGR_PPRE2_HCLKd2     /* PCLK2 = HCLK / 2 */
+#define STM32_PCLK2_FREQUENCY   (STM32_HCLK_FREQUENCY/2)
+
+/* Timers driven from APB2 will be twice PCLK2 */
+
+#define STM32_APB2_TIM1_CLKIN   (2*STM32_PCLK2_FREQUENCY)
+#define STM32_APB2_TIM8_CLKIN   (2*STM32_PCLK2_FREQUENCY)
+#define STM32_APB2_TIM9_CLKIN   (2*STM32_PCLK2_FREQUENCY)
+#define STM32_APB2_TIM10_CLKIN  (2*STM32_PCLK2_FREQUENCY)
+#define STM32_APB2_TIM11_CLKIN  (2*STM32_PCLK2_FREQUENCY)
+
+/* FLASH wait states
+ *
+ *  --------- ---------- -----------
+ *  VDD       MAX SYSCLK WAIT STATES
+ *  --------- ---------- -----------
+ *  1.7-2.1 V   180 MHz    8
+ *  2.1-2.4 V   216 MHz    9
+ *  2.4-2.7 V   216 MHz    8
+ *  2.7-3.6 V   216 MHz    7
+ *  --------- ---------- -----------
+ */
+
+#define BOARD_FLASH_WAITSTATES 7
+
+/* Alternate function pin selections */
+
+/* USART3
+ * TX - PB10
+ * RX - PB11
+ */
+
+#define GPIO_USART3_RX GPIO_USART3_RX_1 /* PB11 */
+#define GPIO_USART3_TX GPIO_USART3_TX_1 /* PB10 */
+
+/* USART6 (RS485)
+ * TX  - PG14
+ * RX  - PG9
+ * RTS - PG12
+ * CK  - PC8
+ */
+
+#define GPIO_USART6_TX  GPIO_USART6_TX_2  /* PG14 */
+#define GPIO_USART6_RX  GPIO_USART6_RX_2  /* PG9 */
+#define GPIO_USART6_RTS GPIO_USART6_RTS_1 /* PG12 */
+#define GPIO_USART6_CK  GPIO_USART6_CK_1  /* PC8 */
+
+/* PWM1 - FOC */
+
+#define GPIO_TIM1_CH1OUT GPIO_TIM1_CH1OUT_1 /* PA8 */
+#define GPIO_TIM1_CH1N   GPIO_TIM1_CH1N_2   /* PB13 */
+#define GPIO_TIM1_CH2OUT GPIO_TIM1_CH2OUT_1 /* PA9 */
+#define GPIO_TIM1_CH2N   GPIO_TIM1_CH2N_1   /* PB0 */
+#define GPIO_TIM1_CH3OUT GPIO_TIM1_CH3OUT_1 /* PA10 */
+#define GPIO_TIM1_CH3N   GPIO_TIM1_CH3N_1   /* PB1 */
+
+/* TIM2 - QENCO */
+
+#define GPIO_TIM2_CH1IN GPIO_TIM2_CH1IN_1 /* PA0 */
+#define GPIO_TIM2_CH2IN GPIO_TIM2_CH2IN_1 /* PA1 */
+#define GPIO_TIM2_CH3IN GPIO_TIM2_CH3IN_1 /* PA2 */
+
+#endif /* __BOARDS_ARM_STM32F7_STEVAL_ETH001V1_INCLUDE_BOARD_H */
--- a/boards/arm/stm32f7/steval-eth001v1/scripts/Make.defs
+++ b/boards/arm/stm32f7/steval-eth001v1/scripts/Make.defs
@ -0,0 +1,43 @@
+############################################################################
+# boards/arm/stm32f7/steval-eth001v1/scripts/Make.defs
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more
+# contributor license agreements.  See the NOTICE file distributed with
+# this work for additional information regarding copyright ownership.  The
+# ASF licenses this file to you under the Apache License, Version 2.0 (the
+# "License"); you may not use this file except in compliance with the
+# License.  You may obtain a copy of the License at
+#
+#   http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+# License for the specific language governing permissions and limitations
+# under the License.
+#
+############################################################################
+
+include $(TOPDIR)/.config
+include $(TOPDIR)/tools/Config.mk
+include $(TOPDIR)/arch/arm/src/armv7-m/Toolchain.defs
+
+LDSCRIPT = flash.ld
+ARCHSCRIPT += $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)
+
+ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
+
+CFLAGS := $(ARCHCFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS := $(ARCHCXXFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
+AFLAGS := $(CFLAGS) -D__ASSEMBLY__
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048
+
+define FLASH
+  $(Q) st-flash write nuttx.bin 0x8000000
+endef
--- a/boards/arm/stm32f7/steval-eth001v1/scripts/flash.ld
+++ b/boards/arm/stm32f7/steval-eth001v1/scripts/flash.ld
@ -0,0 +1,132 @@
+/****************************************************************************
+ * boards/arm/stm32f7/steval-eth001v1/scripts/flash.ld
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/* The STM32F767ZI has 2048Kb of main FLASH memory.  This FLASH memory can
+ * be accessed from either the AXIM interface at address 0x0800:0000 or from
+ * the ITCM interface at address 0x0020:0000.
+ *
+ * Additional information, including the option bytes, is available at at
+ * FLASH at address 0x1ff0:0000 (AXIM) or 0x0010:0000 (ITCM).
+ *
+ * In the STM32F767ZI, two different boot spaces can be selected through
+ * the BOOT pin and the boot base address programmed in the BOOT_ADD0 and
+ * BOOT_ADD1 option bytes:
+ *
+ *   1) BOOT=0: Boot address defined by user option byte BOOT_ADD0[15:0].
+ *      ST programmed value: Flash on ITCM at 0x0020:0000
+ *   2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0].
+ *      ST programmed value: System bootloader at 0x0010:0000
+ *
+ * NuttX does not modify these option bytes.  On the unmodified
+ * STEVAL-ETH001V1 board, the BOOT0 pin is at ground so by default,
+ * the STM32 will boot to address 0x0020:0000 in ITCM FLASH.
+ *
+ * The STM32F767ZI also has 512Kb of data SRAM (in addition to ITCM SRAM).
+ * SRAM is split up into three blocks:
+ *
+ *   1)  128Kb of DTCM SRM beginning at address 0x2000:0000
+ *   2) 368Kb of SRAM1 beginning at address 0x2001:0000
+ *   3)  16Kb of SRAM2 beginning at address 0x2004:c000
+ *
+ * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
+ * where the code expects to begin execution by jumping to the entry point in
+ * the 0x0800:0000 address range.
+ */
+
+MEMORY
+{
+  itcm  (rwx) : ORIGIN = 0x00200000, LENGTH = 2048K
+  flash (rx)  : ORIGIN = 0x08000000, LENGTH = 2048K
+  dtcm  (rwx) : ORIGIN = 0x20000000, LENGTH = 128K
+  sram1 (rwx) : ORIGIN = 0x20010000, LENGTH = 368K
+  sram2 (rwx) : ORIGIN = 0x2004c000, LENGTH = 16K
+}
+
+OUTPUT_ARCH(arm)
+EXTERN(_vectors)
+ENTRY(_stext)
+SECTIONS
+{
+    .text : {
+        _stext = ABSOLUTE(.);
+        *(.vectors)
+        *(.text .text.*)
+        *(.fixup)
+        *(.gnu.warning)
+        *(.rodata .rodata.*)
+        *(.gnu.linkonce.t.*)
+        *(.glue_7)
+        *(.glue_7t)
+        *(.got)
+        *(.gcc_except_table)
+        *(.gnu.linkonce.r.*)
+        _etext = ABSOLUTE(.);
+    } > flash
+
+    .init_section : {
+        _sinit = ABSOLUTE(.);
+        *(.init_array .init_array.*)
+        _einit = ABSOLUTE(.);
+    } > flash
+
+    .ARM.extab : {
+        *(.ARM.extab*)
+    } > flash
+
+    __exidx_start = ABSOLUTE(.);
+    .ARM.exidx : {
+        *(.ARM.exidx*)
+    } > flash
+    __exidx_end = ABSOLUTE(.);
+
+    _eronly = ABSOLUTE(.);
+
+    .data : {
+        _sdata = ABSOLUTE(.);
+        *(.data .data.*)
+        *(.gnu.linkonce.d.*)
+        CONSTRUCTORS
+        . = ALIGN(4);
+        _edata = ABSOLUTE(.);
+    } > sram1 AT > flash
+
+    .bss : {
+        _sbss = ABSOLUTE(.);
+        *(.bss .bss.*)
+        *(.gnu.linkonce.b.*)
+        *(COMMON)
+        . = ALIGN(4);
+        _ebss = ABSOLUTE(.);
+    } > sram1
+
+    /* Stabs debugging sections. */
+    .stab 0 : { *(.stab) }
+    .stabstr 0 : { *(.stabstr) }
+    .stab.excl 0 : { *(.stab.excl) }
+    .stab.exclstr 0 : { *(.stab.exclstr) }
+    .stab.index 0 : { *(.stab.index) }
+    .stab.indexstr 0 : { *(.stab.indexstr) }
+    .comment 0 : { *(.comment) }
+    .debug_abbrev 0 : { *(.debug_abbrev) }
+    .debug_info 0 : { *(.debug_info) }
+    .debug_line 0 : { *(.debug_line) }
+    .debug_pubnames 0 : { *(.debug_pubnames) }
+    .debug_aranges 0 : { *(.debug_aranges) }
+}
--- a/boards/arm/stm32f7/steval-eth001v1/src/Makefile
+++ b/boards/arm/stm32f7/steval-eth001v1/src/Makefile
@ -0,0 +1,29 @@
+############################################################################
+# boards/arm/stm32f7/steval-eth001v1/src/Makefile
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more
+# contributor license agreements.  See the NOTICE file distributed with
+# this work for additional information regarding copyright ownership.  The
+# ASF licenses this file to you under the Apache License, Version 2.0 (the
+# "License"); you may not use this file except in compliance with the
+# License.  You may obtain a copy of the License at
+#
+#   http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+# License for the specific language governing permissions and limitations
+# under the License.
+#
+############################################################################
+
+include $(TOPDIR)/Make.defs
+
+CSRCS = stm32_boot.c stm32_bringup.c
+
+ifeq ($(CONFIG_BOARDCTL),y)
+CSRCS += stm32_appinit.c
+endif
+
+include $(TOPDIR)/boards/Board.mk
--- a/boards/arm/stm32f7/steval-eth001v1/src/steval-eth001v1.h
+++ b/boards/arm/stm32f7/steval-eth001v1/src/steval-eth001v1.h
@ -0,0 +1,70 @@
+/****************************************************************************
+ * boards/arm/stm32f7/steval-eth001v1/src/steval-eth001v1.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __BOARDS_ARM_STM32F7_STEVAL_ETH001V1_SRC_STEVAL_ETH001V1_H
+#define __BOARDS_ARM_STM32F7_STEVAL_ETH001V1_SRC_STEVAL_ETH001V1_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+#include <nuttx/compiler.h>
+#include <stdint.h>
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* procfs File System */
+
+#ifdef CONFIG_FS_PROCFS
+#  ifdef CONFIG_NSH_PROC_MOUNTPOINT
+#    define STM32_PROCFS_MOUNTPOINT CONFIG_NSH_PROC_MOUNTPOINT
+#  else
+#    define STM32_PROCFS_MOUNTPOINT "/proc"
+#  endif
+#endif
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/****************************************************************************
+ * Name: stm32_bringup
+ *
+ * Description:
+ *   Perform architecture-specific initialization
+ *
+ *   CONFIG_BOARD_LATE_INITIALIZE=y :
+ *     Called from board_late_initialize().
+ *
+ *   CONFIG_BOARD_LATE_INITIALIZE=n && CONFIG_BOARDCTL=y :
+ *     Called from the NSH library
+ *
+ ****************************************************************************/
+
+int stm32_bringup(void);
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* __BOARDS_ARM_STM32F7_STEVAL_ETH001V1_SRC_STEVAL_ETH001V1_H */
--- a/boards/arm/stm32f7/steval-eth001v1/src/stm32_appinit.c
+++ b/boards/arm/stm32f7/steval-eth001v1/src/stm32_appinit.c
@ -0,0 +1,72 @@
+/****************************************************************************
+ * boards/arm/stm32f7/steval-eth001v1/src/stm32_appinit.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+
+#include "steval-eth001v1.h"
+
+#ifdef CONFIG_BOARDCTL
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_app_initialize
+ *
+ * Description:
+ *   Perform application specific initialization.  This function is never
+ *   called directly from application code, but only indirectly via the
+ *   (non-standard) boardctl() interface using the command BOARDIOC_INIT.
+ *
+ * Input Parameters:
+ *   arg - The boardctl() argument is passed to the board_app_initialize()
+ *         implementation without modification.  The argument has no
+ *         meaning to NuttX; the meaning of the argument is a contract
+ *         between the board-specific initialization logic and the
+ *         matching application logic.  The value could be such things as a
+ *         mode enumeration value, a set of DIP switch switch settings, a
+ *         pointer to configuration data read from a file or serial FLASH,
+ *         or whatever you would like to do with it.  Every implementation
+ *         should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned on
+ *   any failure to indicate the nature of the failure.
+ *
+ ****************************************************************************/
+
+int board_app_initialize(uintptr_t arg)
+{
+#ifndef CONFIG_BOARD_LATE_INITIALIZE
+  /* Perform board-specific initialization */
+
+  return stm32_bringup();
+#else
+  return OK;
+#endif
+}
+
+#endif
--- a/boards/arm/stm32f7/steval-eth001v1/src/stm32_boot.c
+++ b/boards/arm/stm32f7/steval-eth001v1/src/stm32_boot.c
@ -0,0 +1,74 @@
+/****************************************************************************
+ * boards/arm/stm32f7/steval-eth001v1/src/stm32_boot.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <debug.h>
+
+#include <nuttx/board.h>
+#include <arch/board/board.h>
+
+#include "arm_internal.h"
+#include "steval-eth001v1.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_boardinitialize
+ *
+ * Description:
+ *   All STM32 architectures must provide the following entry point.
+ *   This entry point is called early in the initialization -- after all
+ *   memory has been configured and mapped but before any devices have been
+ *   initialized.
+ *
+ ****************************************************************************/
+
+void stm32_boardinitialize(void)
+{
+}
+
+/****************************************************************************
+ * Name: board_late_initialize
+ *
+ * Description:
+ *   If CONFIG_BOARD_LATE_INITIALIZE is selected, then an additional
+ *   initialization call will be performed in the boot-up sequence to a
+ *   function called board_late_initialize().  board_late_initialize() will
+ *   be called immediately after up_initialize() is called and just before
+ *   the initial application is started. This additional initialization phase
+ *   may be used, for example, to initialize board-specific device drivers.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_BOARD_LATE_INITIALIZE
+void board_late_initialize(void)
+{
+  /* Perform board-specific initialization */
+
+  stm32_bringup();
+}
+#endif
--- a/boards/arm/stm32f7/steval-eth001v1/src/stm32_bringup.c
+++ b/boards/arm/stm32f7/steval-eth001v1/src/stm32_bringup.c
@ -0,0 +1,71 @@
+/****************************************************************************
+ * boards/arm/stm32f7/steval-eth001v1/src/stm32_bringup.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <sys/types.h>
+#include <syslog.h>
+#include <errno.h>
+
+#include "steval-eth001v1.h"
+
+#include <nuttx/fs/fs.h>
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_bringup
+ *
+ * Description:
+ *   Perform architecture-specific initialization
+ *
+ *   CONFIG_BOARD_LATE_INITIALIZE=y :
+ *     Called from board_late_initialize().
+ *
+ *   CONFIG_BOARD_LATE_INITIALIZE=n && CONFIG_BOARDCTL=y :
+ *     Called from the NSH library
+ *
+ ****************************************************************************/
+
+int stm32_bringup(void)
+{
+  int ret;
+
+#ifdef CONFIG_FS_PROCFS
+  /* Mount the procfs file system */
+
+  ret = nx_mount(NULL, STM32_PROCFS_MOUNTPOINT, "procfs", 0, NULL);
+  if (ret < 0)
+    {
+      syslog(LOG_ERR,
+             "ERROR: Failed to mount the PROC filesystem: %d\n", ret);
+      return ret;
+    }
+#endif
+
+  UNUSED(ret);  /* May not be used */
+  return OK;
+}