arch: arm: armv8-m: fix nxstyle errors

Fix nxstyle errors to pass CI

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
This commit is contained in:
Alin Jerpelea 2021-03-24 09:14:53 +01:00 committed by Xiang Xiao
parent df7bffe8fd
commit da65128b8c
19 changed files with 360 additions and 347 deletions

View file

@ -1,7 +1,8 @@
/************************************************************************************
/****************************************************************************
* arch/arm/src/armv8-m/gnu/arm_exception.S
*
* Copyright (C) 2009-2013, 2015-2016, 2018 Gregory Nutt. All rights reserved.
* Copyright (C) 2009-2013, 2015-2016, 2018 Gregory Nutt.
* All rights reserved.
* Copyright (C) 2012 Michael Smith. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
@ -32,11 +33,11 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
@ -46,10 +47,11 @@
#include "chip.h"
#include "exc_return.h"
/************************************************************************************
/****************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* Configuration ********************************************************************/
****************************************************************************/
/* Configuration ************************************************************/
#ifdef CONFIG_ARCH_HIPRI_INTERRUPT
/* In kernel mode without an interrupt stack, this interrupt handler will set the
@ -80,9 +82,9 @@
# endif
#endif
/************************************************************************************
/****************************************************************************
* Public Symbols
************************************************************************************/
****************************************************************************/
.globl exception_common
@ -90,18 +92,18 @@
.thumb
.file "arm_exception.S"
/************************************************************************************
/****************************************************************************
* Macro Definitions
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Name: setintstack
*
* Description:
* Set the current stack pointer to the "top" the interrupt stack. Single CPU
* case. Must be provided by MCU-specific logic in the SMP case.
*
************************************************************************************/
****************************************************************************/
#if !defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 7
.macro setintstack, tmp1, tmp2
@ -113,9 +115,9 @@
.endm
#endif
/************************************************************************************
/****************************************************************************
* .text
************************************************************************************/
****************************************************************************/
/* Common exception handling logic. On entry here, the return stack is on either
* the PSP or the MSP and looks like the following:
@ -343,13 +345,13 @@ exception_common:
.size exception_common, .-exception_common
/************************************************************************************
/****************************************************************************
* Name: g_intstackalloc/g_intstackbase
*
* Description:
* Shouldn't happen
*
************************************************************************************/
****************************************************************************/
#if !defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 7
.bss

View file

@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/src/armv8-m/gnu/arm_fpu.S
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,16 +16,16 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************/
****************************************************************************/
/*
* When this file is assembled, it will require the following GCC options:
*
* -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfp -meabi=5 -mthumb
*/
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
@ -33,13 +33,13 @@
#ifdef CONFIG_ARCH_FPU
/************************************************************************************
/****************************************************************************
* Pre-processor Definitions
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Public Symbols
************************************************************************************/
****************************************************************************/
.globl arm_savefpu
.globl arm_restorefpu
@ -48,11 +48,11 @@
.thumb
.file "arm_fpu.S"
/************************************************************************************
/****************************************************************************
* Public Functions
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Name: arm_savefpu
*
* Description:
@ -69,7 +69,7 @@
* Returned Value:
* None
*
************************************************************************************/
****************************************************************************/
.thumb_func
.type arm_savefpu, function
@ -157,7 +157,7 @@ arm_savefpu:
.size arm_savefpu, .-arm_savefpu
/************************************************************************************
/****************************************************************************
* Name: arm_restorefpu
*
* Description:
@ -175,7 +175,7 @@ arm_savefpu:
* This function does not return anything explicitly. However, it is called from
* interrupt level assembly logic that assumes that r0 is preserved.
*
************************************************************************************/
****************************************************************************/
.thumb_func
.type arm_restorefpu, function

View file

@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/src/armv8-m/gnu/arm_fullcontextrestore.S
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,11 +16,11 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
#include <arch/irq.h>
@ -28,27 +28,27 @@
#include "nvic.h"
#include "svcall.h"
/************************************************************************************
/****************************************************************************
* Pre-processor Definitions
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Public Symbols
************************************************************************************/
****************************************************************************/
.syntax unified
.thumb
.file "arm_fullcontextrestore.S"
/************************************************************************************
/****************************************************************************
* Macros
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Public Functions
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Name: arm_fullcontextrestore
*
* Description:
@ -59,7 +59,7 @@
* Returned Value:
* None
*
************************************************************************************/
****************************************************************************/
.thumb_func
.globl arm_fullcontextrestore

View file

@ -1,4 +1,4 @@
/************************************************************************************************
/****************************************************************************
* arch/arm/src/armv8-m/gnu/up_lazyexcption.S
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,11 +16,11 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************************/
****************************************************************************/
/************************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
@ -30,11 +30,11 @@
#include "chip.h"
#include "exc_return.h"
/************************************************************************************************
/****************************************************************************
* Pre-processor Definitions
************************************************************************************************/
****************************************************************************/
/* Configuration ********************************************************************************/
/* Configuration ************************************************************/
#ifdef CONFIG_ARCH_HIPRI_INTERRUPT
/* In kernel mode without an interrupt stack, this interrupt handler will set the MSP to the
@ -63,9 +63,9 @@
# endif
#endif
/************************************************************************************************
/****************************************************************************
* Public Symbols
************************************************************************************************/
****************************************************************************/
.globl exception_common
@ -73,18 +73,18 @@
.thumb
.file "arm_lazyexception.S"
/************************************************************************************************
/****************************************************************************
* Macro Definitions
************************************************************************************************/
****************************************************************************/
/************************************************************************************************
/****************************************************************************
* Name: setintstack
*
* Description:
* Set the current stack pointer to the "top" the interrupt stack. Single CPU case. Must be
* provided by MCU-specific logic in chip.h for the SMP case.
*
************************************************************************************************/
****************************************************************************/
#if !defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 7
.macro setintstack, tmp1, tmp2
@ -96,9 +96,9 @@
.endm
#endif
/************************************************************************************************
/****************************************************************************
* .text
************************************************************************************************/
****************************************************************************/
/* Common IRQ handling logic. On entry here, the return stack is on either
* the PSP or the MSP and looks like the following:
@ -361,13 +361,13 @@ exception_common:
bx r14 /* And return */
.size exception_common, .-exception_common
/************************************************************************************************
/****************************************************************************
* Name: g_intstackalloc/g_intstackbase
*
* Description:
* Shouldn't happen
*
************************************************************************************************/
****************************************************************************/
#if !defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 7
.bss

View file

@ -1,4 +1,4 @@
/*****************************************************************************
/****************************************************************************
* arch/arm/src/armv8-m/arm_mpu.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,11 +16,11 @@
* License for the specific language governing permissions and limitations
* under the License.
*
*****************************************************************************/
****************************************************************************/
/*****************************************************************************
/****************************************************************************
* Included Files
*****************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
@ -30,19 +30,19 @@
#include "mpu.h"
#include "arm_internal.h"
/*****************************************************************************
/****************************************************************************
* Pre-processor Definitions
*****************************************************************************/
****************************************************************************/
/* Configuration *************************************************************/
/* Configuration ************************************************************/
#ifndef CONFIG_ARM_MPU_NREGIONS
# define CONFIG_ARM_MPU_NREGIONS 8
#endif
/*****************************************************************************
/****************************************************************************
* Private Data
*****************************************************************************/
****************************************************************************/
/* These sets represent the set of disabled memory sub-regions. A bit set
* corresponds to a disabled sub-region; the LS bit corresponds to the first
@ -72,11 +72,11 @@ static const uint8_t g_ls_regionmask[9] =
static uint8_t g_region;
/*****************************************************************************
/****************************************************************************
* Private Functions
*****************************************************************************/
****************************************************************************/
/*****************************************************************************
/****************************************************************************
* Name: mpu_subregion_ms
*
* Description:
@ -88,7 +88,7 @@ static uint8_t g_region;
* l2size has the same properties as the return value from
* mpu_log2regionceil()
*
*****************************************************************************/
****************************************************************************/
static inline uint32_t mpu_subregion_ms(size_t size, uint8_t l2size)
{
@ -126,7 +126,7 @@ static inline uint32_t mpu_subregion_ms(size_t size, uint8_t l2size)
return g_ms_regionmask[nsrs];
}
/*****************************************************************************
/****************************************************************************
* Name: mpu_subregion_ls
*
* Description:
@ -139,7 +139,7 @@ static inline uint32_t mpu_subregion_ms(size_t size, uint8_t l2size)
* l2size has the same properties as the return value from
* mpu_log2regionceil()
*
*****************************************************************************/
****************************************************************************/
static inline uint32_t mpu_subregion_ls(size_t offset, uint8_t l2size)
{
@ -177,11 +177,11 @@ static inline uint32_t mpu_subregion_ls(size_t offset, uint8_t l2size)
return g_ls_regionmask[nsrs];
}
/*****************************************************************************
/****************************************************************************
* Public Functions
*****************************************************************************/
****************************************************************************/
/*****************************************************************************
/****************************************************************************
* Name: mpu_allocregion
*
* Description:
@ -192,7 +192,7 @@ static inline uint32_t mpu_subregion_ls(size_t offset, uint8_t l2size)
* - Regions are only allocated early in initialization, so no special
* protection against re-entrancy is required;
*
*****************************************************************************/
****************************************************************************/
unsigned int mpu_allocregion(void)
{
@ -200,7 +200,7 @@ unsigned int mpu_allocregion(void)
return (unsigned int)g_region++;
}
/*****************************************************************************
/****************************************************************************
* Name: mpu_log2regionceil
*
* Description:
@ -209,7 +209,7 @@ unsigned int mpu_allocregion(void)
*
* size <= (1 << l2size)
*
*****************************************************************************/
****************************************************************************/
uint8_t mpu_log2regionceil(size_t size)
{
@ -221,7 +221,7 @@ uint8_t mpu_log2regionceil(size_t size)
return l2size;
}
/*****************************************************************************
/****************************************************************************
* Name: mpu_log2regionfloor
*
* Description:
@ -230,7 +230,7 @@ uint8_t mpu_log2regionceil(size_t size)
*
* size >= (1 << l2size)
*
*****************************************************************************/
****************************************************************************/
uint8_t mpu_log2regionfloor(size_t size)
{
@ -244,7 +244,7 @@ uint8_t mpu_log2regionfloor(size_t size)
return l2size;
}
/*****************************************************************************
/****************************************************************************
* Name: mpu_subregion
*
* Description:
@ -256,7 +256,7 @@ uint8_t mpu_log2regionfloor(size_t size)
* l2size has the same properties as the return value from
* mpu_log2regionceil()
*
*****************************************************************************/
****************************************************************************/
uint32_t mpu_subregion(uintptr_t base, size_t size, uint8_t l2size)
{
@ -301,13 +301,13 @@ uint32_t mpu_subregion(uintptr_t base, size_t size, uint8_t l2size)
return ret;
}
/*****************************************************************************
/****************************************************************************
* Name: mpu_control
*
* Description:
* Configure and enable (or disable) the MPU
*
*****************************************************************************/
****************************************************************************/
void mpu_control(bool enable, bool hfnmiena, bool privdefena)
{
@ -331,13 +331,13 @@ void mpu_control(bool enable, bool hfnmiena, bool privdefena)
putreg32(regval, MPU_CTRL);
}
/*****************************************************************************
/****************************************************************************
* Name: mpu_configure_region
*
* Description:
* Configure a region for privileged, strongly ordered memory
*
*****************************************************************************/
****************************************************************************/
void mpu_configure_region(uintptr_t base, size_t size,
uint32_t flags)
@ -362,7 +362,8 @@ void mpu_configure_region(uintptr_t base, size_t size,
l2size = mpu_log2regionceil(size + base - alignedbase);
DEBUGASSERT(alignedbase + (1 << l2size) >= base + size);
DEBUGASSERT(l2size == 5 || alignedbase + (1 << (l2size - 1)) < base + size);
DEBUGASSERT(l2size == 5 ||
alignedbase + (1 << (l2size - 1)) < base + size);
DEBUGASSERT((alignedbase & MPU_RBAR_ADDR_MASK) == alignedbase);
DEBUGASSERT((alignedbase & ((1 << l2size) - 1)) == 0);

View file

@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/src/armv8-m/gnu/arm_saveusercontext.S
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,11 +16,11 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
#include <arch/irq.h>
@ -28,27 +28,27 @@
#include "nvic.h"
#include "svcall.h"
/************************************************************************************
/****************************************************************************
* Pre-processor Definitions
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Public Symbols
************************************************************************************/
****************************************************************************/
.syntax unified
.thumb
.file "arm_saveusercontext.S"
/************************************************************************************
/****************************************************************************
* Macros
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Public Functions
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Name: arm_saveusercontext
*
* Description:
@ -60,7 +60,7 @@
* 0: Normal return
* 1: Context switch return
*
************************************************************************************/
****************************************************************************/
.text
.thumb_func

View file

@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/src/armv8-m/gnu/arm_setjmp.S
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,26 +16,26 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************/
****************************************************************************/
/* When this file is assembled, it will require the following GCC options:
*
* -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -meabi=5 -mthumb
*/
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
/************************************************************************************
/****************************************************************************
* Pre-processor Definitions
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Public Symbols
************************************************************************************/
****************************************************************************/
.globl setjmp
.globl longjmp
@ -44,11 +44,11 @@
.thumb
.file "setjmp.S"
/************************************************************************************
/****************************************************************************
* Public Functions
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Name: setjmp
*
* Description:
@ -67,7 +67,7 @@
* 0 setjmp called directly
* non-0 we justed returned from a longjmp()
*
************************************************************************************/
****************************************************************************/
.thumb_func
.type setjmp, function
@ -87,7 +87,7 @@ setjmp:
vmrs r1, fpscr /* Fetch the FPCSR */
str r1, [r0], #4 /* Save the floating point control and status register */
// DSA: don't need to inc r0
/* DSA: don't need to inc r0 */
#endif /* CONFIG_ARCH_FPU */
/* we're done, we're out of here */
@ -97,7 +97,7 @@ setjmp:
.size setjmp, .-setjmp
/************************************************************************************
/****************************************************************************
* Name: longjmp
*
* Description:
@ -117,7 +117,7 @@ setjmp:
* Returned Value:
* This function does not return anything explicitly.
*
************************************************************************************/
****************************************************************************/
.thumb_func
.type longjmp, function

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@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/src/armv8-m/gnu/arm_switchcontext.S
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,11 +16,11 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
#include <arch/irq.h>
@ -28,27 +28,27 @@
#include "nvic.h"
#include "svcall.h"
/************************************************************************************
/****************************************************************************
* Pre-processor Definitions
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Public Symbols
************************************************************************************/
****************************************************************************/
.syntax unified
.thumb
.file "arm_switchcontext.S"
/************************************************************************************
/****************************************************************************
* Macros
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Public Functions
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Name: arm_switchcontext
*
* Description:
@ -60,7 +60,7 @@
* Returned Value:
* None
*
************************************************************************************/
****************************************************************************/
.thumb_func
.globl arm_switchcontext

View file

@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/src/armv8-m/barriers.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,18 +16,18 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_SRC_COMMON_ARMV8_M_BARRIERS_H
#define __ARCH_ARM_SRC_COMMON_ARMV8_M_BARRIERS_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Pre-processor Definitions
************************************************************************************/
****************************************************************************/
/* ARMv8-M memory barriers */

View file

@ -1,11 +1,12 @@
/***********************************************************************************************
/****************************************************************************
* arch/arm/src/armv8-m/dwt.h
*
* Copyright (c) 2009 - 2013 ARM LIMITED
*
* All rights reserved.
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
@ -16,17 +17,17 @@
* to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS
* AND CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Copyright (C) 2014 Pierre-noel Bouteville . All rights reserved.
* Author: Pierre-noel Bouteville <pnb990@gmail.com>
@ -58,22 +59,22 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
***********************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_SRC_ARMV8_M_DWT_H
#define __ARCH_ARM_SRC_ARMV8_M_DWT_H
/***********************************************************************************************
/****************************************************************************
* Pre-processor Definitions
***********************************************************************************************/
****************************************************************************/
/* Data Watchpoint and Trace Register (DWT) Definitions ****************************************/
/* Data Watchpoint and Trace Register (DWT) Definitions *********************/
/* DWT Register Base Address *******************************************************************/
/* DWT Register Base Address ************************************************/
#define DWT_BASE (0xe0001000ul)
/* DWT Register Addresses **********************************************************************/
/* DWT Register Addresses ***************************************************/
#define DWT_CTRL (DWT_BASE + 0x0000) /* Control Register */
#define DWT_CYCCNT (DWT_BASE + 0x0004) /* Cycle Count Register */
@ -96,7 +97,7 @@
#define DWT_MASK3 (DWT_BASE + 0x0054) /* Mask Register 3 */
#define DWT_FUNCTION3 (DWT_BASE + 0x0058) /* Function Register 3 */
/* DWT Register Bit Field Definitions **********************************************************/
/* DWT Register Bit Field Definitions ***************************************/
/* DWT CTRL */

View file

@ -1,4 +1,4 @@
/*******************************************************************************************************************************
/****************************************************************************
* arch/arm/src/armv8-m/etm.h
*
* Copyright 2014 Silicon Laboratories, Inc. http://www.silabs.com</b>
@ -56,24 +56,24 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
*******************************************************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_SRC_ARMV8_M_ETM_H
#define __ARCH_ARM_SRC_ARMV8_M_ETM_H
/*******************************************************************************************************************************
/****************************************************************************
* Included Files
*******************************************************************************************************************************/
****************************************************************************/
/*******************************************************************************************************************************
/****************************************************************************
* Pre-processor Definitions
*******************************************************************************************************************************/
****************************************************************************/
/* ETM Register Base Address ***************************************************************************************************/
/* ETM Register Base Address ************************************************/
#define ETM_BASE (0xe0041000ul)
/* ETM Register Offsets ********************************************************************************************************/
/* ETM Register Offsets *****************************************************/
#define ETM_ETMCR_OFFSET 0x0000 /* Main Control Register */
#define ETM_ETMCCR_OFFSET 0x0004 /* Configuration Code Register */
@ -116,7 +116,7 @@
#define ETM_ETMCIDR2_OFFSET 0x0ff8 /* Component ID2 Register */
#define ETM_ETMCIDR3_OFFSET 0x0ffc /* Component ID3 Register */
/* ETM Register Addresses ******************************************************************************************************/
/* ETM Register Addresses ***************************************************/
#define ETM_ETMCR (ETM_BASE+ETM_ETMCR_OFFSET)
#define ETM_ETMCCR (ETM_BASE+ETM_ETMCCR_OFFSET)
@ -159,7 +159,7 @@
#define ETM_ETMCIDR2 (ETM_BASE+ETM_ETMCIDR2_OFFSET)
#define ETM_ETMCIDR3 (ETM_BASE+ETM_ETMCIDR3_OFFSET)
/* ETM Register Bit Field Definitions ******************************************************************************************/
/* ETM Register Bit Field Definitions ***************************************/
/* Bit fields for ETM ETMCR */

View file

@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/src/armv8-m/exc_return.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,69 +16,70 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_SRC_ARMV8_M_EXC_RETURN_H
#define __ARCH_ARM_SRC_ARMV8_M_EXC_RETURN_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
/************************************************************************************
/****************************************************************************
* Pre-processor Definitions
************************************************************************************/
****************************************************************************/
/* The processor saves an EXC_RETURN value to the LR on exception entry. The
* exception mechanism relies on this value to detect when the processor has
* completed an exception handler.
*
* Bits [31:28] of an EXC_RETURN value are always 1. When the processor loads a
* value matching this pattern to the PC it detects that the operation is a not
* a normal branch operation and instead, that the exception is complete.
* Therefore, it starts the exception return sequence.
* Bits [31:28] of an EXC_RETURN value are always 1. When the processor
* loads a value matching this pattern to the PC it detects that the
* operation is a not a normal branch operation and instead, that the
* exception is complete. Therefore, it starts the exception return sequence.
*
* Bits[6:0] of the EXC_RETURN value indicate the required return stack and eventual
* processor mode. The remaining bits of the EXC_RETURN value should be set to 1.
* Bits[6:0] of the EXC_RETURN value indicate the required return stack and
* eventual processor mode.
* The remaining bits of the EXC_RETURN value should be set to 1.
*/
/* EXC_RETURN_BASE: Bits that are always set in an EXC_RETURN value. */
#define EXC_RETURN_BASE 0xffffff80
/* EXC_RETURN_EXC_SECURE: Exception Secure. The security domain the exception
* was taken to. If this bit is clear non-secure, else secure.
/* EXC_RETURN_EXC_SECURE: Exception Secure. The security domain the
* exception was taken to. If this bit is clear non-secure, else secure.
*/
#define EXC_RETURN_EXC_SECURE (1 << 0)
/* EXC_RETURN_PROCESS_STACK: The exception saved (and will restore) the hardware
* context using the process stack pointer (if not set, the context was saved
* using the main stack pointer)
/* EXC_RETURN_PROCESS_STACK: The exception saved (and will restore) the
* hardware context using the process stack pointer (if not set, the context
* was saved using the main stack pointer)
*/
#define EXC_RETURN_PROCESS_STACK (1 << 2)
/* EXC_RETURN_THREAD_MODE: The exception will return to thread mode (if not set,
* return stays in handler mode)
/* EXC_RETURN_THREAD_MODE: The exception will return to thread mode (if not
* set, return stays in handler mode)
*/
#define EXC_RETURN_THREAD_MODE (1 << 3)
/* EXC_RETURN_STD_CONTEXT: The state saved on the stack does not include the
* volatile FP registers and FPSCR. If this bit is clear, the state does include
* these registers.
* volatile FP registers and FPSCR. If this bit is clear, the state does
* include these registers.
*/
#define EXC_RETURN_STD_CONTEXT (1 << 4)
/* EXC_RETURN_DEF_STACKING: Default callee register stacking (DCRS). Indicates
* whether the default stacking rules apply, or whether the callee registers are
* already on the stack. The possible values of this bit are: 0 - Stacking of
* the callee saved registers skipped. 1 - Default rules for stacking the
* callee registers followed.
/* EXC_RETURN_DEF_STACKING: Default callee register stacking (DCRS).
* Indicates whether the default stacking rules apply, or whether the callee
* registers are already on the stack. The possible values of this bit are:
* 0 - Stacking of the callee saved registers skipped. 1 - Default rules for
* stacking the callee registers followed.
*/
#define EXC_RETURN_DEF_STACKING (1 << 5)
@ -91,15 +92,15 @@
#define EXC_RETURN_SECURE_STACK (1 << 6)
/* EXC_RETURN_HANDLER: Return to handler mode. Exception return gets state from
* the main stack. Execution uses MSP after return.
/* EXC_RETURN_HANDLER: Return to handler mode. Exception return gets state
* from the main stack. Execution uses MSP after return.
*/
#define EXC_RETURN_HANDLER (EXC_RETURN_BASE | EXC_RETURN_DEF_STACKING | \
EXC_RETURN_STD_CONTEXT)
/* EXC_RETURN_PRIVTHR: Return to privileged thread mode. Exception return gets
* state from the main stack. Execution uses MSP after return.
/* EXC_RETURN_PRIVTHR: Return to privileged thread mode. Exception return
* gets state from the main stack. Execution uses MSP after return.
*/
#if !defined(CONFIG_ARMV8M_LAZYFPU) && defined(CONFIG_ARCH_FPU)
@ -110,8 +111,8 @@
EXC_RETURN_THREAD_MODE | EXC_RETURN_DEF_STACKING)
#endif
/* EXC_RETURN_UNPRIVTHR: Return to unprivileged thread mode. Exception return gets
* state from the process stack. Execution uses PSP after return.
/* EXC_RETURN_UNPRIVTHR: Return to unprivileged thread mode. Exception return
* gets state from the process stack. Execution uses PSP after return.
*/
#if !defined(CONFIG_ARMV8M_LAZYFPU) && defined(CONFIG_ARCH_FPU)
@ -123,8 +124,8 @@
EXC_RETURN_DEF_STACKING)
#endif
/************************************************************************************
/****************************************************************************
* Inline Functions
************************************************************************************/
****************************************************************************/
#endif /* __ARCH_ARM_SRC_ARMV8_M_EXC_RETURN_H */

View file

@ -1,11 +1,12 @@
/***********************************************************************************************
/****************************************************************************
* arch/arm/src/armv8-m/itm.h
*
* Copyright (c) 2009 - 2013 ARM LIMITED
*
* All rights reserved.
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
@ -16,17 +17,17 @@
* to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS
* AND CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Copyright (C) 2014 Pierre-noel Bouteville . All rights reserved.
* Author: Pierre-noel Bouteville <pnb990@gmail.com>
@ -58,28 +59,28 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
***********************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_SRC_ARMV8_M_ITM_H
#define __ARCH_ARM_SRC_ARMV8_M_ITM_H
/***********************************************************************************************
/****************************************************************************
* Included Files
***********************************************************************************************/
****************************************************************************/
#include <stdint.h>
/***********************************************************************************************
/****************************************************************************
* Pre-processor Definitions
***********************************************************************************************/
****************************************************************************/
/* Instrumentation Trace Macrocell Register (ITM) Definitions **********************************/
/* Instrumentation Trace Macrocell Register (ITM) Definitions ***************/
/* ITM Register Base Address *******************************************************************/
/* ITM Register Base Address ************************************************/
#define ITM_BASE (0xe0000000ul)
/* ITM Register Addresses **********************************************************************/
/* ITM Register Addresses ***************************************************/
#define ITM_PORT(i) (ITM_BASE + (i * 4)) /* Stimulus Port 32-bit */
#define ITM_TER (ITM_BASE + 0x0e00) /* Trace Enable Register */
@ -103,7 +104,7 @@
#define ITM_CID2 (ITM_BASE + 0x0ff8) /* Component Identification Register #2 */
#define ITM_CID3 (ITM_BASE + 0x0ffc) /* Component Identification Register #3 */
/* ITM Register Bit Field Definitions **********************************************************/
/* ITM Register Bit Field Definitions ***************************************/
/* ITM TPR */
@ -159,9 +160,9 @@
#define ITM_RXBUFFER_EMPTY 0x5aa55aa5
/***********************************************************************************************
/****************************************************************************
* Public Data
***********************************************************************************************/
****************************************************************************/
#ifdef __cplusplus
extern "C"
@ -170,9 +171,9 @@ extern "C"
extern volatile int32_t g_itm_rxbuffer; /* External variable to receive characters. */
/***********************************************************************************************
/****************************************************************************
* Public Function Prototypes
***********************************************************************************************/
****************************************************************************/
uint32_t itm_sendchar(uint32_t ch);
int32_t itm_receivechar(void);

View file

@ -1,4 +1,4 @@
/*********************************************************************************************
/****************************************************************************
* arch/arm/src/armv8-m/mpu.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,14 +16,14 @@
* License for the specific language governing permissions and limitations
* under the License.
*
*********************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_SRC_ARMV8M_MPU_H
#define __ARCH_ARM_SRC_ARMV8M_MPU_H
/*********************************************************************************************
/****************************************************************************
* Included Files
*********************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
@ -37,9 +37,9 @@
# include "arm_arch.h"
#endif
/*********************************************************************************************
/****************************************************************************
* Pre-processor Definitions
*********************************************************************************************/
****************************************************************************/
/* MPU Register Addresses */
@ -134,9 +134,9 @@
#ifdef CONFIG_ARM_MPU
/*********************************************************************************************
/****************************************************************************
* Public Function Prototypes
*********************************************************************************************/
****************************************************************************/
#ifndef __ASSEMBLY__
#undef EXTERN
@ -148,17 +148,17 @@ extern "C"
#define EXTERN extern
#endif
/*********************************************************************************************
/****************************************************************************
* Name: mpu_allocregion
*
* Description:
* Allocate the next region
*
*********************************************************************************************/
****************************************************************************/
unsigned int mpu_allocregion(void);
/*********************************************************************************************
/****************************************************************************
* Name: mpu_log2regionceil
*
* Description:
@ -167,11 +167,11 @@ unsigned int mpu_allocregion(void);
*
* size <= (1 << l2size)
*
*********************************************************************************************/
****************************************************************************/
uint8_t mpu_log2regionceil(size_t size);
/*********************************************************************************************
/****************************************************************************
* Name: mpu_log2regionfloor
*
* Description:
@ -180,11 +180,11 @@ uint8_t mpu_log2regionceil(size_t size);
*
* size >= (1 << l2size)
*
*********************************************************************************************/
****************************************************************************/
uint8_t mpu_log2regionfloor(size_t size);
/*********************************************************************************************
/****************************************************************************
* Name: mpu_subregion
*
* Description:
@ -196,42 +196,42 @@ uint8_t mpu_log2regionfloor(size_t size);
* l2size has the same properties as the return value from
* mpu_log2regionceil()
*
*********************************************************************************************/
****************************************************************************/
uint32_t mpu_subregion(uintptr_t base, size_t size, uint8_t l2size);
/*********************************************************************************************
/****************************************************************************
* Name: mpu_control
*
* Description:
* Configure and enable (or disable) the MPU
*
*********************************************************************************************/
****************************************************************************/
void mpu_control(bool enable, bool hfnmiena, bool privdefena);
/*********************************************************************************************
/****************************************************************************
* Name: mpu_configure_region
*
* Description:
* Configure a region for privileged, strongly ordered memory
*
*********************************************************************************************/
****************************************************************************/
void mpu_configure_region(uintptr_t base, size_t size,
uint32_t flags);
/*********************************************************************************************
/****************************************************************************
* Inline Functions
*********************************************************************************************/
****************************************************************************/
/*********************************************************************************************
/****************************************************************************
* Name: mpu_showtype
*
* Description:
* Show the characteristics of the MPU
*
*********************************************************************************************/
****************************************************************************/
#ifdef CONFIG_DEBUG_SCHED_INFO
# define mpu_showtype() \
@ -247,13 +247,13 @@ void mpu_configure_region(uintptr_t base, size_t size,
# define mpu_showtype() do { } while (0)
#endif
/*********************************************************************************************
/****************************************************************************
* Name: mpu_priv_stronglyordered
*
* Description:
* Configure a region for privileged, strongly ordered memory
*
*********************************************************************************************/
****************************************************************************/
#define mpu_priv_stronglyordered(base, size) \
do \
@ -268,13 +268,13 @@ void mpu_configure_region(uintptr_t base, size_t size,
/* Instruction access */); \
} while (0)
/*********************************************************************************************
/****************************************************************************
* Name: mpu_user_flash
*
* Description:
* Configure a region for user program flash
*
*********************************************************************************************/
****************************************************************************/
#define mpu_user_flash(base, size) \
do \
@ -289,13 +289,13 @@ void mpu_configure_region(uintptr_t base, size_t size,
/* Instruction access */); \
} while (0)
/*********************************************************************************************
/****************************************************************************
* Name: mpu_priv_flash
*
* Description:
* Configure a region for privileged program flash
*
*********************************************************************************************/
****************************************************************************/
#define mpu_priv_flash(base, size) \
do \
@ -310,13 +310,13 @@ void mpu_configure_region(uintptr_t base, size_t size,
/* Instruction access */); \
} while (0)
/*********************************************************************************************
/****************************************************************************
* Name: mpu_user_intsram
*
* Description:
* Configure a region as user internal SRAM
*
*********************************************************************************************/
****************************************************************************/
#define mpu_user_intsram(base, size) \
do \
@ -331,13 +331,13 @@ void mpu_configure_region(uintptr_t base, size_t size,
/* Instruction access */); \
} while (0)
/*********************************************************************************************
/****************************************************************************
* Name: mpu_priv_intsram
*
* Description:
* Configure a region as privileged internal SRAM
*
*********************************************************************************************/
****************************************************************************/
#define mpu_priv_intsram(base, size) \
do \
@ -352,13 +352,13 @@ void mpu_configure_region(uintptr_t base, size_t size,
/* Instruction access */); \
} while (0)
/*********************************************************************************************
/****************************************************************************
* Name: mpu_user_extsram
*
* Description:
* Configure a region as user external SRAM
*
*********************************************************************************************/
****************************************************************************/
#define mpu_user_extsram(base, size) \
do \
@ -373,13 +373,13 @@ void mpu_configure_region(uintptr_t base, size_t size,
/* Instruction access */); \
} while (0)
/*********************************************************************************************
/****************************************************************************
* Name: mpu_priv_extsram
*
* Description:
* Configure a region as privileged external SRAM
*
*********************************************************************************************/
****************************************************************************/
#define mpu_priv_extsram(base, size) \
do \
@ -394,13 +394,13 @@ void mpu_configure_region(uintptr_t base, size_t size,
/* Instruction access */); \
} while (0)
/*********************************************************************************************
/****************************************************************************
* Name: mpu_peripheral
*
* Description:
* Configure a region as privileged peripheral address space
*
*********************************************************************************************/
****************************************************************************/
#define mpu_peripheral(base, size) \
do \
@ -415,13 +415,13 @@ void mpu_configure_region(uintptr_t base, size_t size,
MPU_RASR_XN /* No Instruction access */); \
} while (0)
/*********************************************************************************************
/****************************************************************************
* Name: mpu_user_peripheral
*
* Description:
* Configure a region as user peripheral address space
*
*********************************************************************************************/
****************************************************************************/
#define mpu_user_peripheral(base, size) \
do \

View file

@ -1,4 +1,4 @@
/********************************************************************************************
/****************************************************************************
* arch/arm/src/armv8-m/nvic.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,24 +16,26 @@
* License for the specific language governing permissions and limitations
* under the License.
*
********************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_SRC_COMMON_ARMV8_M_NVIC_H
#define __ARCH_ARM_SRC_COMMON_ARMV8_M_NVIC_H
/********************************************************************************************
/****************************************************************************
* Included Files
********************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
/********************************************************************************************
/****************************************************************************
* Pre-processor Definitions
********************************************************************************************/
****************************************************************************/
/* Exception/interrupt vector numbers *******************************************************/
/* Exception/interrupt vector numbers ***************************************/
/* Vector 0: Reset stack pointer value */
/* Vector 0:
* Reset stack pointer value
*/
/* Vector 1: Reset */
#define NVIC_IRQ_NMI (2) /* Vector 2: Non-Maskable Interrupt (NMI) */
@ -48,15 +50,17 @@
#define NVIC_IRQ_PENDSV (14) /* Vector 14: Pendable system service request */
#define NVIC_IRQ_SYSTICK (15) /* Vector 15: System tick */
/* External interrupts (vectors >= 16). These definitions are chip-specific */
/* External interrupts (vectors >= 16).
* These definitions are chip-specific
*/
#define NVIC_IRQ_FIRST (16) /* Vector number of the first interrupt */
/* NVIC base address ************************************************************************/
/* NVIC base address ********************************************************/
#define ARMV8M_NVIC_BASE 0xe000e000
/* NVIC register offsets ********************************************************************/
/* NVIC register offsets ****************************************************/
#define NVIC_ICTR_OFFSET 0x0004 /* Interrupt controller type register */
#define NVIC_SYSTICK_CTRL_OFFSET 0x0010 /* SysTick control and status register */
@ -253,7 +257,7 @@
#define NVIC_CID2_OFFSET 0x0ff8 /* Component identification register bits 23:16 (CID0) */
#define NVIC_CID3_OFFSET 0x0ffc /* Component identification register bits 23:16 (CID0) */
/* NVIC register addresses ******************************************************************/
/* NVIC register addresses **************************************************/
#define NVIC_ICTR (ARMV8M_NVIC_BASE + NVIC_ICTR_OFFSET)
#define NVIC_SYSTICK_CTRL (ARMV8M_NVIC_BASE + NVIC_SYSTICK_CTRL_OFFSET)
@ -442,7 +446,7 @@
#define NVIC_CID2 (ARMV8M_NVIC_BASE + NVIC_CID2_OFFSET)
#define NVIC_CID3 (ARMV8M_NVIC_BASE + NVIC_CID3_OFFSET)
/* NVIC register bit definitions ************************************************************/
/* NVIC register bit definitions ********************************************/
/* Interrupt controller type (INCTCTL_TYPE) */
@ -682,16 +686,16 @@
#define NVIC_CACR_ECCDIS (1 << 1) /* Bit 1: Enables ECC in the instruction and data cache */
#define NVIC_CACR_FORCEWT (1 << 2) /* Bit 2: Enables Force Write-Through in the data cache */
/********************************************************************************************
/****************************************************************************
* Public Types
********************************************************************************************/
****************************************************************************/
/********************************************************************************************
/****************************************************************************
* Public Data
********************************************************************************************/
****************************************************************************/
/********************************************************************************************
/****************************************************************************
* Public Function Prototypes
********************************************************************************************/
****************************************************************************/
#endif /* __ARCH_ARM_SRC_COMMON_ARMV8_M_NVIC_H */

View file

@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/src/armv8-m/psr.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,18 +16,18 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_SRC_COMMON_ARMV8_M_PSR_H
#define __ARCH_ARM_SRC_COMMON_ARMV8_M_PSR_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Pre-processor Definitions
************************************************************************************/
****************************************************************************/
/* Application Program Status Register (APSR) */
@ -65,8 +65,8 @@
#define ARMV8M_XPSR_Z ARMV8M_APSR_Z
#define ARMV8M_XPSR_N ARMV8M_APSR_N
/************************************************************************************
/****************************************************************************
* Inline Functions
************************************************************************************/
****************************************************************************/
#endif /* __ARCH_ARM_SRC_COMMON_ARMV8_M_PSR_H */

View file

@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/src/armv8-m/svcall.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,14 +16,14 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_SRC_ARMV8_M_SVCALL_H
#define __ARCH_ARM_SRC_ARMV8_M_SVCALL_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
@ -31,15 +31,16 @@
# include <syscall.h>
#endif
/************************************************************************************
/****************************************************************************
* Pre-processor Definitions
************************************************************************************/
****************************************************************************/
/* Configuration ********************************************************************/
/* Configuration ************************************************************/
/* This logic uses three system calls {0,1,2} for context switching and one for the
* syscall return. So a minimum of four syscall values must be reserved. If
* CONFIG_BUILD_PROTECTED is defined, then four more syscall values must be reserved.
/* This logic uses three system calls {0,1,2} for context switching and one
* for the syscall return. So a minimum of four syscall values must be
*reserved. If CONFIG_BUILD_PROTECTED is defined, then four more syscall
* values must be reserved.
*/
#ifdef CONFIG_LIB_SYSCALL
@ -58,7 +59,7 @@
# endif
#endif
/* Cortex-M system calls ************************************************************/
/* Cortex-M system calls ****************************************************/
/* SYS call 0:
*
@ -108,7 +109,8 @@
/* SYS call 6:
*
* void signal_handler(_sa_sigaction_t sighand, int signo, FAR siginfo_t *info,
* void signal_handler(_sa_sigaction_t sighand,
* int signo, FAR siginfo_t *info,
* FAR void *ucontext);
*/
@ -124,8 +126,8 @@
#endif /* CONFIG_BUILD_PROTECTED */
#endif /* CONFIG_LIB_SYSCALL */
/************************************************************************************
/****************************************************************************
* Inline Functions
************************************************************************************/
****************************************************************************/
#endif /* __ARCH_ARM_SRC_ARMV8_M_SVCALL_H */

View file

@ -1,11 +1,12 @@
/***********************************************************************************************
/****************************************************************************
* arch/arm/src/armv8-m/tpi.h
*
* Copyright (c) 2009 - 2013 ARM LIMITED
*
* All rights reserved.
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
@ -16,17 +17,17 @@
* to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS
* AND CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Copyright (C) 2014 Pierre-noel Bouteville . All rights reserved.
* Author: Pierre-noel Bouteville <pnb990@gmail.com>
@ -58,22 +59,22 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
***********************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_SRC_ARMV8_M_TPI_H
#define __ARCH_ARM_SRC_ARMV8_M_TPI_H
/***********************************************************************************************
/****************************************************************************
* Pre-processor Definitions
***********************************************************************************************/
****************************************************************************/
/* Trace Port Interface Register (TPI) Definitions *********************************************/
/* Trace Port Interface Register (TPI) Definitions **************************/
/* TPI Register Base Address *******************************************************************/
/* TPI Register Base Address ************************************************/
#define TPI_BASE (0xe0040000ul)
/* TPI Register Addresses **********************************************************************/
/* TPI Register Addresses ***************************************************/
#define TPI_SSPSR (TPI_BASE + 0x0000) /* Supported Parallel Port Size Register */
#define TPI_CSPSR (TPI_BASE + 0x0004) /* Current Parallel Port Size Register */
@ -93,7 +94,7 @@
#define TPI_DEVID (TPI_BASE + 0x0fc8) /* TPIU_DEVID */
#define TPI_DEVTYPE (TPI_BASE + 0x0fcc) /* TPIU_DEVTYPE */
/* TPI Register Bit Field Definitions **********************************************************/
/* TPI Register Bit Field Definitions ***************************************/
/* TPI ACPR */

View file

@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/src/armv8-m/gnu/vfork.S
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,34 +16,34 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
#include "arm_vfork.h"
/************************************************************************************
/****************************************************************************
* Pre-processor Definitions
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Public Symbols
************************************************************************************/
****************************************************************************/
.syntax unified
.thumb
.file "vfork.S"
.globl up_vfork
/************************************************************************************
/****************************************************************************
* Public Functions
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Name: vfork
*
* Description:
@ -82,7 +82,7 @@
* returned to the parent, no child process is created, and errno is set to
* indicate the error.
*
************************************************************************************/
****************************************************************************/
.thumb_func
.globl vfork