boards/stm32f7/stm32f746g-disco: fix FMC pin

during migration from legacy pinout some of the FMC pins were ommited because
their names were identical to the new pinout, which didn't cause a compilation error.

This fixes LCD examples.

Also update incomplete stm32f769i-disco FMC support to avoid this kind of bug in the future
This commit is contained in:
raiden00pl 2024-10-08 11:42:18 +02:00 committed by Xiang Xiao
parent 77d1f78996
commit dff79e8e54
3 changed files with 6 additions and 3 deletions

View file

@ -573,5 +573,8 @@
#define GPIO_FMC_D13 (GPIO_FMC_D13_0|GPIO_SPEED_100MHz)
#define GPIO_FMC_D14 (GPIO_FMC_D14_0|GPIO_SPEED_100MHz)
#define GPIO_FMC_D15 (GPIO_FMC_D15_0|GPIO_SPEED_100MHz)
#define GPIO_FMC_SDCKE0 (GPIO_FMC_SDCKE0_1|GPIO_SPEED_100MHz)
#define GPIO_FMC_SDNE0 (GPIO_FMC_SDNE0_3|GPIO_SPEED_100MHz)
#define GPIO_FMC_SDNWE (GPIO_FMC_SDNWE_3|GPIO_SPEED_100MHz)
#endif /* __BOARDS_ARM_STM32F7_STM32F746G_DISCO_INCLUDE_BOARD_H */

View file

@ -90,7 +90,7 @@ static const uint32_t g_addressconfig[STM32_FMC_NADDRCONFIGS] =
GPIO_FMC_A5, GPIO_FMC_A6, GPIO_FMC_A7, GPIO_FMC_A8, GPIO_FMC_A9,
GPIO_FMC_A10, GPIO_FMC_A11,
GPIO_FMC_SDCKE0_1, GPIO_FMC_SDNE0_3, GPIO_FMC_SDNWE_3, GPIO_FMC_NBL0,
GPIO_FMC_SDCKE0, GPIO_FMC_SDNE0, GPIO_FMC_SDNWE, GPIO_FMC_NBL0,
GPIO_FMC_SDNRAS, GPIO_FMC_NBL1, GPIO_FMC_BA0, GPIO_FMC_BA1,
GPIO_FMC_SDCLK, GPIO_FMC_SDNCAS
};

View file

@ -76,8 +76,8 @@ static const uint32_t g_addressconfig[STM32_FMC_NADDRCONFIGS] =
GPIO_FMC_A10, GPIO_FMC_A11, GPIO_FMC_A12,
GPIO_FMC_NBL0, GPIO_FMC_NBL1, GPIO_FMC_NBL2, GPIO_FMC_NBL3, GPIO_FMC_BA0,
GPIO_FMC_BA1, GPIO_FMC_SDNWE_3, GPIO_FMC_SDNCAS, GPIO_FMC_SDNRAS,
GPIO_FMC_SDNE0_3, GPIO_FMC_SDCKE0_3, GPIO_FMC_SDCLK
GPIO_FMC_BA1, GPIO_FMC_SDNWE, GPIO_FMC_SDNCAS, GPIO_FMC_SDNRAS,
GPIO_FMC_SDNE0, GPIO_FMC_SDCKE0, GPIO_FMC_SDCLK
};
static const uint32_t g_dataconfig[STM32_FMC_NDATACONFIGS] =