arch/x86_64: handle TLB shootdown

arch/x86_64: handle TLB shootdown

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>

arch/x86_64/include/intel64/irq.h

@@ -359,6 +359,10 @@
 
 #define IRQ_MSI_START      IRQ32
 
+/* Use IRQ17 for TLB shootdown */
+
+#define SMP_IPI_TLBSHOOTDOWN_IRQ  IRQ17
+
 /* Common register save structure created by up_saveusercontext() and by
  * ISR/IRQ interrupt processing.
  */

arch/x86_64/src/common/CMakeLists.txt

@@ -29,7 +29,8 @@ set(SRCS
     x86_64_modifyreg32.c
     x86_64_nputs.c
     x86_64_switchcontext.c
-    x86_64_tcbinfo.c)
+    x86_64_tcbinfo.c
+    x86_64_tlb.c)
 
 if(CONFIG_ARCH_HAVE_FORK)
   list(APPEND SRCS x86_64_fork.c fork.S)

arch/x86_64/src/common/Make.defs

@@ -30,7 +30,7 @@ endif
 CMN_CSRCS += x86_64_allocateheap.c x86_64_copystate.c x86_64_exit.c
 CMN_CSRCS += x86_64_getintstack.c  x86_64_initialize.c x86_64_nputs.c
 CMN_CSRCS += x86_64_modifyreg8.c x86_64_modifyreg16.c x86_64_modifyreg32.c
-CMN_CSRCS += x86_64_switchcontext.c
+CMN_CSRCS += x86_64_switchcontext.c x86_64_tlb.c
 
 ifeq ($(CONFIG_ARCH_HAVE_FORK),y)
 CMN_CSRCS += x86_64_fork.c

arch/x86_64/src/common/x86_64_addrenv.c

@@ -460,6 +460,10 @@ int up_addrenv_create(size_t textsize, size_t datasize, size_t heapsize,
   SP_DSB();
   SP_DMB();
 
+#ifdef CONFIG_SMP
+  x86_64_tlb_shootdown();
+#endif
+
   return OK;
 
 errout:
@@ -554,6 +558,10 @@ int up_addrenv_destroy(arch_addrenv_t *addrenv)
   SP_DSB();
   SP_DMB();
 
+#ifdef CONFIG_SMP
+  x86_64_tlb_shootdown();
+#endif
+
   memset(addrenv, 0, sizeof(arch_addrenv_t));
   return OK;
 }

arch/x86_64/src/common/x86_64_internal.h

@@ -306,6 +306,11 @@ size_t x86_64_stack_check(void *stackbase, size_t nbytes);
 void x86_64_stack_color(void *stackbase, size_t nbytes);
 #endif
 
+/* TLB shootdown */
+
+int x86_64_tlb_handler(int irq, void *c, void *arg);
+void x86_64_tlb_shootdown(void);
+
 #endif /* __ASSEMBLY__ */
 
 #endif  /* __ARCH_X86_64_SRC_COMMON_UP_INTERNAL_H */

arch/x86_64/src/common/x86_64_tlb.c

@@ -0,0 +1,70 @@
+/****************************************************************************
+ * arch/x86_64/src/common/x86_64_tlb.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <nuttx/irq.h>
+#include <sched.h>
+
+#include "sched/sched.h"
+
+#include "x86_64_internal.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: x86_64_tlb_handler
+ *
+ * Description:
+ *   Reload CR3 to invalidate the TLB.
+ *
+ ****************************************************************************/
+
+int x86_64_tlb_handler(int irq, void *c, void *arg)
+{
+  volatile uint64_t cr3 = get_cr3();
+
+  set_cr3(cr3);
+
+  UNUSED(irq);
+  UNUSED(c);
+  UNUSED(arg);
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: x86_64_tlb_shootdown
+ ****************************************************************************/
+
+void x86_64_tlb_shootdown(void)
+{
+  cpu_set_t cpuset = ((1 << CONFIG_SMP_NCPUS) - 1);
+
+  CPU_CLR(this_cpu(), &cpuset);
+
+  up_trigger_irq(SMP_IPI_TLBSHOOTDOWN_IRQ, cpuset);
+}

arch/x86_64/src/intel64/intel64_cpu.c

@@ -423,4 +423,10 @@ void x86_64_cpu_priv_set(uint8_t cpu)
 
   write_msr(MSR_FMASK, X86_64_RFLAGS_IF | X86_64_RFLAGS_DF);
 #endif
+
+#ifdef CONFIG_SMP
+  /* Attach TLB shootdown handler */
+
+  irq_attach(SMP_IPI_TLBSHOOTDOWN_IRQ, x86_64_tlb_handler, NULL);
+#endif
 }