arch/x86_64/include/intel64/irq.h: align definitions

align all definitions in intel64/irq.h

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
This commit is contained in:
p-szafonimateusz 2024-11-26 12:32:26 +01:00 committed by Xiang Xiao
parent cfaeb74dd3
commit eeef185558

View file

@ -430,40 +430,40 @@
/* Data segments */
#define REG_FS (0 + XMMAREA_REG_OFFSET) /* " " "" " " "" " " " " */
#define REG_GS (1 + XMMAREA_REG_OFFSET) /* " " "" " " "" " " " " */
#define REG_ES (2 + XMMAREA_REG_OFFSET) /* " " "" " " "" " " " " */
#define REG_FS (0 + XMMAREA_REG_OFFSET)
#define REG_GS (1 + XMMAREA_REG_OFFSET)
#define REG_ES (2 + XMMAREA_REG_OFFSET)
#define REG_DS (3 + XMMAREA_REG_OFFSET) /* Data segment selector */
/* Remaining regs */
#define REG_RAX (4 + XMMAREA_REG_OFFSET) /* " " "" " " */
#define REG_RBX (5 + XMMAREA_REG_OFFSET) /* " " "" " " */
#define REG_RBP (6 + XMMAREA_REG_OFFSET) /* " " "" " " */
#define REG_R10 (7 + XMMAREA_REG_OFFSET) /* " " "" " " */
#define REG_R11 (8 + XMMAREA_REG_OFFSET) /* " " "" " " */
#define REG_R12 (9 + XMMAREA_REG_OFFSET) /* " " "" " " */
#define REG_R13 (10 + XMMAREA_REG_OFFSET) /* " " "" " " */
#define REG_R14 (11 + XMMAREA_REG_OFFSET) /* " " "" " " */
#define REG_R15 (12 + XMMAREA_REG_OFFSET) /* " " "" " " */
#define REG_RAX (4 + XMMAREA_REG_OFFSET)
#define REG_RBX (5 + XMMAREA_REG_OFFSET)
#define REG_RBP (6 + XMMAREA_REG_OFFSET)
#define REG_R10 (7 + XMMAREA_REG_OFFSET)
#define REG_R11 (8 + XMMAREA_REG_OFFSET)
#define REG_R12 (9 + XMMAREA_REG_OFFSET)
#define REG_R13 (10 + XMMAREA_REG_OFFSET)
#define REG_R14 (11 + XMMAREA_REG_OFFSET)
#define REG_R15 (12 + XMMAREA_REG_OFFSET)
/* ABI calling convention */
#define REG_R9 (13 + XMMAREA_REG_OFFSET) /* " " "" " " */
#define REG_R8 (14 + XMMAREA_REG_OFFSET) /* " " "" " " */
#define REG_RCX (15 + XMMAREA_REG_OFFSET) /* " " "" " " */
#define REG_RDX (16 + XMMAREA_REG_OFFSET) /* " " "" " " */
#define REG_RSI (17 + XMMAREA_REG_OFFSET) /* " " "" " " */
#define REG_RDI (18 + XMMAREA_REG_OFFSET) /* " " "" " " */
#define REG_R9 (13 + XMMAREA_REG_OFFSET)
#define REG_R8 (14 + XMMAREA_REG_OFFSET)
#define REG_RCX (15 + XMMAREA_REG_OFFSET)
#define REG_RDX (16 + XMMAREA_REG_OFFSET)
#define REG_RSI (17 + XMMAREA_REG_OFFSET)
#define REG_RDI (18 + XMMAREA_REG_OFFSET)
/* IRQ saved */
#define REG_ERRCODE (19 + XMMAREA_REG_OFFSET) /* Error code */
#define REG_RIP (20 + XMMAREA_REG_OFFSET) /* Pushed by process on interrupt processing */
#define REG_CS (21 + XMMAREA_REG_OFFSET) /* " " "" " " "" " " " " */
#define REG_RFLAGS (22 + XMMAREA_REG_OFFSET) /* " " "" " " "" " " " " */
#define REG_RSP (23 + XMMAREA_REG_OFFSET) /* " " "" " " "" " " " " */
#define REG_SS (24 + XMMAREA_REG_OFFSET) /* " " "" " " "" " " " " */
#define REG_CS (21 + XMMAREA_REG_OFFSET)
#define REG_RFLAGS (22 + XMMAREA_REG_OFFSET)
#define REG_RSP (23 + XMMAREA_REG_OFFSET)
#define REG_SS (24 + XMMAREA_REG_OFFSET)
#define XMMAREA_REGS (25)
@ -475,7 +475,8 @@
* way to pass parameters from the interrupt handler to C code.
*/
#define XCPTCONTEXT_REGS (XMMAREA_REGS + XMMAREA_REG_ALIGN + \
#define XCPTCONTEXT_REGS (XMMAREA_REGS + \
XMMAREA_REG_ALIGN + \
XCPTCONTEXT_XMM_AREA_SIZE / 8)
#define XCPTCONTEXT_SIZE (8 * XCPTCONTEXT_REGS)
@ -501,7 +502,7 @@ enum ioapic_trigger_mode
{
TRIGGER_RISING_EDGE = 0,
TRIGGER_FALLING_EDGE = (1 << 13),
TRIGGER_LEVEL_ACTIVE_HIGH = 1 << 15,
TRIGGER_LEVEL_ACTIVE_HIGH = (1 << 15),
TRIGGER_LEVEL_ACTIVE_LOW = (1 << 15) | (1 << 13),
};