arch/x86_64/include/intel64/irq.h: align definitions
align all definitions in intel64/irq.h Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
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1 changed files with 356 additions and 355 deletions
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@ -430,40 +430,40 @@
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/* Data segments */
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#define REG_FS (0 + XMMAREA_REG_OFFSET) /* " " "" " " "" " " " " */
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#define REG_GS (1 + XMMAREA_REG_OFFSET) /* " " "" " " "" " " " " */
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#define REG_ES (2 + XMMAREA_REG_OFFSET) /* " " "" " " "" " " " " */
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#define REG_FS (0 + XMMAREA_REG_OFFSET)
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#define REG_GS (1 + XMMAREA_REG_OFFSET)
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#define REG_ES (2 + XMMAREA_REG_OFFSET)
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#define REG_DS (3 + XMMAREA_REG_OFFSET) /* Data segment selector */
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/* Remaining regs */
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#define REG_RAX (4 + XMMAREA_REG_OFFSET) /* " " "" " " */
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#define REG_RBX (5 + XMMAREA_REG_OFFSET) /* " " "" " " */
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#define REG_RBP (6 + XMMAREA_REG_OFFSET) /* " " "" " " */
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#define REG_R10 (7 + XMMAREA_REG_OFFSET) /* " " "" " " */
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#define REG_R11 (8 + XMMAREA_REG_OFFSET) /* " " "" " " */
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#define REG_R12 (9 + XMMAREA_REG_OFFSET) /* " " "" " " */
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#define REG_R13 (10 + XMMAREA_REG_OFFSET) /* " " "" " " */
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#define REG_R14 (11 + XMMAREA_REG_OFFSET) /* " " "" " " */
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#define REG_R15 (12 + XMMAREA_REG_OFFSET) /* " " "" " " */
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#define REG_RAX (4 + XMMAREA_REG_OFFSET)
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#define REG_RBX (5 + XMMAREA_REG_OFFSET)
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#define REG_RBP (6 + XMMAREA_REG_OFFSET)
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#define REG_R10 (7 + XMMAREA_REG_OFFSET)
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#define REG_R11 (8 + XMMAREA_REG_OFFSET)
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#define REG_R12 (9 + XMMAREA_REG_OFFSET)
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#define REG_R13 (10 + XMMAREA_REG_OFFSET)
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#define REG_R14 (11 + XMMAREA_REG_OFFSET)
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#define REG_R15 (12 + XMMAREA_REG_OFFSET)
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/* ABI calling convention */
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#define REG_R9 (13 + XMMAREA_REG_OFFSET) /* " " "" " " */
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#define REG_R8 (14 + XMMAREA_REG_OFFSET) /* " " "" " " */
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#define REG_RCX (15 + XMMAREA_REG_OFFSET) /* " " "" " " */
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#define REG_RDX (16 + XMMAREA_REG_OFFSET) /* " " "" " " */
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#define REG_RSI (17 + XMMAREA_REG_OFFSET) /* " " "" " " */
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#define REG_RDI (18 + XMMAREA_REG_OFFSET) /* " " "" " " */
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#define REG_R9 (13 + XMMAREA_REG_OFFSET)
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#define REG_R8 (14 + XMMAREA_REG_OFFSET)
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#define REG_RCX (15 + XMMAREA_REG_OFFSET)
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#define REG_RDX (16 + XMMAREA_REG_OFFSET)
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#define REG_RSI (17 + XMMAREA_REG_OFFSET)
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#define REG_RDI (18 + XMMAREA_REG_OFFSET)
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/* IRQ saved */
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#define REG_ERRCODE (19 + XMMAREA_REG_OFFSET) /* Error code */
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#define REG_RIP (20 + XMMAREA_REG_OFFSET) /* Pushed by process on interrupt processing */
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#define REG_CS (21 + XMMAREA_REG_OFFSET) /* " " "" " " "" " " " " */
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#define REG_RFLAGS (22 + XMMAREA_REG_OFFSET) /* " " "" " " "" " " " " */
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#define REG_RSP (23 + XMMAREA_REG_OFFSET) /* " " "" " " "" " " " " */
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#define REG_SS (24 + XMMAREA_REG_OFFSET) /* " " "" " " "" " " " " */
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#define REG_CS (21 + XMMAREA_REG_OFFSET)
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#define REG_RFLAGS (22 + XMMAREA_REG_OFFSET)
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#define REG_RSP (23 + XMMAREA_REG_OFFSET)
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#define REG_SS (24 + XMMAREA_REG_OFFSET)
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#define XMMAREA_REGS (25)
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@ -475,7 +475,8 @@
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* way to pass parameters from the interrupt handler to C code.
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*/
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#define XCPTCONTEXT_REGS (XMMAREA_REGS + XMMAREA_REG_ALIGN + \
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#define XCPTCONTEXT_REGS (XMMAREA_REGS + \
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XMMAREA_REG_ALIGN + \
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XCPTCONTEXT_XMM_AREA_SIZE / 8)
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#define XCPTCONTEXT_SIZE (8 * XCPTCONTEXT_REGS)
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@ -501,7 +502,7 @@ enum ioapic_trigger_mode
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{
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TRIGGER_RISING_EDGE = 0,
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TRIGGER_FALLING_EDGE = (1 << 13),
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TRIGGER_LEVEL_ACTIVE_HIGH = 1 << 15,
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TRIGGER_LEVEL_ACTIVE_HIGH = (1 << 15),
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TRIGGER_LEVEL_ACTIVE_LOW = (1 << 15) | (1 << 13),
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};
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