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463 commits

Author SHA1 Message Date
Ville Juven
8fe3ab3e39 arch/arm64: Remove arm64_copystate.c 
The file is not referenced from anywhere and is obsolete / dead code anyway
-> remove it from the index.
 2024-10-17 18:07:54 +08:00
lipengfei28
ef350afd28 Revert "arch/arm64: add CONFIG_ARCH_VMA_MAPPING" 
This reverts commit e7326cfa62.
 2024-10-17 12:28:58 +08:00
Jukka Laitinen
d6c795dda3 imx9/flexcan: Make self reception disable to be configurable 
Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
 2024-10-17 09:02:17 +08:00
Xiang Xiao
c6aed84638 tools: Rename apps-or-nuttx-Make.defs to Make.defs 
follow the same pattern as other Make.defs files

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2024-10-17 07:55:02 +08:00
yangsong8
8c13b8df1d syslog: convert \n to \r\n in syslog framework layer 
Signed-off-by: yangsong8 <yangsong8@xiaomi.com>
 2024-10-17 02:29:51 +08:00
Jukka Laitinen
6a5b395459 arch/arm64/src/imx9: Add initial version of canbus driver 
Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
 2024-10-16 15:43:19 +08:00
Jukka Laitinen
bcfdb58686 arch/arm64/src/common/arm64_initialize.c: Add initializing of socket can interface 
Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
 2024-10-16 15:43:19 +08:00
ouyangxiangzhen
a45f903650 imx8qm-mek: Resolve boot issue for non-EL3 environments. 
This commit addresses the issue of unauthorized writes to cntfrq_el0 during boot when not in EL3 mode.

Signed-off-by: ouyangxiangzhen <ouyangxiangzhen@xiaomi.com>
 2024-10-16 13:54:44 +08:00
hujun5
aa0346610b arm64: we need to initialize the percpu register storing the current task more earlier. 
A call stack looks like the following:
sched_idletask
syslog_write
nx_vsyslog
syslog
getreg64
gic_validate_redist_version
arm64_gic_init
arm64_gic_secondary_init
arm64_boot_secondary_c_routine

Signed-off-by: hujun5 <hujun5@xiaomi.com>
 2024-10-15 15:25:55 +08:00
hujun5
948ac9b4cc arm64: add up_this_task and up_change_task macro impl 
Signed-off-by: hujun5 <hujun5@xiaomi.com>
 2024-10-15 15:25:55 +08:00
hujun5
d77cb8af70 sched: fix nxsched_process_delivered did not call hook 
Signed-off-by: hujun5 <hujun5@xiaomi.com>
 2024-10-15 01:50:06 +08:00
Xu Xingliang
632feb2b51 arch/arm64: remove struct regs_context 
Signed-off-by: Xu Xingliang <xuxingliang@xiaomi.com>
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
 2024-10-14 23:05:56 +08:00
xuxingliang
f031dc39a6 arch/arm64: fix build warnings 
common/arm64_mpu.c:355:13: error: format '%llX' expects argument of type 'long long unsigned int', but argument 4 has type 'long unsigned int' [-Werror=format=]
  355 |       _info("MPU-%d, 0x%08llX-0x%08llX SH=%llX AP=%llX XN=%llX\n", i,
      |             ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
common/arm64_mpu.c:355:29: note: format string is defined here
  355 |       _info("MPU-%d, 0x%08llX-0x%08llX SH=%llX AP=%llX XN=%llX\n", i,
      |                        ~~~~~^
      |                             |
      |                             long long unsigned int
      |                        %08lX
common/arm64_mpu.c:355:13: error: format '%llX' expects argument of type 'long long unsigned int', but argument 5 has type 'long unsigned int' [-Werror=format=]
  355 |       _info("MPU-%d, 0x%08llX-0x%08llX SH=%llX AP=%llX XN=%llX\n", i,
      |             ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
common/arm64_mpu.c:355:38: note: format string is defined here
  355 |       _info("MPU-%d, 0x%08llX-0x%08llX SH=%llX AP=%llX XN=%llX\n", i,

Signed-off-by: xuxingliang <xuxingliang@xiaomi.com>
 2024-10-14 17:59:56 +08:00
chao an
7288a8d000 arch/arm64: add support to config SPI interrupt affinity routing to CPU0 by default 
Signed-off-by: chao an <anchao@lixiang.com>
 2024-10-14 17:58:13 +08:00
chao an
83c483c1b4 arch/armv8-a: new config to set SPIs Configuration to edge-triggered 
Configure all SPIs(Shared Peripheral Interrupts) as edge-triggered by default

Signed-off-by: chao an <anchao@lixiang.com>
 2024-10-14 17:58:13 +08:00
xuxingliang
d655569a7c cmake: add newly added sources to cmake 
These newly added files are missing from cmake.

Signed-off-by: xuxingliang <xuxingliang@xiaomi.com>
 2024-10-14 17:19:45 +08:00
chenzhijia
505adfa277 nuttx:move "#define STRINGIFY(x)" to nuttx/macro.h 
Franklin requirement, "#define STRINGIFY(x)" conflicts with https://github.com/mborgerding/kissfft define

Signed-off-by: chenzhijia <chenzhijia@xiaomi.com>
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
 2024-10-13 03:16:25 +08:00
lipengfei28
e7326cfa62 arch/arm64: add CONFIG_ARCH_VMA_MAPPING 
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
 2024-10-13 02:09:38 +08:00
anjiahao
e5f9b42ea0 binfmt/libelf:Remove libelf implementation [2/2] 
this commit is part two, all logic move to modlib, so we can remove it.
and change all use defconfig

Signed-off-by: anjiahao <anjiahao@xiaomi.com>
 2024-10-12 12:29:06 +08:00
lipengfei28
78a6ba6d5f PFU: do not cause execution of any instructions to be trapped 
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
 2024-10-11 17:04:28 +08:00
Bowen Wang
313d6df787 include/nuttx.h: replace all the align macros to nuttx version 
1. add IS_ALIGNED()  definitions for NuttX;
2. replace all the ALIGN_UP() and ALIGN_DOWN() to use common
   align implementation;

Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
 2024-10-11 16:55:43 +08:00
lipengfei28
274ca2ea65 arch: arm64: Fix ARM64_CONTEXT_REGS number 
This commit fixes the regression in https://github.com/apache/nuttx/pull/14063

Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
 2024-10-11 13:26:54 +08:00
Xu Xingliang
f68d594420 arch/arm64: rename register names to align with arm32 
Signed-off-by: Xu Xingliang <xuxingliang@xiaomi.com>
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
 2024-10-11 01:17:24 +08:00
yinshengkai
02eb280302 arch/perf: modify the return value of up_perf_gettime to clock_t 
When using alarm_arch implementation, 64-bit time can be returned. Using unsign long will cause precision loss.

Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
 2024-10-10 23:17:14 +08:00
yinshengkai
d375a09c0a libs: add gprof arm64 support 
Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
 2024-10-10 18:46:51 +08:00
wangming9
1c2856dfcb arch/arm64: Fixed up_getusrsp getting stack Pointers 
Signed-off-by: wangming9 <wangming9@xiaomi.com>
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
 2024-10-10 15:40:03 +08:00
wangming9
b0ea6840e1 arch/arm64: Use serr to print fatal error messages. 
Summary:
sinfo cannot print fatal error messages when CONFIG_DEBUG_SCHED_INFO is turned off.

Signed-off-by: wangming9 <wangming9@xiaomi.com>
 2024-10-10 15:40:03 +08:00
wangming9
27d77b1aca arch/arm64: Fixed GIC3 for goldfish platform 
Signed-off-by: wangming9 <wangming9@xiaomi.com>
 2024-10-10 15:40:03 +08:00
wangming9
b3e640cf3f arch/arm64: GICv2 detection is compatible with different qemu versions 
Summary:
- GICv2 cannot be detected on the golsfish platform
- Golsfish uses version 2.12.0 of qemu with a GICC_IIDR value of 0,
  read ICPIDR2 to determine the GIC version

Signed-off-by: wangming9 <wangming9@xiaomi.com>
 2024-10-10 15:40:03 +08:00
Bowen Wang
a847ee1675 qmeu_boot: add rpmsg syslog init for arm64 qemu chip 
Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
 2024-10-10 15:40:03 +08:00
wangming9
e48b81ebe9 arch/arm64: Supports cluster PMU 
Summary:
Some processors implement cluster PMUs, such as Cortex-R82.

Signed-off-by: wangming9 <wangming9@xiaomi.com>
 2024-10-10 15:40:03 +08:00
wangming9
fa96350574 arch/arm64: Modify the method for obtaining the CPU frequency 
Summary:
1、cntfrq_el0 is used to store the timer frequency, which may
   be different from the CPU frequency.
2、Do not use up_perf interface for SMP.

Signed-off-by: wangming9 <wangming9@xiaomi.com>
 2024-10-10 15:40:03 +08:00
yangguangcai
e9b77833e3 goldfish:config pl031. 
Signed-off-by: yangguangcai <yangguangcai@xiaomi.com>
 2024-10-10 15:40:03 +08:00
hujun5
e249dd2672 arch: support customized up_cpu_index() in AMP mode 
Some app with same code runs on different cores in AMP mode,
need the physical core on which the function is called.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
Signed-off-by: fangxinyong <fangxinyong@xiaomi.com>
 2024-10-10 02:38:40 +08:00
yinshengkai
034af29aab arch: adjust gcov configuration name 
Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
 2024-10-09 21:27:47 +08:00
ligd
784937a03c arm64: fix backtrace failed 
Signed-off-by: ligd <liguiding1@xiaomi.com>
 2024-10-09 20:47:43 +08:00
Bowen Wang
f172f222be arm64_checkstack: fix crash, optimize the stack color, sync with arm 
Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
Signed-off-by: ligd <liguiding1@xiaomi.com>
 2024-10-09 20:47:43 +08:00
wangming9
3054b1ad51 arch/arm64: Fixed arm64_cache_get_info obtaining cache. 
Summary:
Select icache or dcache by setting register csselr_el1.

Signed-off-by: wangming9 <wangming9@xiaomi.com>
Signed-off-by: ligd <liguiding1@xiaomi.com>
 2024-10-09 20:47:43 +08:00
wangming9
cb62c783a9 arch/arm64: Add the interface for icache and dcache. 
Summary:
Add up_get_icache_size、up_invalidate_icache、up_get_dcache_size

Signed-off-by: wangming9 <wangming9@xiaomi.com>
Signed-off-by: ligd <liguiding1@xiaomi.com>
 2024-10-09 20:47:43 +08:00
wangmingrong1
0866010101 arm64/makefile: No longer using hwasan pile insertion 
Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com>
 2024-10-09 18:15:13 +08:00
ligd
26dc3b297a arm64: exclude mpu from sanitize for SMP mode 
CPU0 boot -> mm_init() -> sannitize on -> boot other CPUs
CPU1 boot -> mpu_init -> error

Signed-off-by: ligd <liguiding1@xiaomi.com>
 2024-10-09 18:15:13 +08:00
ligd
e9617583bc arm64-r/mpu: add TBI setting to r82 when use SW_TAG 
Signed-off-by: ligd <liguiding1@xiaomi.com>
 2024-10-09 18:15:13 +08:00
lipengfei28
56495bc9ce The gicv2m spinlock init status should unlocked 
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
 2024-10-09 15:07:37 +08:00
chenzhijia
a443a37390 drivers/coresight:ETM4 setup 
Signed-off-by: chenzhijia <chenzhijia@xiaomi.com>
 2024-10-09 08:37:48 +08:00
anjiahao
9ed93c6b1e unify MODULE & ELF flag to Toolchain.defs 
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
 2024-10-08 19:56:33 +08:00
yinshengkai
f26ae83900 arch/irq: add the up_getusrpc macro to get the PC of the interrupted thread in the interrupt 
Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
Signed-off-by: ligd <liguiding1@xiaomi.com>
 2024-10-08 19:55:28 +08:00
buxiasen
0b3859521a arch: fix the sched parameter update when exiting 
Signed-off-by: buxiasen <buxiasen@xiaomi.com>
 2024-10-08 13:53:06 +08:00
ligd
ba3a55b445 cache: do cache_invalidate_all before enable dcache 
Signed-off-by: ligd <liguiding1@xiaomi.com>
 2024-10-08 08:15:41 +08:00
hujun5
31a3cea64a arch: rename xxxx_pause.c to xxxx_smpcall.c 
Signed-off-by: hujun5 <hujun5@xiaomi.com>
 2024-10-08 08:13:22 +08:00
hujun5
d8cb7759b6 arch: remove up_cpu_pause up_cpu_resume up_cpu_paused up_cpu_pausereq 
reason:
  To remove the "sync pause" and decouple the critical section from the dependency on enabling interrupts,
  after that we need to further implement "schedlock + spinlock".
changelist
  1 Modify the implementation of critical sections to no longer involve enabling interrupts or handling synchronous pause events.
  2 GIC_SMP_CPUCALL attach to pause handler to remove arch interface up_cpu_paused_restore up_cpu_paused_save
  3 Completely remove up_cpu_pause, up_cpu_resume, up_cpu_paused, and up_cpu_pausereq
  4 change up_cpu_pause_async to up_send_cpu_sgi

Signed-off-by: hujun5 <hujun5@xiaomi.com>
 2024-10-08 08:13:22 +08:00