Commit graph

7291 commits

Author SHA1 Message Date
yangyalei
3e6ba4c17c audio: add AUDIO_MSG_IOERR msg to meida service
Signed-off-by: yangyalei <yangyalei@xiaomi.com>
2024-09-30 08:43:22 +08:00
anjiahao
29e4e71167 modlib/dlfcn:unify same code
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2024-09-29 15:06:54 +08:00
dongjiuzhu1
fc1aefbeb3 libc/modlib: free memory resource when rmmod elf
Signed-off-by: dongjiuzhu1 <dongjiuzhu1@xiaomi.com>
2024-09-29 15:06:54 +08:00
dongjiuzhu1
1f1d90de1c binfmt/modlib: support loading each sections to different memory for Relocate object
The feature depends on ARCH_USE_SEPARATED_SECTION
the different memory area has different access speed and cache
capability, so the arch can custom allocate them based on
section names to achieve performance optimization

test:
sim:elf
sim:sotest

Signed-off-by: dongjiuzhu1 <dongjiuzhu1@xiaomi.com>
2024-09-29 15:06:54 +08:00
hujun5
9de9f8168d sched: change the SMP scheduling policy from synchronous to asynchronous
reason:
Currently, if we need to schedule a task to another CPU, we have to completely halt the other CPU,
manipulate the scheduling linked list, and then resume the operation of that CPU. This process is both time-consuming and unnecessary.

During this process, both the current CPU and the target CPU are inevitably subjected to busyloop.

The improved strategy is to simply send a cross-core interrupt to the target CPU.
The current CPU continues to run while the target CPU responds to the interrupt, eliminating the certainty of a busyloop occurring.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-09-29 08:54:51 +08:00
hujun5
4c69bb8cc7 arch: inline up_switch_context,in arm arm64
reason:
when a context switch occurs, up_switch_context is executed.
In order to reduce the time taken for context switching,
we inline the up_switch_context function.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-09-28 19:08:15 +08:00
chenxiaoyi
065046b2a2 serial: use hostfs read/write on stdio as uart
This is used to implement serial console on instruction set simulator (ISS).

Signed-off-by: chenxiaoyi <chenxiaoyi@xiaomi.com>
2024-09-28 13:53:06 +08:00
yezhonghui
db19d00e64 QemuEPC support multi function for pci device
Signed-off-by: yezhonghui <yezhonghui@xiaomi.com>
2024-09-28 13:39:50 +08:00
Bowen Wang
0e3a96a398 include/pci.h: sync the subvendor/subdevice type in id table and pci_device_s
Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-09-28 13:34:33 +08:00
yezhonghui
f6db814804 pci: add pci endpoint test driver
Signed-off-by: yezhonghui <yezhonghui@xiaomi.com>
2024-09-28 13:13:37 +08:00
yangguangcai
9a84484df5 capture:add multiple register.
Signed-off-by: yangguangcai <yangguangcai@xiaomi.com>
2024-09-28 13:11:52 +08:00
yangguangcai
fd47add2a3 capture:add CAPIOC_ALL for ioctl.
When monitoring multiple capture channels, the `ioctl` function
is called three times, leading to significant overhead mainly due
to VFS and `nxmutex_lock/unlock`. Adding a new interface can save
the overhead of two `ioctl` calls.

Signed-off-by: yangguangcai <yangguangcai@xiaomi.com>
2024-09-28 13:11:52 +08:00
makejian
5b1d910ec6 nuttx/crypto: export asynchronous calling process
Signed-off-by: makejian <makejian@xiaomi.com>
2024-09-28 13:05:28 +08:00
Bowen Wang
23a4a23397 devicetree/fdt_pci: implement the fdt_pci_ecam_register()
So the borad level do not need implement the
pci_ecam_register_from_fdt() again and again.

Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-09-28 11:51:33 +08:00
nuttxs
c0403ed768 1.xtensa/esp32s3: configure the number of universal management
(IEEE) MAC addresses when there are multipleinterfaces.
2.Optimize Lan9250 to adapt to ESP32S3 universalMAC address.
2024-09-28 11:47:24 +08:00
dulibo1
9d8991dd29 power:add BATIO_OPRTN_CHARGER_STATE for gauge sync charger state.
Signed-off-by: dulibo1 <dulibo1@xiaomi.com>
2024-09-28 11:25:17 +08:00
liangdongdong
5238f2c200 feature: charge: Add battery operate
Signed-off-by: liangdongdong<liangdongdong@xiaomi.com>
2024-09-28 11:25:17 +08:00
dulibo1
797df22802 power:add default protocol for the driver which not impl get_protocol
add default protocol for the driver which not impl get_protocol

Signed-off-by: dulibo1 <dulibo1@xiaomi.com>
2024-09-28 11:25:17 +08:00
yinshengkai
d888df9673 note: add ringbuffer aligned access handle
Fix ubsan warning that writes need to be aligned to memory boundaries when writing data

Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
2024-09-28 11:08:39 +08:00
dulibo1
e5e4e3030e power:add extern for public function prototypes
Signed-off-by: dulibo1 <dulibo1@xiaomi.com>
Signed-off-by: buxiasen <buxiasen@xiaomi.com>
2024-09-28 11:03:48 +08:00
dulibo1
347154c01e clk:optimized the clk_set_rate for mux
clk_mux_determine_rate->clk_get_parent_by_index

this path consume time too much

Signed-off-by: dulibo1 <dulibo1@xiaomi.com>
2024-09-28 10:38:55 +08:00
yanghuatao
ae4865cf54 nuttx/timers: Fix green hills build timer.h error
"/mnt/yang/qixinwei_commit/nuttx/include/nuttx/timers/timer.h", line 257: error #223-D:
          function DEBUGASSERT declared implicitly
    DEBUGASSERT(lower->ops->tick_getstatus);

Signed-off-by: yanghuatao <yanghuatao@xiaomi.com>
2024-09-27 23:45:27 +08:00
guoshichao
03cabdb102 armv7-m/irq: fix the greenhills compiler compile error
CXX:  libcxxmini/libxx_new.cxx "/home/guoshichao/work_profile/vela_os/vela_qemu_1/nuttx/include/arch/armv7-m/irq.h", line 594: error #3422:
          use of the "register" storage class specifier is not allowed
    register uint32_t sp;
    ^

"/home/guoshichao/work_profile/vela_os/vela_qemu_1/nuttx/include/arch/armv7-m/irq.h", line 594: error #3422:
          use of the "register" storage class specifier is not allowed
    register uint32_t sp;
    ^

"/home/guoshichao/work_profile/vela_os/vela_qemu_1/nuttx/include/arch/armv7-m/irq.h", line 594: error #3422:
          use of the "register" storage class specifier is not allowed
    register uint32_t sp;
    ^

make[1]: *** [Makefile:69: libxx_delete_sized.o] Error 1
make[1]: *** Waiting for unfinished jobs....
make[1]: *** [Makefile:69: libxx_deletea_sized.o] Error 1
make[1]: *** [Makefile:69: libxx_new.o] Error 1
"/home/guoshichao/work_profile/vela_os/vela_qemu_1/nuttx/include/arch/armv7-m/irq.h", line 594: error #3422:
          use of the "register" storage class specifier is not allowed
    register uint32_t sp;
    ^

"/home/guoshichao/work_profile/vela_os/vela_qemu_1/nuttx/include/arch/armv7-m/irq.h", line 594: error #3422:
          use of the "register" storage class specifier is not allowed
    register uint32_t sp;
    ^

Signed-off-by: guoshichao <guoshichao@xiaomi.com>
2024-09-27 19:37:24 +08:00
yanghuatao
41d0eaa892 toolchain/ghs: Fix ?? "trigraphs not allowed" warnings
"/mnt/yang/qixinwei_vela_warnings_04_23/nuttx/include/nuttx/pci/pci_regs.h", line 263: warning #1695-D:
          trigraphs not allowed
  #define  PCI_PM_CTRL_DATA_SEL_MASK        0x1e00  /* Data select (??) */
                                                                    ^

"/mnt/yang/qixinwei_vela_warnings_04_23/nuttx/include/nuttx/pci/pci_regs.h", line 264: warning #1695-D:
          trigraphs not allowed
  #define  PCI_PM_CTRL_DATA_SCALE_MASK      0x6000  /* Data scale (??) */
                                                                   ^

"/mnt/yang/qixinwei_vela_warnings_04_23/nuttx/include/nuttx/pci/pci_regs.h", line 266: warning #1695-D:
          trigraphs not allowed
  #define PCI_PM_PPB_EXTENSIONS             6       /* PPB support extensions (??) */
                                                                               ^

"/mnt/yang/qixinwei_vela_warnings_04_23/nuttx/include/nuttx/pci/pci_regs.h", line 267: warning #1695-D:
          trigraphs not allowed
  #define  PCI_PM_PPB_B2_B3                 0x40    /* Stop clock when in D3hot (??) */
                                                                                 ^

"/mnt/yang/qixinwei_vela_warnings_04_23/nuttx/include/nuttx/pci/pci_regs.h", line 268: warning #1695-D:
          trigraphs not allowed
  #define  PCI_PM_BPCC_ENABLE               0x80    /* Bus power/clock control enable (??) */
                                                                                       ^

"/mnt/yang/qixinwei_vela_warnings_04_23/nuttx/include/nuttx/pci/pci_regs.h", line 269: warning #1695-D:
          trigraphs not allowed
  #define PCI_PM_DATA_REGISTER              7       /* (??) */

Signed-off-by: yanghuatao <yanghuatao@xiaomi.com>
2024-09-27 17:12:09 +08:00
Bowen Wang
97740fca2c include/pci_regs: add PCI_STD_NUM_BARS macro
Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-09-27 17:12:09 +08:00
zhangkai25
bfd6185f4a add adc_receive_all just for adc_dma
Description: No longer transmitting data to fifo in a loop, complete transmission in one go

Signed-off-by: zhangkai25 <zhangkai25@xiaomi.com>
2024-09-27 14:42:45 +08:00
zhangkai25
b584b38983 add adc_fifo_size when it over 300
Signed-off-by: zhangkai25 <zhangkai25@xiaomi.com>
2024-09-27 14:42:45 +08:00
likun17
329d121d50 sensor: Added 6dof motion and gesture related types.
For details, see: https://developer.android.com/reference/android/hardware/SensorEvent#values

Signed-off-by: likun17 <likun17@xiaomi.com>
2024-09-27 13:59:41 +08:00
likun17
709cbe26f5 inlclude/uorb.h:Update data types to be sorted by macro definition.
Signed-off-by: likun17 <likun17@xiaomi.com>
2024-09-27 13:59:41 +08:00
likun17
e7e2474614 sensor:sensor info power max_range and resolution are unified with Android type.
0e67aa0cae:include_all/hardware/sensors.h

Nuttx    <-------------------------------> Android
int32_t  <-- version                   --> int
float    <-- power                     --> float
float    <-- max_range                 --> float
float    <-- resolution                --> float
int32_t  <-- min_delay                 --> int32_t
int32_t  <-- max_delay                 --> int32/64_t
uint32_t <-- fifo_reserved_event_count --> uint32_t
uint32_t <-- fifo_max_event_count      --> uint32_t
char[]   <-- name                      --> char*
char[]   <-- vendor                    --> char*

Signed-off-by: likun17 <likun17@xiaomi.com>
2024-09-27 13:59:41 +08:00
dongjiuzhu1
899eeb3c35 nuttx/uorb.h: align sensor_type value with aosp
refs:0e67aa0cae:include_all/hardware/sensors-base.h

Signed-off-by: dongjiuzhu1 <dongjiuzhu1@xiaomi.com>
2024-09-27 13:59:41 +08:00
lipengfei28
0bf2c9c514 pci_epf_driver_s use FAR const struct pci_epf_ops_s *ops
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-09-27 10:37:31 +08:00
lipengfei28
9d425eb521 pci epc mem use virtual mem
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-09-27 10:37:31 +08:00
lipengfei28
aa3568f353 pci epf use epc_node link to epc
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-09-27 10:37:31 +08:00
lipengfei28
06a5103838 pci_epf_device_s and pci_epc_ctrl_s add priv data
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-09-27 10:37:31 +08:00
likun17
65264051aa stdio/va_format: move non-standard structure va_format to nuttx/streams.h
Signed-off-by: likun17 <likun17@xiaomi.com>
Signed-off-by: dongjiuzhu1 <dongjiuzhu1@xiaomi.com>
2024-09-27 10:29:22 +08:00
Xiang Xiao
e105773f7e can: Merge cd_error and rx_overflow into rx_error
so the error could dispath to each client without interference

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2024-09-27 09:01:06 +08:00
lipengfei28
57d736b149 add epf test drv
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-09-27 08:52:59 +08:00
lipengfei28
56f57e5f9b add pci irq interface
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-09-27 00:10:19 +08:00
guoshichao
956830170d greenhills: fix the data type align build error
"/home/guoshichao/work_profile/vela_os/vela_car_5/nuttx/include/nuttx/crypto/blake2s.h", line 91: error #2118-D:
          this attribute reduces the alignment of the typedef, and while that
          will be respected for struct/field layout, the compiler will not
          generate code to handle misaligned accesses for objects of this type
  typedef uint32_t uint32_alias_t __attribute__((may_alias)) aligned_data(1);
                                                             ^

Signed-off-by: guoshichao <guoshichao@xiaomi.com>
2024-09-26 23:00:21 +08:00
lipengfei28
1eb151bef6 add pci_bus_map_region and pci_map_region macro
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-09-26 16:23:18 +08:00
wangyongrong
3b09de844f pci.h: add pci_map_bar_region support
Signed-off-by: wangyongrong <wangyongrong@xiaomi.com>
2024-09-26 16:23:18 +08:00
chao an
9abe737ef3 syslog/channel: add constant attribute if SYSLOG_IOCTL is not enabled
move all private channel define from data to rodata

Signed-off-by: chao an <anchao@lixiang.com>
2024-09-26 16:10:29 +08:00
Bowen Wang
4bfa73f842 include/nuttx/rptun/rptun.h: change offset type to uint32_t
Sync the offset data type with resource table defined in OpenAMP
and Linux.

Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-09-26 00:04:05 +08:00
mazhuang
4fa1c460d3 rptun/rptun_ivshmem:add restart cmd to reboot slave
Master can send restart command to slave to reboot the slave core

Signed-off-by: mazhuang <mazhuang@xiaomi.com>
Signed-off-by: Yongrong Wang <wangyongrong@xiaomi.com>
2024-09-26 00:04:05 +08:00
Bowen Wang
dbe43b0ae9 rptun: move rptun cmd definition before the resource table
Because locate the command at the end the resource table is unfriendly
when we want to support multi virtio devices instead only one virtio
rpmsg device.

Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-09-26 00:04:05 +08:00
Yongrong Wang
10e8b6c9f6 rptun/rpmsg_virtio: remove chip cmd and reuse the common ones
Add more common command for rptun and rpmsg_virtio frameworks,
also modify the rptun and rpmsg_virtio driver to use the common
commands.

Signed-off-by: Yongrong Wang <wangyongrong@xiaomi.com>
2024-09-26 00:04:05 +08:00
Yongrong Wang
7c7d08d13a rptun.c/rpmsg_virtio.c: move panic logic from chip to rptun/rpmsg_virtio
Move the panic logic in common places, later we can move more logic to
the framework instead of having the drivers implement it repeatedly.

Signed-off-by: Yongrong Wang <wangyongrong@xiaomi.com>
Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-09-26 00:04:05 +08:00
Bowen Wang
1a97fa73f0 rptun: rptun pm and rptun dump support cacheable memory
Should invalidate the memory when the data is located in shared
memory and write by remote core.

Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-09-26 00:04:05 +08:00
yanghuatao
520bb6544e nuttx/dirvers: Add secure rptun file
rptun secure is a rptun driver used for the rpmsg communication
between (Non-Secure) REE and (Secure) TEE environments.

Signed-off-by: yanghuatao <yanghuatao@xiaomi.com>
Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-09-26 00:04:05 +08:00