Commit graph

23119 commits

Author SHA1 Message Date
hujun5
42d2a27621 esp32s3_rtc: use small lock in arch/xtensa/src/esp32s3/esp32s3_rtc.c
reason:
We would like to replace the big lock with a small lock.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-17 18:13:35 +08:00
hujun5
9f449d2da4 lc823450_rtc: use small lock in arch/arm/src/lc823450/lc823450_rtc.c
reason:
We would like to replace the big lock with a small lock.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-17 18:13:35 +08:00
hujun5
6bcf698615 esp32c3_rtc: use small lock in arch/risc-v/src/esp32c3-legacy/esp32c3_rtc.c
reason:
We would like to replace the big lock with a small lock.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-17 18:13:35 +08:00
hujun5
9ae786ca95 max32660_rtc: change spinlock name g_lock -> g_rtc_lock
Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-17 18:13:35 +08:00
Alin Jerpelea
58bc6d5ec3 arch/esp32c3-legacy/esp32c3_ice40: migrate to SPDX identifier
Most tools used for compliance and SBOM generation use SPDX identifiers
This change brings us a step closer to an easy SBOM generation.

Copyright and Author information is missing from the License and was filled with
commit authorship
    Signed-off-by: Jakub Janousek <janouja9@fel.cvut.cz>

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2024-12-17 08:37:13 +08:00
Alin Jerpelea
1e85f0c195 arch/arm/xmc4: migrate to SPDX identifier
Most tools used for compliance and SBOM generation use SPDX identifiers
This change brings us a step closer to an easy SBOM generation.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2024-12-17 08:37:13 +08:00
Alin Jerpelea
1a21acf5a4 arch/esp32c3-legacy/hardware: migrate license to ASF
the author has submitted the CLA and the license can be migrated to ASF
    Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2024-12-17 08:37:13 +08:00
Alin Jerpelea
d19c0b8444 arch/esp32c3-legacy/hardware: migrate license to ASF
both co-authors have submitted the CLA and the license can be migrated to ASF
 Co-authored-by: Dong Heng <dongheng@espressif.com>
 Co-authored-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2024-12-17 08:37:13 +08:00
Andre Heinemans
84ab0a3785 lpuart: fix build errors for SINGLEWIRE and INVERT without SERIAL_TERMIOS 2024-12-16 10:26:48 +08:00
Andre Heinemans
a0f0252e92 arm64/imx9: tpm: fix TPM_FILTER_CHXFVAL_MASK macro 2024-12-16 09:56:55 +08:00
SPRESENSE
957516105f arch: cxd56xx: Fix not restart after TX error
Fix a bug that I2C driver can not transfer after TX abort error.
It caused by remaining NO_STOP flag status.
2024-12-13 18:19:49 +08:00
chao an
bf27e4d75d esp/mcpwm: fix unpaired spin lock
N/A

Signed-off-by: chao an <anchao@lixiang.com>
2024-12-12 22:00:28 +08:00
Tiago Medicci Serrano
6eb9b09960 xtensa/esp32s3: Update the reserved size for struct __lock
After https://github.com/apache/nuttx/pull/15075, the static
assertion at `nuttx/arch/xtensa/src/esp32s3/esp32s3_libc_stubs.c`
was being triggered when building any of the ESP32-S3's defconfigs.
This commit updates the reserved size to reflect the changes
introduced by the related PR.
2024-12-12 22:00:07 +08:00
Jouni Ukkonen
75ef5ea11e arch/arm64/imx9: Fix usdhc dma receive
Invalidate cache when dma transfer is ready

Signed-off-by: Jouni Ukkonen <jouni.ukkonen@unikie.com>
2024-12-12 21:58:39 +08:00
chao an
a94264ea00 arm/cxd56xx: Add g_ prefix to rtc spin lock
continue work of a68b00206b

| commit a68b00206b
| Author: hujun5 <hujun5@xiaomi.com>
| Date:   Mon Dec 9 20:48:09 2024 +0800
|
|     cxd56_rtc.c: use small lock in arch/arm/src/cxd56xx/cxd56_rtc.c
|
|     reason:
|     We hope to remove all instances of spin_lock_irqsave(NULL).
|
|     Signed-off-by: hujun5 <hujun5@xiaomi.com>

Signed-off-by: chao an <anchao@lixiang.com>
2024-12-11 20:35:45 +08:00
hujun5
3063f2c0e0 litex_serial: use small lock in arch/risc-v/src/litex/litex_serial.c
reason:
We hope to remove all instances of spin_lock_irqsave(NULL).

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-11 00:52:20 +08:00
hujun5
7e5088f4ea cxd56_rtc.c: use small lock in arch/arm/src/cxd56xx/cxd56_rtc.c
reason:
We hope to remove all instances of spin_lock_irqsave(NULL).

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-10 21:59:17 +08:00
hujun5
ecab220c39 max32660_rtc: use small lock in arch/arm/src/max326xx/max32660/max32660_rtc.c
reason:
We hope to remove all instances of spin_lock_irqsave(NULL).

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-10 21:59:06 +08:00
hujun5
c8bdfb537e lc823450_dma: use small lock in arch/arm/src/lc823450/lc823450_dma.c
reason:
We hope to remove all instances of spin_lock_irqsave(NULL).

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-10 21:57:44 +08:00
hujun5
bae0b64da3 s32k3xx_serial: use small lock in arch/arm/src/s32k3xx/s32k3xx_serial.c
reason:
We hope to remove all instances of spin_lock_irqsave(NULL).

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-10 21:57:34 +08:00
simbit18
eec97064d7 fix nxstyle
Removed extra spaces from .h and .c files
2024-12-10 21:57:22 +08:00
Alan Carvalho de Assis
e268b2a5b9 Fix small typo in rp2040_adc.c 2024-12-10 21:57:09 +08:00
hujun5
16b63ed837 armv7/8m: fix regresion from https://github.com/apache/nuttx/pull/14881
reason:
svc call may trigger hardfault

Background
    The origin of this issue is our desire to eliminate the function of storing
"regs" in g_current_regs and instead utilize (*running_task)->xcp.regs for storage.
The benefits of this approach include faster storage speed and
avoiding multiple accesses to g_current_regs during context switching,
thus ensuring that whether returning from an interrupt or an exception,
we consistently use this_task()->xcp.regs

Issue Encountered
    However, when storing registers, we must ensure that (running_task)->xcp.regs is invalid
so that it can be safely overwritten.
According to the existing logic, the only scenario where (running_task)->xcp.regs
is valid is during restore_context. We must accurately identify this scenario.
Initially, we used the condition (running_task)==NULL for this purpose, but we deemed
this approach unsatisfactory as it did not align well with the actual logic.
(running_task) should not be NULL. Consequently, we adopted other arch-specific methods for judgment,
but due to special logic in some arch, the judgment was not accurate, leading to this issue.

Solution:
    For armv6-m, we haven't found a more suitable solution, so we are sticking with (*running_task)==NULL.
    For armv7-m/armv8-m, by removing support for primask, we can achieve accurate judgment.

    PRIMASK is a design in armv6-m, that's why arm introduce BASEPRI from armv7-m.
It's wrong to provide this option for armv7-m/armv8-m arch.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-09 21:20:06 +08:00
hujun5
702affa63b armv6m: fix regresion from https://github.com/apache/nuttx/pull/14881
reason:
svc call may trigger hardfalt

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-09 21:20:06 +08:00
Alin Jerpelea
d368c0cc04 arch/arm: migrate to SPDX identifier
Most tools used for compliance and SBOM generation use SPDX identifiers
This change brings us a step closer to an easy SBOM generation.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2024-12-06 22:31:35 +08:00
hujun5
1e49cb4828 armv7-a/armv7-r/armv8-r: percpu reg store this_task
This is continue work of https://github.com/apache/nuttx/pull/13726

We can utilize percpu storage to hold information about the
current running task. If we intend to implement this feature, we would
need to define two macros that help us manage this percpu information
effectively.

up_this_task: This macro is designed to read the contents of the percpu
register to retrieve information about the current
running task.This allows us to quickly access
task-specific data without having to disable interrupts,
access global variables and obtain the current cpu index.

up_update_task: This macro is responsible for updating the contents of
the percpu register.It is typically called during
initialization or when a context switch occurs to ensure
that the percpu register reflects the information of the
newly running task.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-06 09:27:33 +08:00
Alin Jerpelea
344968b8c2 arch/arm: migrate to SPDX identifier
Most tools used for compliance and SBOM generation use SPDX identifiers
This change brings us a step closer to an easy SBOM generation.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2024-12-06 09:25:23 +08:00
xuxin19
f2b4ab283f cmake(bugfix):fix CMake build break on MacOS
report by https://github.com/apache/nuttx/issues/14936

Signed-off-by: xuxin19 <xuxin19@xiaomi.com>
2024-12-05 23:36:16 +08:00
Xiang Xiao
60fb917eda Remove FAR from 32/64bit arch
since these arch doesn't distinguish between near and far pointers

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2024-12-05 22:55:39 +08:00
hujun5
cbd07a86c9 s32k1xx_serial: arch/arm/src/s32k1xx/s32k1xx_serial.c
reason:
We hope to remove all instances of spin_lock_irqsave(NULL).

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-05 22:16:45 +08:00
buxiasen
617fee66ff Revert "arm/rp2040: use custom vectors to make smp_call work with exception_common"
This reverts commit 9464afe7c3.
2024-12-05 20:42:22 +08:00
buxiasen
108aaf8bbb Revert "arm/lc823450: use custom vectors to make smp_call work with exception_common"
This reverts commit c2cb58ff31.
2024-12-05 20:42:22 +08:00
buxiasen
9473cee85b Revert "arm/cxd56: use chip specific vectors to allow smpcall update regs"
This reverts commit 4a1afab88e.
2024-12-05 20:42:22 +08:00
buxiasen
af3c159cff arm-v6/7/8m: sigaction forward to pendsv
For exception directly, tcb->xcp.regs should not be used.

Signed-off-by: buxiasen <buxiasen@xiaomi.com>
2024-12-05 20:42:22 +08:00
buxiasen
55822753be arm-v6/7/8m: sigaction should use running_task
Nested irq possible cause readytorun not match with regs

Signed-off-by: buxiasen <buxiasen@xiaomi.com>
2024-12-05 20:42:22 +08:00
chenxiaoyi
f313ee5715 xtensa: inline up_switch_context
Signed-off-by: chenxiaoyi <chenxiaoyi@xiaomi.com>
Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-05 20:32:45 +08:00
wangmingrong1
fe5ee0c6ac arm64/toolchain: Fix toolchain judgment after opening lto
Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com>
2024-12-05 13:23:13 +08:00
hujun5
3e3701b272 riscv: Some judgments are missing
This commit fixes the regression from https://github.com/apache/nuttx/pull/14984

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-05 00:07:38 +08:00
zhangyuan29
1dc1e65202 arch/xtensa: use arch atomic when enable iram heap
S32C1I instructions may target cached, cache-bypass,
and data RAM memory locations. S32C1I instructions
are not permitted to access memory addresses in data ROM,
instruction memory or the address region allocated to
the XLMI port. Attempts to direct the S32C1I at these
addresses will cause an exception.

Signed-off-by: zhangyuan29 <zhangyuan29@xiaomi.com>
2024-12-05 00:05:15 +08:00
hujun5
dabf589940 remove redundant judgments *running_task != NULL
reason:
In irq, g_running_tasks is always valid.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-04 22:50:08 +08:00
wangmingrong1
cc88063646 debug symbol level: Use config instead
Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com>
2024-12-04 22:36:45 +08:00
zhangyuan29
dcea1b90e7 arch_atomic: only support atomic_xx and atomic64_xx function
Modify the kernel to use only atomic_xx and atomic64_xx interfaces,
avoiding the use of sizeof or typeof to determine the type of
atomic operations, thereby simplifying the kernel's atomic
interface operations.

Signed-off-by: zhangyuan29 <zhangyuan29@xiaomi.com>
2024-12-04 14:03:14 +01:00
Masayuki Ishikawa
6e8375f97b arch: lc823450: Add missing license info to lc823450_symbols.ld
Summary:
- The file includes symbol information provided by ON Semiconductor.
- The license information is the same as lc823450_sdc.c

Impact:
- None

Testing:
- lc823450-xgevk:rndis (build only)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2024-12-04 12:04:38 +01:00
hujun5
79a1ebb9cd rp23xx: use small lock in arch/arm/src/rp23xx/rp23xx_usbdev.c
reason:
We hope to remove all instances of spin_lock_irqsave(NULL).

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-04 14:48:48 +08:00
hujun5
bc844509e2 addrenv: Ensure that the transmission parameter of addrenv_switch is not NULL
reason:
avoid obtaining this_task multiple times.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-04 14:20:12 +08:00
Tiago Medicci Serrano
5358f5b940 libm: Do not link the toolchain's libm unless explicitly selected
Fix CMake-based build system to include the toolchain's libm only
when `CONFIG_LIBM_TOOLCHAIN` is selected. Before this commit, if
the user selected `CONFIG_LIBM_NEWLIB`, for instance, the build
system would still link the toolchain's libm functions instead of
the ones provided by newlib.

PS: this commit applies the same changes previously introduced for
the other architectures.
2024-12-04 09:30:33 +08:00
Tiago Medicci Serrano
80dd961f23 libm: Do not link the toolchain's libm unless explicitly selected
Fix CMake-based build system to include the toolchain's libm only
when `CONFIG_LIBM_TOOLCHAIN` is selected. Before this commit, if
the user selected `CONFIG_LIBM_NEWLIB`, for instance, the build
system would still link the toolchain's libm functions instead of
the ones provided by newlib.
2024-12-04 02:06:17 +08:00
hujun5
d5fba177b1 cxd56xx: use small lock in arch/arm/src/cxd56xx/cxd56_nxaudio_src.c
reason:
We hope to remove all instances of spin_lock_irqsave(NULL).

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-03 23:51:47 +08:00
hujun5
4f3f9751c1 fix compile error
lcd/st7565.c:107:4: warning: #warning "Optimal setting of CONFIG_LCD_MAXCONTRAST is 255" [-Wcpp]
  107 | #  warning "Optimal setting of CONFIG_LCD_MAXCONTRAST is 255"
      |    ^~~~~~~
chip/lc823450_cpuindex.c:36: warning: "CORE_COREID" redefined
   36 | #define CORE_COREID (LC823450_CORE_BASE + 0x0)
      |
In file included from /home/hujun5/downloads1/vela_sim/nuttx/arch/arm/src/common/arm_internal.h:37,
                 from chip/lc823450_cpuindex.c:29:
/home/hujun5/downloads1/vela_sim/nuttx/arch/arm/src/chip/chip.h:48: note: this is the location of the previous definition
   48 | #define CORE_COREID         (LC823450_CORE_BASE + 0)
      |
chip/lc823450_cpuindex.c:37: warning: "CORE_COREID_ID" redefined
   37 | #define   CORE_COREID_ID  (0x1 << 0)
      |
/home/hujun5/downloads1/vela_sim/nuttx/arch/arm/src/chip/chip.h:49: note: this is the location of the previous definition
   49 | #define CORE_COREID_ID      (1 << 0)

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-03 18:27:54 +08:00
hujun5
2b22ee03d6 arm: remove g_running_tasks[this_cpu()] = NULL
reason:
We hope to keep g_running_tasks valid forever.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-03 18:27:54 +08:00