nuttx-update

Author	SHA1	Message	Date
Alin Jerpelea	286d37026c	drivers: migrate to SPDX identifier Most tools used for compliance and SBOM generation use SPDX identifiers This change brings us a step closer to an easy SBOM generation. Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>	2024-11-06 18:02:25 +08:00
chao an	c6591c0f49	driver/serial: remove return value of up_putc() modify the prototype of up_putc(): remove the return value The architecture code does not care about the return value of up_putc(), so removing it saves two statements: Before: After: de4c: e52de004 push {lr} @ (str lr, [sp, #-4]!) \| de4c: e52de004 push {lr} @ (str lr, [sp, #-4]!) de50: e24dd014 sub sp, sp, #20 \| de50: e24dd014 sub sp, sp, #20 de54: e58d0004 str r0, [sp, #4] \| de54: e58d0004 str r0, [sp, #4] de58: e30030f8 movw r3, #248 @ 0xf8 \| de58: e30030f8 movw r3, #248 @ 0xf8 de5c: e3423000 movt r3, #8192 @ 0x2000 \| de5c: e3423000 movt r3, #8192 @ 0x2000 de60: e58d300c str r3, [sp, #12] \| de60: e58d300c str r3, [sp, #12] de64: e59d1004 ldr r1, [sp, #4] \| de64: e59d1004 ldr r1, [sp, #4] de68: e59d000c ldr r0, [sp, #12] \| de68: e59d000c ldr r0, [sp, #12] de6c: ebfffe66 bl d80c <pl011_putc> \| de6c: ebfffe66 bl d80c <pl011_putc> de70: e59d3004 ldr r3, [sp, #4] \| de70: e28dd014 add sp, sp, #20 de74: e1a00003 mov r0, r3 \| de74: e49df004 pop {pc} @ (ldr pc, [sp], #4) de78: e28dd014 add sp, sp, #20 \| de7c: e49df004 pop {pc} @ (ldr pc, [sp], #4) \| Signed-off-by: chao an <anchao@lixiang.com>	2024-10-26 13:21:29 +08:00
yangsong8	8c13b8df1d	syslog: convert \n to \r\n in syslog framework layer Signed-off-by: yangsong8 <yangsong8@xiaomi.com>	2024-10-17 02:29:51 +08:00
ligd	0a70235b0c	serial/pl011: fix can't up_putc() after setup Signed-off-by: ligd <liguiding1@xiaomi.com>	2024-10-10 02:38:12 +08:00
chao an	c19bdf204c	serial/uart_pl011: default syslog needs to check flow control in up_putc default syslog needs to check flow control in up_putc(), otherwise up_puts() will lose character if the hardware fifo is full.	2024-09-12 17:15:40 +08:00
TakuyaMiyasita	d6445484fe	drivers/serial/uart_pl011.c : add the bitmask according to PL011 spec. (Although almost no problem.)	2024-06-03 21:18:44 +08:00
TakuyaMiyasita	c93383407b	drivers/serial/uart_pl011.c : add the interface about clock and reset control for reducing power consumption.	2024-06-03 21:18:44 +08:00
TakuyaMiyasita	99dee09146	drivers/serial/uart_pl011.c : bug fix about the function : pl011_txready().	2024-06-03 21:18:44 +08:00
chao an	e4d4c67b78	serial/pl011: configurable clock frequency move clock frequency into Kconfig Signed-off-by: chao an <anchao@lixiang.com>	2024-04-30 17:26:39 +08:00
chao an	c04f1e7789	drivers/serial/pl011: add FAR specifier Signed-off-by: chao an <anchao@lixiang.com>	2024-01-11 13:39:06 +01:00
chao an	1dd9f64287	drivers/serial/pl011: add support of uart0/2/3 port Signed-off-by: chao an <anchao@lixiang.com>	2024-01-11 13:39:06 +01:00
chao an	5f51aba1be	serial/pl011: rename serial_pl011 to uart_pl011 The lower half driver should be prefixed with "uart_" Signed-off-by: chao an <anchao@lixiang.com>	2024-01-11 13:39:06 +01:00

12 commits