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22780 commits

Author SHA1 Message Date
anjiahao
ef9640c696 armv7-a:adjust gdb register order 
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
 2024-10-15 21:46:41 +08:00
wangming9
5b14fb75bc arm/fpu: FPU is supported when the TEE is enabled 
Summary:
1. Support armv7-a armv7-r armv8-r
2. The NSACR is read-only in Non-secure PL1 and PL2 modes.
3. The NSACR is read/write in Secure PL1 modes.
4. When the NSACR.{CP11,CP10} bit is set to 1,
   Non-secure access to coprocessor 11,10 enable

Signed-off-by: wangming9 <wangming9@xiaomi.com>
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
 2024-10-15 21:11:15 +08:00
wangming9
f465443f37 cpuinfo: Decouple the fetch cpuinfo from up_perf_getfreq 
Summary:
Add the default CPU frequency configuration.

Signed-off-by: wangming9 <wangming9@xiaomi.com>
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
 2024-10-15 21:11:15 +08:00
wangming9
6ee747a1e6 arm/goldfish: add memory map for DDR region 
Signed-off-by: wangming9 <wangming9@xiaomi.com>
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
 2024-10-15 21:01:47 +08:00
hujun5
49b9aa0f33 arm/riscv: remove redundant judgment 
Signed-off-by: hujun5 <hujun5@xiaomi.com>
 2024-10-15 15:32:40 +08:00
hujun5
aa0346610b arm64: we need to initialize the percpu register storing the current task more earlier. 
A call stack looks like the following:
sched_idletask
syslog_write
nx_vsyslog
syslog
getreg64
gic_validate_redist_version
arm64_gic_init
arm64_gic_secondary_init
arm64_boot_secondary_c_routine

Signed-off-by: hujun5 <hujun5@xiaomi.com>
 2024-10-15 15:25:55 +08:00
hujun5
948ac9b4cc arm64: add up_this_task and up_change_task macro impl 
Signed-off-by: hujun5 <hujun5@xiaomi.com>
 2024-10-15 15:25:55 +08:00
xuxin19
696e1a3f70 cmake(fix warning):toolchain do not have parent scope 
toolchain file variable is global scope
dont need set parent scope

clear warning:
CMake Warning (dev) at /github/workspace/sources/nuttx/arch/arm/src/cmake/gcc.cmake:69 (set):
  Cannot set "GCCVER": current scope has no parent.
Call Stack (most recent call first):
  /github/workspace/sources/nuttx/arch/arm/src/cmake/Toolchain.cmake:56 (include)
  /github/workspace/sources/nuttx/build/CMakeFiles/3.26.0/CMakeSystem.cmake:6 (include)
  /github/workspace/sources/nuttx/build/CMakeFiles/CMakeScratch/TryCompile-ZJVOZO/CMakeLists.txt:5 (project)
This warning is for project developers.  Use -Wno-dev to suppress it.

Signed-off-by: xuxin19 <xuxin19@xiaomi.com>
 2024-10-15 12:38:14 +08:00
cuiziwei
036a0674db nuttx/libc:Add _dl_find_object and dl_iterate_phdr function. 
Add _dl_find_object() function, because when cxx_exception configuration is enabled, a link error occurs and that function cannot be found.

ld: /usr/lib/gcc/x86_64-linux-gnu/13/libgcc_eh.a(unwind-dw2-fde-dip.o): in function `_Unwind_Find_FDE':
(.text+0x250c): undefined reference to `_dl_find_object'

Signed-off-by: cuiziwei <cuiziwei@xiaomi.com>
 2024-10-15 12:35:54 +08:00
wanggang26
aef584a804 shm:fix build error 
nuttx/arch/arm/src/armv7-a/arm_addrenv_shm.c:77:(.text.up_shmat+0x2e):
undefined reference to `shminfo'

Signed-off-by: wanggang26 <wanggang26@xiaomi.com>
 2024-10-15 11:40:34 +08:00
wanggang26
7e5fb8450f coredump: add architecture-specific registers dump, including NVIC and MPU 
Signed-off-by: wanggang26 <wanggang26@xiaomi.com>
 2024-10-15 11:40:05 +08:00
cuiziwei
6f62ef0b6f nuttx/sim:Remove asan check in up_irq_save(). 
Signed-off-by: cuiziwei <cuiziwei@xiaomi.com>
 2024-10-15 03:36:55 +08:00
hujun5
d77cb8af70 sched: fix nxsched_process_delivered did not call hook 
Signed-off-by: hujun5 <hujun5@xiaomi.com>
 2024-10-15 01:50:06 +08:00
hujun5
10659a8bc2 irq: irq_attach_wqueue replace irq_attach_thread 
reason:
using a shared same priority queue can reduce memory consumption.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
 2024-10-15 01:12:14 +08:00
wanggang26
3fad764804 arch/armv7:fix a typo 
Signed-off-by: wanggang26 <wanggang26@xiaomi.com>
 2024-10-15 01:06:59 +08:00
Xu Xingliang
632feb2b51 arch/arm64: remove struct regs_context 
Signed-off-by: Xu Xingliang <xuxingliang@xiaomi.com>
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
 2024-10-14 23:05:56 +08:00
cuiziwei
a08df48774 arch/x86_64:Add CXX configuration for enabling x86_64 support for C++ applications. 
Signed-off-by: cuiziwei <cuiziwei@xiaomi.com>
 2024-10-14 19:03:30 +08:00
xuxingliang
f031dc39a6 arch/arm64: fix build warnings 
common/arm64_mpu.c:355:13: error: format '%llX' expects argument of type 'long long unsigned int', but argument 4 has type 'long unsigned int' [-Werror=format=]
  355 |       _info("MPU-%d, 0x%08llX-0x%08llX SH=%llX AP=%llX XN=%llX\n", i,
      |             ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
common/arm64_mpu.c:355:29: note: format string is defined here
  355 |       _info("MPU-%d, 0x%08llX-0x%08llX SH=%llX AP=%llX XN=%llX\n", i,
      |                        ~~~~~^
      |                             |
      |                             long long unsigned int
      |                        %08lX
common/arm64_mpu.c:355:13: error: format '%llX' expects argument of type 'long long unsigned int', but argument 5 has type 'long unsigned int' [-Werror=format=]
  355 |       _info("MPU-%d, 0x%08llX-0x%08llX SH=%llX AP=%llX XN=%llX\n", i,
      |             ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
common/arm64_mpu.c:355:38: note: format string is defined here
  355 |       _info("MPU-%d, 0x%08llX-0x%08llX SH=%llX AP=%llX XN=%llX\n", i,

Signed-off-by: xuxingliang <xuxingliang@xiaomi.com>
 2024-10-14 17:59:56 +08:00
chao an
7288a8d000 arch/arm64: add support to config SPI interrupt affinity routing to CPU0 by default 
Signed-off-by: chao an <anchao@lixiang.com>
 2024-10-14 17:58:13 +08:00
chao an
83c483c1b4 arch/armv8-a: new config to set SPIs Configuration to edge-triggered 
Configure all SPIs(Shared Peripheral Interrupts) as edge-triggered by default

Signed-off-by: chao an <anchao@lixiang.com>
 2024-10-14 17:58:13 +08:00
liwenxiang1
3e2e2132ca arch/x86_64:Adjust the position of the nm command to execute it after NuttX is generated 
Signed-off-by: liwenxiang1 <liwenxiang1@xiaomi.com>
 2024-10-14 17:55:59 +08:00
p-szafonimateusz
c18f722185 arch/intel64: optimise context switch 
We save interrupted TCB state on tcb->xcp.regs not interrupt stack now
which allows us to remove x86_64_savestate() from up_switch_context()
and other places.

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
Signed-off-by: hujun5 <hujun5@xiaomi.com>
 2024-10-14 17:54:06 +08:00
xuxingliang
d655569a7c cmake: add newly added sources to cmake 
These newly added files are missing from cmake.

Signed-off-by: xuxingliang <xuxingliang@xiaomi.com>
 2024-10-14 17:19:45 +08:00
nuttxs
9308675686 xtensa/esp32s3: add wapi support for getting country code 
commands on ESP32-S3
 2024-10-14 13:42:37 +08:00
cuiziwei
7246533aeb Unify the definition of GCCVER and remove duplicate code. 
Signed-off-by: cuiziwei <cuiziwei@xiaomi.com>
 2024-10-13 11:41:22 +08:00
Marco Casaroli
c17ab3beb5 feat(esp32s3): add openeth ethernet driver for qemu 
We add the config for esp32s3, then move the esp32 specifics to
esp32/chip.h, then add the esp32s3 specifics to esp32s3/chip.h.
 2024-10-13 11:19:51 +08:00
Marco Casaroli
d5b32f0335 feat(esp32_openeth): move to common/espressif 
Since this will be used for esp32s3 also, we can have this in
common/espressif.
 2024-10-13 11:19:51 +08:00
xuxin19
57bfd02cef build ci:add msvc windows native ci workflow 
Signed-off-by: xuxin19 <xuxin19@xiaomi.com>
 2024-10-13 10:25:19 +08:00
chenzhijia
505adfa277 nuttx:move "#define STRINGIFY(x)" to nuttx/macro.h 
Franklin requirement, "#define STRINGIFY(x)" conflicts with https://github.com/mborgerding/kissfft define

Signed-off-by: chenzhijia <chenzhijia@xiaomi.com>
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
 2024-10-13 03:16:25 +08:00
Bowen Wang
143466baed drivers/pci: fix pci framework warning in 32bit chip 
In file included from pci/pci.c:30:
pci/pci.c: In function 'pci_setup_device':
pci/pci.c:449:66: warning: right shift count >= width of type [-Wshift-count-overflow]
  449 |           pci_write_config_dword(dev, base_address_1, res->start >> 32);
      |                                                                  ^~
pci/pci.c: In function 'pci_presetup_bridge':
pci/pci.c:541:51: warning: right shift count >= width of type [-Wshift-count-overflow]
  541 |                              ctrl->mem_pref.start >> 32);
      |                                                   ^~
pci/pci.c: In function 'pci_postsetup_bridge':
pci/pci.c:604:57: warning: right shift count >= width of type [-Wshift-count-overflow]
  604 |                              (ctrl->mem_pref.start - 1) >> 32);
      |                                                         ^~
CC:  pthread/pthread_release.c pci/pci_ecam.c:71:12: warning: initialization of 'int (*)(struct pci_bus_s *, unsigned int,  int,  int,  uint32_t *)' {aka 'int (*)(struct pci_bus_s *, unsigned int,  int,  int,  long unsigned int *)'} from incompatible pointer type 'int (*)(struct pci_bus_s *, uint32_t,  int,  int,  uint32_t *)' {aka 'int (*)(struct pci_bus_s *, long unsigned int,  int,  int,  long unsigned int *)'} [-Wincompatible-pointer-types]
   71 |   .read  = pci_ecam_read_config,
      |            ^~~~~~~~~~~~~~~~~~~~
pci/pci_ecam.c:71:12: note: (near initialization for 'g_pci_ecam_ops.read')
pci/pci_ecam.c:72:12: warning: initialization of 'int (*)(struct pci_bus_s *, unsigned int,  int,  int,  uint32_t)' {aka 'int (*)(struct pci_bus_s *, unsigned int,  int,  int,  long unsigned int)'} from incompatible pointer type 'int (*)(struct pci_bus_s *, uint32_t,  int,  int,  uint32_t)' {aka 'int (*)(struct pci_bus_s *, long unsigned int,  int,  int,  long unsigned int)'} [-Wincompatible-pointer-types]
   72 |   .write = pci_ecam_write_config,

Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
 2024-10-13 02:28:32 +08:00
xuxin19
7def0983f6 cmake:sync arm sub arch CMake scripts missing sources 
Signed-off-by: xuxin19 <xuxin19@xiaomi.com>
 2024-10-13 02:25:06 +08:00
lipengfei28
e7326cfa62 arch/arm64: add CONFIG_ARCH_VMA_MAPPING 
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
 2024-10-13 02:09:38 +08:00
xuxin19
7b807a3947 cmake:fix x86_64 cmake configured warning 
Signed-off-by: xuxin19 <xuxin19@xiaomi.com>
 2024-10-13 02:08:38 +08:00
yangguangcai
80f2890c17 systick:when isr_handle is NULL will be crash. 
Signed-off-by: yangguangcai <yangguangcai@xiaomi.com>
 2024-10-13 00:32:55 +08:00
wangmingrong1
b12bf1ef33 arm/cmake: fix cmake compile error 
1. The -c parameter should not be added during the link phase, otherwise the link will fail.
2. If it is the clang compiler, its toolchain library should use --print-file-name to find it, otherwise an error will occur

Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com>
 2024-10-12 20:37:43 +08:00
ska
3b273b1e3e Revert "nuttx/arch: Enabling ARCH_MATH_H is required when compiling sim with …" 
This reverts commit 57e901e5ea.
 2024-10-12 19:45:25 +08:00
Jinliang Li
36c63705db armv8-r/gicv3: disable 64bits access gic 64bits registers 
When neon is enabled, compiler may optimize 64bits access to vstr, that
will cause data aborts.
Split 64bits access to double 32bits access for GIC_IROUTER/GICR_TYPER,
just like linux.

Signed-off-by: Jinliang Li <lijinliang1@lixiang.com>
Signed-off-by: chao an <anchao@lixiang.com>
 2024-10-12 18:11:00 +08:00
xuxingliang
38858b6cc3 arch: set current regs firstly in undefinedinsn 
Need to save the regs firstly in case syslog triggers another crash.
Otherwise we may loose the register contents for the first exception.

Signed-off-by: xuxingliang <xuxingliang@xiaomi.com>
 2024-10-12 14:19:36 +08:00
fanjiangang
d8b042126e arch/arm: fix the bug of armv8-r macro GET_MPIDR 
should be core not cpu

Signed-off-by: fanjiangang <fanjiangang@lixiang.com>
Signed-off-by: chao an <anchao@lixiang.com>
 2024-10-12 14:00:32 +08:00
fanjiangang
044ee68e80 arm/armv8-r: add implements of arm_get_mpid() 
Signed-off-by: fanjiangang <fanjiangang@lixiang.com>
Signed-off-by: chao an <anchao@lixiang.com>
 2024-10-12 14:00:32 +08:00
hujun5
1ff49872a7 arch: There is no need to use sched_[un]lock 
Signed-off-by: hujun5 <hujun5@xiaomi.com>
 2024-10-12 13:28:23 +08:00
hujun5
ef8d8ee627 rtc: There is no need to use sched_[un]lock 
Signed-off-by: hujun5 <hujun5@xiaomi.com>
 2024-10-12 13:28:23 +08:00
anjiahao
e5f9b42ea0 binfmt/libelf:Remove libelf implementation [2/2] 
this commit is part two, all logic move to modlib, so we can remove it.
and change all use defconfig

Signed-off-by: anjiahao <anjiahao@xiaomi.com>
 2024-10-12 12:29:06 +08:00
cuiziwei
57e901e5ea nuttx/arch: Enabling ARCH_MATH_H is required when compiling sim with the 13.2 version of the toolchain. 
Signed-off-by: cuiziwei <cuiziwei@xiaomi.com>
 2024-10-12 12:05:05 +08:00
zhanghongyu
6f9543daec sim: fix crash caused by function recursion. 
114 up_interrupt_context () at /home/zhhyu/source/vela/dev/nuttx/include/arch/irq.h:163
115 stack_monitor_enter (this_fn=0x400145dc <up_current_regs>, call_site=0x4002d5c7 <__cyg_profile_func_enter+120>, arg=0x0) at instrument/stack_monitor.c:63
116 0x000000004002d5c7 in __cyg_profile_func_enter (this_fn=0x400145dc <up_current_regs>, call_site=0x4002d5c7 <__cyg_profile_func_enter+120>) at misc/lib_instrument.c:68
117 0x00000000400156c7 in up_current_regs () at instrument/stack_monitor.c:62
118 up_interrupt_context () at /home/zhhyu/source/vela/dev/nuttx/include/arch/irq.h:163
119 stack_monitor_enter (this_fn=0x400145dc <up_current_regs>, call_site=0x4002d5c7 <__cyg_profile_func_enter+120>, arg=0x0) at instrument/stack_monitor.c:63
120 0x000000004002d5c7 in __cyg_profile_func_enter (this_fn=0x400145dc <up_current_regs>, call_site=0x4002d5c7 <__cyg_profile_func_enter+120>) at misc/lib_instrument.c:68
121 0x00000000400156c7 in up_current_regs () at instrument/stack_monitor.c:62
...

Signed-off-by: zhanghongyu <zhanghongyu@xiaomi.com>
 2024-10-12 11:49:18 +08:00
liwenxiang1
43a8a80c74 arch/x86_64:Code style is consistent 
Signed-off-by: liwenxiang1 <liwenxiang1@xiaomi.com>
 2024-10-12 11:20:24 +08:00
hujun5
302d2f3b56 x86_64: align some code 
Signed-off-by: hujun5 <hujun5@xiaomi.com>
 2024-10-12 10:19:48 +08:00
Tim Hardisty
3027be72c3 Update sam_udphs.c 2024-10-12 09:51:19 +08:00
fangxinyong
55d7708fa0 boards/arm/qemu: enable kernel build for armv7a 
See Documentation/platforms/arm/qemu/boards/qemu-armv7a/README.txt for details

Signed-off-by: fangxinyong <fangxinyong@xiaomi.com>
 2024-10-12 09:28:45 +08:00
yanghuatao
323ee075be nuttx/qemu: Fix funciton up_idle multiple definition 
Signed-off-by: yanghuatao <yanghuatao@xiaomi.com>
 2024-10-12 09:28:45 +08:00