arch: qemu-rv: Fix high CPU usage in SMP mode

Summary:
- I noticed that QEMU shows high CPU usage if the number of
  CPUs does not match the kernel configuration. (e.g. -smp 8
  and CONFIG_SMP_NCPUS=2)
- This commit fixes this issue.

Impact:
- qemu-rv only

Testing:
- Tested with the following configs
  - rv-virt:smp64 (CONFIG_NCPUS=1/2/8)
  - rv-virt:nsh64

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>

arch/arm/src/armv7-a/arm_fpucmp.c

@@ -44,7 +44,14 @@
  * Name: up_fpucmp
  *
  * Description:
- *   compare FPU areas from thread context
+ *   Compare FPU areas from thread context.
+ *
+ * Input Parameters:
+ *   saveregs1 - Pointer to the saved FPU registers.
+ *   saveregs2 - Pointer to the saved FPU registers.
+ *
+ * Returned Value:
+ *   True if FPU areas compare equal, False otherwise.
  *
  ****************************************************************************/
 

arch/arm/src/armv7-m/arm_fpucmp.c

@@ -44,7 +44,14 @@
  * Name: up_fpucmp
  *
  * Description:
- *   compare FPU areas from thread context
+ *   Compare FPU areas from thread context.
+ *
+ * Input Parameters:
+ *   saveregs1 - Pointer to the saved FPU registers.
+ *   saveregs2 - Pointer to the saved FPU registers.
+ *
+ * Returned Value:
+ *   True if FPU areas compare equal, False otherwise.
  *
  ****************************************************************************/
 

arch/arm/src/armv7-r/arm_fpucmp.c

@@ -44,7 +44,14 @@
  * Name: up_fpucmp
  *
  * Description:
- *   compare FPU areas from thread context
+ *   Compare FPU areas from thread context.
+ *
+ * Input Parameters:
+ *   saveregs1 - Pointer to the saved FPU registers.
+ *   saveregs2 - Pointer to the saved FPU registers.
+ *
+ * Returned Value:
+ *   True if FPU areas compare equal, False otherwise.
  *
  ****************************************************************************/
 

arch/arm/src/armv8-m/arm_fpucmp.c

@@ -44,7 +44,14 @@
  * Name: up_fpucmp
  *
  * Description:
- *   compare FPU areas from thread context
+ *   Compare FPU areas from thread context.
+ *
+ * Input Parameters:
+ *   saveregs1 - Pointer to the saved FPU registers.
+ *   saveregs2 - Pointer to the saved FPU registers.
+ *
+ * Returned Value:
+ *   True if FPU areas compare equal, False otherwise.
  *
  ****************************************************************************/
 

arch/arm64/src/common/arm64_fpu.c

@@ -229,7 +229,14 @@ void arm64_fpu_disable(void)
  * Name: up_fpucmp
  *
  * Description:
- *   compare FPU areas from thread context
+ *   Compare FPU areas from thread context.
+ *
+ * Input Parameters:
+ *   saveregs1 - Pointer to the saved FPU registers.
+ *   saveregs2 - Pointer to the saved FPU registers.
+ *
+ * Returned Value:
+ *   True if FPU areas compare equal, False otherwise.
  *
  ***************************************************************************/
 

arch/risc-v/src/common/riscv_fpucmp.c

@@ -44,7 +44,14 @@
  * Name: up_fpucmp
  *
  * Description:
- *   compare FPU areas from thread context
+ *   Compare FPU areas from thread context.
+ *
+ * Input Parameters:
+ *   saveregs1 - Pointer to the saved FPU registers.
+ *   saveregs2 - Pointer to the saved FPU registers.
+ *
+ * Returned Value:
+ *   True if FPU areas compare equal, False otherwise.
  *
  ****************************************************************************/
 

arch/risc-v/src/qemu-rv/qemu_rv_head.S

@@ -52,13 +52,21 @@ __start:
   j    2f
 1:
 
-  /* In case of single CPU config, stop here */
+  /* Load the number of CPUs that the kernel supports */
 
-#if !defined(CONFIG_SMP) || (CONFIG_SMP_NCPUS == 1)
+#ifdef CONFIG_SMP
-  csrw mie, zero
+  li   t1, CONFIG_SMP_NCPUS
-  wfi
+#else
+  li   t1, 1
 #endif
 
+  /* If a0 (mhartid) >= t1 (the number of CPUs), stop here */
+
+  blt  a0, t1, 3f
+  csrw mie, zero
+  wfi
+
+3:
   /* To get g_cpu_basestack[mhartid], must get g_cpu_basestack first */
 
   la   t0, g_cpu_basestack

arch/sim/src/sim/up_interruptcontext.c

@@ -90,10 +90,6 @@ void *up_doirq(int irq, void *context)
       CURRENT_REGS = NULL;
 
 #ifdef CONFIG_SMP
-      /* Handle signal */
-
-      sim_sigdeliver();
-
       /* Then switch contexts */
 
       longjmp(regs, 1);

arch/xtensa/Kconfig

@@ -54,7 +54,6 @@ config ARCH_CHIP_ESP32S2
 	select ARCH_HAVE_SDRAM
 	select ARCH_HAVE_RESET
 	select ARCH_HAVE_BOOTLOADER
-	select ARCH_HAVE_TESTSET
 	select ARCH_VECNOTIRQ
 	select LIBC_ARCH_ATOMIC
 	select LIBC_ARCH_MEMCPY

arch/xtensa/include/irq.h

@@ -68,6 +68,10 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
+#ifndef ALIGN_UP
+#  define ALIGN_UP(num, align) (((num) + ((align) - 1)) & ~((align) - 1))
+#endif
+
 /* IRQ Stack Frame Format.  Each value is a uint32_t register index */
 
 #define REG_PC              (0)  /* Return PC */
@@ -138,18 +142,13 @@
 #endif
 
 #if XCHAL_CP_NUM > 0
-#  if (XCHAL_TOTAL_SA_ALIGN == 8) && ((_REG_CP_START & 1) == 1)
+  /* FPU first address must align to CP align size. */
-  /* Fpu first address must align to cp align size. */
 
-#    define REG_CP_DUMMY      (_REG_CP_START + 0)
+#  define XCPTCONTEXT_REGS  ALIGN_UP(_REG_CP_START, XCHAL_TOTAL_SA_ALIGN / 4)
-#    define XCPTCONTEXT_REGS  (_REG_CP_START + 1)
+#  define XCPTCONTEXT_SIZE  ((4 * XCPTCONTEXT_REGS) + XTENSA_CP_SA_SIZE + 0x20)
-#  else
-#    define XCPTCONTEXT_REGS  _REG_CP_START
-#  endif
-#  define XCPTCONTEXT_SIZE    ((4 * XCPTCONTEXT_REGS) + XTENSA_CP_SA_SIZE + 0x20)
 #else
-#  define XCPTCONTEXT_REGS    _REG_CP_START
+#  define XCPTCONTEXT_REGS  _REG_CP_START
-#  define XCPTCONTEXT_SIZE    ((4 * XCPTCONTEXT_REGS) + 0x20)
+#  define XCPTCONTEXT_SIZE  ((4 * XCPTCONTEXT_REGS) + 0x20)
 #endif
 
 /****************************************************************************

arch/xtensa/src/common/xtensa_context.S

@@ -69,7 +69,10 @@
 #include "chip.h"
 #include "syscall.h"
 #include "xtensa_asm_utils.h"
-#include "xtensa_coproc.S"
+
+#if XCHAL_CP_NUM > 0
+#  include "xtensa_coproc.S"
+#endif
 
 /****************************************************************************
  * Public Functions

arch/xtensa/src/common/xtensa_fpucmp.c

@@ -44,7 +44,14 @@
  * Name: up_fpucmp
  *
  * Description:
- *   compare FPU areas from thread context
+ *   Compare FPU areas from thread context.
+ *
+ * Input Parameters:
+ *   saveregs1 - Pointer to the saved FPU registers.
+ *   saveregs2 - Pointer to the saved FPU registers.
+ *
+ * Returned Value:
+ *   True if FPU areas compare equal, False otherwise.
  *
  ****************************************************************************/
 
@@ -54,6 +61,6 @@ bool up_fpucmp(const void *saveregs1, const void *saveregs2)
   const uint32_t *regs2 = saveregs2;
 
   return memcmp(&regs1[XCPTCONTEXT_REGS], &regs2[XCPTCONTEXT_REGS],
-                XTENSA_CP_SA_SIZE);
+                XTENSA_CP_SA_SIZE) == 0;
 }
 #endif /* CONFIG_ARCH_FPU */

boards/arm/tiva/lm3s6965-ek/configs/qemu-protected/defconfig

@@ -17,7 +17,6 @@ CONFIG_ARCH_CHIP_LM=y
 CONFIG_ARCH_STACKDUMP=y
 CONFIG_ARM_MPU=y
 CONFIG_ARM_SEMIHOSTING_HOSTFS=y
-CONFIG_BOARDCTL_APP_SYMTAB=y
 CONFIG_BOARDCTL_ROMDISK=y
 CONFIG_BOARD_LOOPSPERMSEC=4531
 CONFIG_BUILD_PROTECTED=y
@@ -30,9 +29,11 @@ CONFIG_DEBUG_INFO=y
 CONFIG_DEBUG_SYMBOLS=y
 CONFIG_DEBUG_WARN=y
 CONFIG_ELF=y
+CONFIG_ELF_RELOCATION_BUFFERCOUNT=64
+CONFIG_ELF_SYMBOL_CACHECOUNT=64
 CONFIG_EXAMPLES_ELF=y
 CONFIG_EXAMPLES_ELF_DEVPATH="/dev/ram5"
-CONFIG_EXAMPLES_HELLO=y
+CONFIG_EXAMPLES_HELLO=m
 CONFIG_EXAMPLES_MODULE=y
 CONFIG_EXAMPLES_MODULE_DEVPATH="/dev/ram6"
 CONFIG_EXAMPLES_NETTEST=m
@@ -41,7 +42,6 @@ CONFIG_FS_BINFS=y
 CONFIG_FS_HOSTFS=y
 CONFIG_FS_PROCFS=y
 CONFIG_FS_TMPFS=y
-CONFIG_HOST_MACOS=y
 CONFIG_INIT_ENTRYPOINT="nsh_main"
 CONFIG_LIBC_DLFCN=y
 CONFIG_LIBC_ENVPATH=y
@@ -95,6 +95,9 @@ CONFIG_SYSLOG_CONSOLE=y
 CONFIG_SYSTEM_DHCPC_RENEW=y
 CONFIG_SYSTEM_NETDB=y
 CONFIG_SYSTEM_NSH=y
+CONFIG_SYSTEM_NSH_SYMTAB=y
+CONFIG_SYSTEM_NSH_SYMTAB_ARRAYNAME="g_symtab"
+CONFIG_SYSTEM_NSH_SYMTAB_COUNTNAME="g_nsymbols"
 CONFIG_SYSTEM_NTPC=y
 CONFIG_SYSTEM_PING=y
 CONFIG_TASK_NAME_SIZE=24

boards/risc-v/esp32c3/esp32c3-devkit/src/etc/passwd

@@ -1 +1 @@
-admin:8Tv+Hbmr3pLddSjtzL0kwC:0:0:/
+admin:8Tv+Hbmr3pLVb5HHZgd26D:0:0:/

boards/sim/sim/sim/src/etc/passwd

@@ -1 +1 @@
-admin:8Tv+Hbmr3pLddSjtzL0kwC:0:0:/
+admin:8Tv+Hbmr3pLVb5HHZgd26D:0:0:/

boards/xtensa/esp32s3/esp32s3-devkit/scripts/esp32s3.ld

@@ -71,7 +71,7 @@ SECTIONS
      * and dram0_0_seg reflect the same address space on different buses.
      */
 
-    . = ORIGIN(dram0_0_seg) + _iram_end - _iram_start;
+    . = ORIGIN(dram0_0_seg) + MAX(_iram_end, _diram_i_start) - _diram_i_start;
   } > dram0_0_seg
 
   /* Shared RAM */

boards/xtensa/esp32s3/esp32s3-eye/scripts/esp32s3.ld

@@ -71,7 +71,7 @@ SECTIONS
      * and dram0_0_seg reflect the same address space on different buses.
      */
 
-    . = ORIGIN(dram0_0_seg) + _iram_end - _iram_start;
+    . = ORIGIN(dram0_0_seg) + MAX(_iram_end, _diram_i_start) - _diram_i_start;
   } > dram0_0_seg
 
   /* Shared RAM */

include/nuttx/arch.h

@@ -2618,7 +2618,14 @@ int up_saveusercontext(FAR void *saveregs);
  * Name: up_fpucmp
  *
  * Description:
- *   compare FPU areas from thread context
+ *   Compare FPU areas from thread context.
+ *
+ * Input Parameters:
+ *   saveregs1 - Pointer to the saved FPU registers.
+ *   saveregs2 - Pointer to the saved FPU registers.
+ *
+ * Returned Value:
+ *   True if FPU areas compare equal, False otherwise.
  *
  ****************************************************************************/