Huang Qi 3a6de58904 riscv/syscall.h: Update comment for syscall ... Change RV64GC to RISC-V since this file is for all RISC-V based platform. Signed-off-by: Huang Qi <huangqi3@xiaomi.com>		2024-11-20 10:50:50 +01:00
..
include	riscv/syscall.h: Update comment for syscall	2024-11-20 10:50:50 +01:00
src	arch/risc-v/src/mpfs/mpfs_irq.c: Default global interrupt priorities	2024-11-19 22:24:39 +08:00
CMakeLists.txt	cmake:init RISC-V cmake qemu-rv build	2023-10-26 21:01:46 +08:00
Kconfig	risc-v and xtensa Kconfig : Remove LIBC_ARCH_ATOMIC	2024-11-13 15:30:53 +08:00