Jinliang Li 40bbe7f3e9 arm/armv8-r: init HSCTLR and HACTLR for EL2 ... 1. init HSCTLR to enable i-cache/d-cache for EL2 2. init HACTLR to enable all access to implementation defined registers for EL1. 3. add dsb/isb before switch to EL1 from EL2 Signed-off-by: Jinliang Li <lijinliang1@lixiang.com>		2024-10-25 12:09:47 +08:00
..
include	arm/armv8-r: init HSCTLR and HACTLR for EL2	2024-10-25 12:09:47 +08:00
src	arm/armv8-r: init HSCTLR and HACTLR for EL2	2024-10-25 12:09:47 +08:00
CMakeLists.txt	build: add initial cmake build system	2023-07-08 13:50:48 +08:00
Kconfig	arm/lc823450: use custom vectors to make smp_call work with exception_common	2024-10-17 22:57:14 +08:00