Commit graph

258 commits

Author SHA1 Message Date
be8c7779d3 Add Daily Build 2023-12-19 11:33:07 +08:00
c65a5b186b Add article 2023-12-17 16:44:03 +08:00
1c61311391 Point BL808 to NuttX Mainline 2023-12-17 00:02:25 +08:00
f954dc87b7 Point BL808 to NuttX Mainline 2023-12-16 23:56:37 +08:00
ea7d58edd0 Add article 2023-12-10 09:12:14 +08:00
4d536ec23a Update doc 2023-12-08 18:31:21 +08:00
ad05c77727 Update doc 2023-12-07 11:40:42 +08:00
85d3abd0e3 Update doc 2023-12-06 18:00:04 +08:00
693d7e5064 Update doc 2023-12-06 16:40:04 +08:00
289e2fd5c0 Remove log 2023-12-06 16:27:14 +08:00
c0ceb10718 Change _PAGE_MTMASK_THEAD to _PAGE_IO_THEAD. Tested OK 2023-12-06 16:16:19 +08:00
b9f1c31fda UART Input and PLIC are OK yay! 2023-12-05 15:08:10 +08:00
f88dbb1ace UART Input and PLIC are OK yay! 2023-12-05 15:02:50 +08:00
7989114a0f UART Input and PLIC are OK yay! 2023-12-05 14:58:56 +08:00
071e03b68b UART Input and PLIC are OK yay! 2023-12-05 14:09:29 +08:00
ec079bd866 UART Input works OK yay! 2023-12-05 13:34:04 +08:00
2e98ebdeba Update doc 2023-12-05 13:08:36 +08:00
c3db75fec4 Update doc 2023-12-05 13:01:03 +08:00
55ab5fbea9 Update doc 2023-12-05 12:58:28 +08:00
54a2c7952e Update doc 2023-12-05 11:58:56 +08:00
4256fbbf5b Update doc 2023-12-05 11:48:49 +08:00
c86de609a0 Update doc 2023-12-05 10:25:14 +08:00
0b4cd53914 Update doc 2023-12-05 10:24:33 +08:00
eab8c98a0e Update doc 2023-12-05 09:33:02 +08:00
c1b8727c4d Update doc 2023-12-05 09:20:08 +08:00
15a9e29ad7 Add article 2023-12-03 08:02:19 +08:00
12c3d4c38d Add article 2023-12-03 07:54:53 +08:00
1f67be34d4 Update doc 2023-12-02 16:59:41 +08:00
0582457f65 Update doc 2023-12-02 16:54:51 +08:00
eb1862d27b Update doc 2023-12-01 14:37:23 +08:00
10a5e7a170 Update doc 2023-12-01 00:16:08 +08:00
11e2e2f912 Can't disable MMU. EXCEPTION: Illegal instruction. MCAUSE: 0000000000000002, EPC: 0000000050400112, MTVAL: 0000000000000000 2023-11-26 14:55:08 +08:00
95f7e90e60 Disable and re-enable MMU. before1=0, before2=0, after1=1, after2=0 2023-11-26 14:41:10 +08:00
00137d34be Disable and re-enable MMU. before1=0, before2=0, after1=1, after2=0 2023-11-26 14:40:18 +08:00
c1f38bc937 Can't set SO Bit because of MXSTATUS 2023-11-26 14:31:34 +08:00
abad3d01ed Can't set SO Bit because of MXSTATUS 2023-11-26 13:50:05 +08:00
8f81996f49 Update doc 2023-11-26 09:59:20 +08:00
c6bae539d1 Update doc 2023-11-26 09:45:57 +08:00
62bd627de5 Update doc 2023-11-26 09:44:36 +08:00
33eca90ec1 Update doc 2023-11-26 09:43:09 +08:00
c1a440491e Update doc 2023-11-26 08:41:07 +08:00
63e0718793 After MMU Init: before1=0, before2=0, after1=0, after2=0 2023-11-26 08:29:09 +08:00
574d376e4e Before MMU Init: before1=0, before2=0, after1=1, after2=0 2023-11-26 08:24:26 +08:00
2a44285514 Add article 2023-11-26 07:57:36 +08:00
bdb6f8beeb Set PLIC Interrupt Priority in RISC-V Assembly. Same problem 2023-11-25 19:10:00 +08:00
eaaf1fbce8 sfence doesn't help 2023-11-25 13:44:53 +08:00
dddaae8de8 Update doc 2023-11-25 13:16:13 +08:00
92d6b0175a Update doc 2023-11-25 13:11:52 +08:00
a42f3e4005 Test the setting of PLIC Interrupt Priority. Doesn't seem right 2023-11-25 13:11:01 +08:00
51745bea6a Update doc 2023-11-25 12:17:08 +08:00