|
|
c1f38bc937
|
Can't set SO Bit because of MXSTATUS
|
2023-11-26 14:31:34 +08:00 |
|
|
|
abad3d01ed
|
Can't set SO Bit because of MXSTATUS
|
2023-11-26 13:50:05 +08:00 |
|
|
|
8f81996f49
|
Update doc
|
2023-11-26 09:59:20 +08:00 |
|
|
|
c6bae539d1
|
Update doc
|
2023-11-26 09:45:57 +08:00 |
|
|
|
62bd627de5
|
Update doc
|
2023-11-26 09:44:36 +08:00 |
|
|
|
33eca90ec1
|
Update doc
|
2023-11-26 09:43:09 +08:00 |
|
|
|
c1a440491e
|
Update doc
|
2023-11-26 08:41:07 +08:00 |
|
|
|
63e0718793
|
After MMU Init: before1=0, before2=0, after1=0, after2=0
|
2023-11-26 08:29:09 +08:00 |
|
|
|
574d376e4e
|
Before MMU Init: before1=0, before2=0, after1=1, after2=0
|
2023-11-26 08:24:26 +08:00 |
|
|
|
2a44285514
|
Add article
|
2023-11-26 07:57:36 +08:00 |
|
|
|
bdb6f8beeb
|
Set PLIC Interrupt Priority in RISC-V Assembly. Same problem
|
2023-11-25 19:10:00 +08:00 |
|
|
|
eaaf1fbce8
|
sfence doesn't help
|
2023-11-25 13:44:53 +08:00 |
|
|
|
dddaae8de8
|
Update doc
|
2023-11-25 13:16:13 +08:00 |
|
|
|
92d6b0175a
|
Update doc
|
2023-11-25 13:11:52 +08:00 |
|
|
|
a42f3e4005
|
Test the setting of PLIC Interrupt Priority. Doesn't seem right
|
2023-11-25 13:11:01 +08:00 |
|
|
|
51745bea6a
|
Update doc
|
2023-11-25 12:17:08 +08:00 |
|
|
|
6278a647ef
|
Clear Pending Interrupts. Responds to keypress yay!
|
2023-11-25 11:51:18 +08:00 |
|
|
|
1326447727
|
Update doc
|
2023-11-25 08:47:36 +08:00 |
|
|
|
cdede49c39
|
Update doc
|
2023-11-25 08:46:40 +08:00 |
|
|
|
648b8def7a
|
Update doc
|
2023-11-25 08:06:57 +08:00 |
|
|
|
661146955b
|
Claim the Interrupt at startup. Still the same: riscv_dispatch_irq: irq=25, claim=0
|
2023-11-25 07:58:19 +08:00 |
|
|
|
0f100267a8
|
Update doc
|
2023-11-25 07:49:32 +08:00 |
|
|
|
2deef1da75
|
Claim not working
|
2023-11-25 00:16:13 +08:00 |
|
|
|
74e2b2bfab
|
Claim not working
|
2023-11-25 00:08:07 +08:00 |
|
|
|
cc6d203e4b
|
Handle Interrupt Pending. riscv_dispatch_irq: Do irq=45
|
2023-11-25 00:04:05 +08:00 |
|
|
|
46a1803f1b
|
Update doc
|
2023-11-24 22:44:07 +08:00 |
|
|
|
4ec00371e4
|
Log PLIC Interrupt Pending. Interrupt Pending is set!
|
2023-11-24 22:43:09 +08:00 |
|
|
|
44833f6812
|
Enable UART IRQ. riscv_dispatch_irq: irq=25, claim=0
|
2023-11-24 22:27:38 +08:00 |
|
|
|
c2a12e2672
|
Don't log IRQ 25. Hangs at NuttShell
|
2023-11-24 21:32:33 +08:00 |
|
|
|
6cd204cd62
|
Repeated riscv_dispatch_irq: irq=25. Yay!
|
2023-11-24 21:21:13 +08:00 |
|
|
|
b901991789
|
Repeated riscv_dispatch_irq: irq=25. Yay!
|
2023-11-24 20:54:47 +08:00 |
|
|
|
6f2c2c726b
|
Update doc
|
2023-11-24 20:43:11 +08:00 |
|
|
|
8aed05a109
|
Update doc
|
2023-11-24 20:18:53 +08:00 |
|
|
|
770d8fc68f
|
Update doc
|
2023-11-24 19:23:10 +08:00 |
|
|
|
20e05eadb1
|
Update doc
|
2023-11-24 19:11:24 +08:00 |
|
|
|
add90bb821
|
Update doc
|
2023-11-24 18:43:45 +08:00 |
|
|
|
90a756423d
|
Update doc
|
2023-11-24 18:35:11 +08:00 |
|
|
|
51b411d41e
|
Update doc
|
2023-11-23 12:20:29 +08:00 |
|
|
|
b5cf5755c6
|
Update doc
|
2023-11-23 12:18:56 +08:00 |
|
|
|
b941274ad9
|
Update doc
|
2023-11-23 12:15:34 +08:00 |
|
|
|
2ae248a15c
|
Update doc
|
2023-11-23 12:08:36 +08:00 |
|
|
|
2ee0e31e6f
|
Update doc
|
2023-11-23 12:05:34 +08:00 |
|
|
|
a2158f05fe
|
Update doc
|
2023-11-23 11:53:48 +08:00 |
|
|
|
4880da4fe3
|
Update doc
|
2023-11-23 11:51:19 +08:00 |
|
|
|
364ad10cac
|
Update doc
|
2023-11-22 22:37:17 +08:00 |
|
|
|
aa2162522b
|
Update doc
|
2023-11-21 12:52:42 +08:00 |
|
|
|
2d44de0363
|
Update doc
|
2023-11-21 12:51:24 +08:00 |
|
|
|
f73fa77e95
|
Update doc
|
2023-11-19 14:39:35 +08:00 |
|
|
|
1980f821ff
|
Update doc
|
2023-11-19 14:34:49 +08:00 |
|
|
|
ef261d2d42
|
Update doc
|
2023-11-19 14:08:05 +08:00 |
|
