Merge a7390aeb03 into a2d4d74af7

reason:
We would like to replace the critical section with a small lock.

Signed-off-by: hujun5 <hujun5@xiaomi.com>

CMakeLists.txt

@@ -727,6 +727,7 @@ else()
       OUTPUT nuttx.rel
       COMMAND
         ${CMAKE_C_COMPILER} ARGS -r $<$<BOOL:${CONFIG_SIM_M32}>:-m32>
+        $<$<BOOL:${CONFIG_HOST_LINUX}>:-Wl,-z,noexecstack>
         $<TARGET_OBJECTS:sim_head> $<$<NOT:$<BOOL:${APPLE}>>:-Wl,--start-group>
         ${nuttx_libs_paths} $<$<NOT:$<BOOL:${APPLE}>>:-Wl,--end-group> -o
         nuttx.rel

arch/arm/src/imx9/imx9_lpi2c.c

@@ -1103,7 +1103,7 @@ static void imx9_lpi2c_setclock(struct imx9_lpi2c_priv_s *priv,
                                             &src_freq);
 
           /* LPI2C output frequency = (Source Clock (Hz)/ 2^prescale) /
-           *   (CLKLO + 1 + CLKHI + 1 + ROUNDDOWN((2 + FILTSCL) / 2^prescale)
+           *   (CLKLO + 1 + CLKHI + 1 + ALIGN_DOWN((2 + FILTSCL)/2^prescale)
            *
            * Assume  CLKLO = 2 * CLKHI, SETHOLD = CLKHI, DATAVD = CLKHI / 2
            */

arch/arm/src/imxrt/imxrt_lpi2c.c

@@ -1161,7 +1161,7 @@ static void imxrt_lpi2c_setclock(struct imxrt_lpi2c_priv_s *priv,
 #endif
 
           /* LPI2C output frequency = (Source Clock (Hz)/ 2^prescale) /
-           *   (CLKLO + 1 + CLKHI + 1 + ROUNDDOWN((2 + FILTSCL) / 2^prescale)
+           *   (CLKLO + 1 + CLKHI + 1 + ALIGN_DOWN((2 + FILTSCL)/2^prescale)
            *
            * Assume  CLKLO = 2 * CLKHI, SETHOLD = CLKHI, DATAVD = CLKHI / 2
            */

arch/arm/src/s32k1xx/s32k1xx_lpi2c.c

@@ -1010,7 +1010,7 @@ static void s32k1xx_lpi2c_setclock(struct s32k1xx_lpi2c_priv_s *priv,
           DEBUGASSERT(src_freq != 0);
 
           /* LPI2C output frequency = (Source Clock (Hz)/ 2^prescale) /
-           *   (CLKLO + 1 + CLKHI + 1 + ROUNDDOWN((2 + FILTSCL) / 2^prescale)
+           *   (CLKLO + 1 + CLKHI + 1 + ALIGN_DOWN((2 + FILTSCL)/2^prescale)
            *
            * Assume  CLKLO = 2 * CLKHI, SETHOLD = CLKHI, DATAVD = CLKHI / 2
            */

arch/arm/src/s32k3xx/s32k3xx_lpi2c.c

@@ -990,7 +990,7 @@ static void s32k3xx_lpi2c_setclock(struct s32k3xx_lpi2c_priv_s *priv,
           DEBUGASSERT(src_freq != 0);
 
           /* LPI2C output frequency = (Source Clock (Hz)/ 2^prescale) /
-           *   (CLKLO + 1 + CLKHI + 1 + ROUNDDOWN((2 + FILTSCL) / 2^prescale)
+           *   (CLKLO + 1 + CLKHI + 1 + ALIGN_DOWN((2 + FILTSCL)/2^prescale)
            *
            * Assume  CLKLO = 2 * CLKHI, SETHOLD = CLKHI, DATAVD = CLKHI / 2
            */

arch/arm64/src/common/arm64_addrenv.c

@@ -179,8 +179,8 @@ static int create_spgtables(arch_addrenv_t *addrenv)
 
   /* Synchronize data and instruction pipelines */
 
-  ARM64_DSB();
-  ARM64_ISB();
+  __MB();
+  __ISB();
 
   return i;
 }
@@ -337,8 +337,8 @@ static int create_region(arch_addrenv_t *addrenv, uintptr_t vaddr,
 
   /* Synchronize data and instruction pipelines */
 
-  ARM64_DSB();
-  ARM64_ISB();
+  __MB();
+  __ISB();
 
   return npages;
 }
@@ -514,8 +514,8 @@ int up_addrenv_create(size_t textsize, size_t datasize, size_t heapsize,
 
   /* Synchronize data and instruction pipelines */
 
-  ARM64_DSB();
-  ARM64_ISB();
+  __MB();
+  __ISB();
 
   return OK;
 
@@ -603,8 +603,8 @@ int up_addrenv_destroy(arch_addrenv_t *addrenv)
 
   /* Synchronize data and instruction pipelines */
 
-  ARM64_DSB();
-  ARM64_ISB();
+  __MB();
+  __ISB();
 
   memset(addrenv, 0, sizeof(arch_addrenv_t));
   return OK;

arch/arm64/src/common/arm64_addrenv_pgmap.c

@@ -218,7 +218,7 @@ int up_addrenv_kmap_init(void)
 
   /* When all is set and done, flush the data caches */
 
-  ARM64_DSB();
+  __MB();
 
   return OK;
 }

arch/arm64/src/common/arm64_arch.h

@@ -321,13 +321,13 @@ static inline uint8_t getreg8(unsigned long addr)
 
   __asm__ volatile ("ldrb %w0, [%1]" : "=r" (val) : "r" (addr));
 
-  ARM64_DMB();
+  __DMB();
   return val;
 }
 
 static inline void putreg8(uint8_t data, unsigned long addr)
 {
-  ARM64_DMB();
+  __DMB();
   __asm__ volatile ("strb %w0, [%1]" : : "r" (data), "r" (addr));
 }
 
@@ -337,13 +337,13 @@ static inline uint16_t getreg16(unsigned long addr)
 
   __asm__ volatile ("ldrh %w0, [%1]" : "=r" (val) : "r" (addr));
 
-  ARM64_DMB();
+  __DMB();
   return val;
 }
 
 static inline void putreg16(uint16_t data, unsigned long addr)
 {
-  ARM64_DMB();
+  __DMB();
   __asm__ volatile ("strh %w0, [%1]" : : "r" (data), "r" (addr));
 }
 
@@ -353,13 +353,13 @@ static inline uint32_t getreg32(unsigned long addr)
 
   __asm__ volatile ("ldr %w0, [%1]" : "=r" (val) : "r" (addr));
 
-  ARM64_DMB();
+  __DMB();
   return val;
 }
 
 static inline void putreg32(uint32_t data, unsigned long addr)
 {
-  ARM64_DMB();
+  __DMB();
   __asm__ volatile ("str %w0, [%1]" : : "r" (data), "r" (addr));
 }
 
@@ -369,13 +369,13 @@ static inline uint64_t getreg64(unsigned long addr)
 
   __asm__ volatile ("ldr %x0, [%1]" : "=r" (val) : "r" (addr));
 
-  ARM64_DMB();
+  __DMB();
   return val;
 }
 
 static inline void putreg64(uint64_t data, unsigned long addr)
 {
-  ARM64_DMB();
+  __DMB();
   __asm__ volatile ("str %x0, [%1]" : : "r" (data), "r" (addr));
 }
 

arch/arm64/src/common/arm64_boot.c

@@ -66,7 +66,7 @@ void arm64_boot_el3_init(void)
   /* Setup vector table */
 
   write_sysreg((uint64_t)_vector_table, vbar_el3);
-  ARM64_ISB();
+  __ISB();
 
   reg = 0U;                   /* Mostly RES0 */
   reg &= ~(CPTR_TTA_BIT |     /* Do not trap sysreg accesses */
@@ -101,7 +101,7 @@ void arm64_boot_el3_init(void)
   write_sysreg(reg, ICC_SRE_EL3);
 #endif
 
-  ARM64_ISB();
+  __ISB();
 }
 
 void arm64_boot_el3_get_next_el(uint64_t switch_addr)
@@ -175,7 +175,7 @@ void arm64_boot_el2_init(void)
    * write_cnthp_cval_el2(~(uint64_t)0);
    */
 
-  ARM64_ISB();
+  __ISB();
 }
 
 void arm64_boot_el1_init(void)
@@ -185,7 +185,7 @@ void arm64_boot_el1_init(void)
   /* Setup vector table */
 
   write_sysreg((uint64_t)_vector_table, vbar_el1);
-  ARM64_ISB();
+  __ISB();
 
   reg = 0U;                       /* RES0 */
   reg |= CPACR_EL1_FPEN_NOTRAP;   /* Do not trap NEON/SIMD/FP initially */
@@ -209,7 +209,7 @@ void arm64_boot_el1_init(void)
    * write_cntps_cval_el1(~(uint64_t)0);
    */
 
-  ARM64_ISB();
+  __ISB();
 }
 
 void arm64_boot_primary_c_routine(void)

arch/arm64/src/common/arm64_cache.c

@@ -206,8 +206,8 @@ static inline int arm64_dcache_range(uintptr_t start_addr,
       start_addr += line_size;
     }
 
-  ARM64_DSB();
-  ARM64_ISB();
+  __MB();
+  __ISB();
 
   return 0;
 }
@@ -232,7 +232,7 @@ static inline int arm64_dcache_all(int op)
 
   /* Data barrier before start */
 
-  ARM64_DSB();
+  __MB();
 
   clidr_el1 = read_sysreg(clidr_el1);
 
@@ -259,7 +259,7 @@ static inline int arm64_dcache_all(int op)
 
       csselr_el1 = cache_level << 1;
       write_sysreg(csselr_el1, csselr_el1);
-      ARM64_ISB();
+      __ISB();
 
       ccsidr_el1    = read_sysreg(ccsidr_el1);
       line_size     =
@@ -319,8 +319,8 @@ static inline int arm64_dcache_all(int op)
   /* Restore csselr_el1 to level 0 */
 
   write_sysreg(0, csselr_el1);
-  ARM64_DSB();
-  ARM64_ISB();
+  __MB();
+  __ISB();
 
   return 0;
 }
@@ -427,7 +427,7 @@ void up_invalidate_icache(uintptr_t start, uintptr_t end)
 
   start = LINE_ALIGN_DOWN(start, line_size);
 
-  ARM64_DSB();
+  __MB();
 
   while (start < end)
     {
@@ -435,7 +435,7 @@ void up_invalidate_icache(uintptr_t start, uintptr_t end)
       start += line_size;
     }
 
-  ARM64_ISB();
+  __ISB();
 }
 
 /****************************************************************************
@@ -456,7 +456,7 @@ void up_enable_icache(void)
 {
   uint64_t value = read_sysreg(sctlr_el1);
   write_sysreg((value | SCTLR_I_BIT), sctlr_el1);
-  ARM64_ISB();
+  __ISB();
 }
 
 /****************************************************************************
@@ -477,7 +477,7 @@ void up_disable_icache(void)
 {
   uint64_t value = read_sysreg(sctlr_el1);
   write_sysreg((value & ~SCTLR_I_BIT), sctlr_el1);
-  ARM64_ISB();
+  __ISB();
 }
 
 #endif /* CONFIG_ARCH_ICACHE */
@@ -668,7 +668,7 @@ void up_enable_dcache(void)
 
   value = read_sysreg(sctlr_el1);
   write_sysreg((value | SCTLR_C_BIT), sctlr_el1);
-  ARM64_ISB();
+  __ISB();
 }
 
 /****************************************************************************
@@ -689,7 +689,7 @@ void up_disable_dcache(void)
 {
   uint64_t value = read_sysreg(sctlr_el1);
   write_sysreg((value & ~SCTLR_C_BIT), sctlr_el1);
-  ARM64_ISB();
+  __ISB();
 }
 
 /****************************************************************************

arch/arm64/src/common/arm64_fork.c

@@ -66,7 +66,7 @@ void arm64_fork_fpureg_save(struct fork_s *context)
   flags = enter_critical_section();
 
   arm64_fpu_save(context->fpu);
-  ARM64_DSB();
+  __MB();
 
   leave_critical_section(flags);
 }

arch/arm64/src/common/arm64_fpu.c

@@ -134,7 +134,7 @@ static void arm64_fpu_access_trap_enable(void)
   cpacr &= ~CPACR_EL1_FPEN_NOTRAP;
   write_sysreg(cpacr, cpacr_el1);
 
-  ARM64_ISB();
+  __ISB();
 }
 
 /* disable FPU access trap */
@@ -147,7 +147,7 @@ static void arm64_fpu_access_trap_disable(void)
   cpacr |= CPACR_EL1_FPEN_NOTRAP;
   write_sysreg(cpacr, cpacr_el1);
 
-  ARM64_ISB();
+  __ISB();
 }
 
 #ifdef CONFIG_FS_PROCFS_REGISTER

arch/arm64/src/common/arm64_gicv3.c

@@ -303,7 +303,7 @@ unsigned int arm64_gic_get_active_irq(void)
    * to be visible until after the execution of a DSB.
    */
 
-  ARM64_DSB();
+  __MB();
   return intid;
 }
 
@@ -322,7 +322,7 @@ unsigned int arm64_gic_get_active_fiq(void)
    * to be visible until after the execution of a DSB.
    */
 
-  ARM64_DSB();
+  __MB();
   return intid;
 }
 #endif
@@ -340,13 +340,13 @@ void aarm64_gic_eoi_irq(unsigned int intid)
    * DEVICE nGnRnE attribute.
    */
 
-  ARM64_DSB();
+  __MB();
 
   /* (AP -> Pending) Or (Active -> Inactive) or (AP to AP) nested case */
 
   write_sysreg(intid, ICC_EOIR1_EL1);
 
-  ARM64_ISB();
+  __ISB();
 }
 
 #ifdef CONFIG_ARM64_DECODEFIQ
@@ -363,12 +363,12 @@ void arm64_gic_eoi_fiq(unsigned int intid)
    * DEVICE nGnRnE attribute.
    */
 
-  ARM64_DSB();
+  __MB();
 
   /* (AP -> Pending) Or (Active -> Inactive) or (AP to AP) nested case */
 
   write_sysreg(intid, ICC_EOIR0_EL1);
-  ARM64_ISB();
+  __ISB();
 }
 #endif
 
@@ -392,7 +392,7 @@ static int arm64_gic_send_sgi(unsigned int sgi_id, uint64_t target_aff,
   sgi_val = GICV3_SGIR_VALUE(aff3, aff2, aff1, sgi_id, SGIR_IRM_TO_AFF,
                              target_list);
 
-  ARM64_DSB();
+  __MB();
 
   /* Read the IGROUPR0 value we set in `gicv3_cpuif_init` */
 
@@ -407,7 +407,7 @@ static int arm64_gic_send_sgi(unsigned int sgi_id, uint64_t target_aff,
       write_sysreg(sgi_val, ICC_SGI0R_EL1); /* Group 0 */
     }
 
-  ARM64_ISB();
+  __ISB();
 
   return 0;
 }
@@ -520,7 +520,7 @@ static void gicv3_cpuif_init(void)
          ICC_SRE_ELX_DFB_BIT);
       write_sysreg(icc_sre, ICC_SRE_EL1);
 
-      ARM64_ISB();
+      __ISB();
 
       icc_sre = read_sysreg(ICC_SRE_EL1);
 
@@ -537,7 +537,7 @@ static void gicv3_cpuif_init(void)
   write_sysreg(1, ICC_IGRPEN0_EL1);
 #endif
 
-  ARM64_ISB();
+  __ISB();
 }
 
 static void gicv3_dist_init(void)

arch/arm64/src/common/arm64_mmu.c

@@ -576,8 +576,8 @@ static void enable_mmu_el3(unsigned int flags)
 
   /* Ensure these changes are seen before MMU is enabled */
 
-  ARM64_DSB();
-  ARM64_ISB();
+  __MB();
+  __ISB();
 
   /* Enable the MMU and data cache */
 
@@ -590,7 +590,7 @@ static void enable_mmu_el3(unsigned int flags)
 
   /* Ensure the MMU enable takes effect immediately */
 
-  ARM64_ISB();
+  __ISB();
 #ifdef CONFIG_MMU_DEBUG
   sinfo("MMU enabled with dcache\n");
 #endif
@@ -609,8 +609,8 @@ static void enable_mmu_el1(unsigned int flags)
 
   /* Ensure these changes are seen before MMU is enabled */
 
-  ARM64_DSB();
-  ARM64_ISB();
+  __MB();
+  __ISB();
 
   /* Enable the MMU and data cache */
 
@@ -623,7 +623,7 @@ static void enable_mmu_el1(unsigned int flags)
 
   /* Ensure the MMU enable takes effect immediately */
 
-  ARM64_ISB();
+  __ISB();
 #ifdef CONFIG_MMU_DEBUG
   sinfo("MMU enabled with dcache\n");
 #endif

arch/arm64/src/common/arm64_mpu.c

@@ -128,8 +128,8 @@ static void mpu_init(void)
   uint64_t mair = MPU_MAIR_ATTRS;
 
   write_sysreg(mair, mair_el1);
-  ARM64_DSB();
-  ARM64_ISB();
+  __MB();
+  __ISB();
 }
 
 /****************************************************************************
@@ -185,15 +185,15 @@ void mpu_freeregion(unsigned int region)
   DEBUGASSERT(region < num_regions);
 
   write_sysreg(region, prselr_el1);
-  ARM64_DSB();
+  __MB();
 
   /* Set the region base, limit and attribute */
 
   write_sysreg(0, prbar_el1);
   write_sysreg(0, prlar_el1);
   g_mpu_region &= ~(1 << region);
-  ARM64_DSB();
-  ARM64_ISB();
+  __MB();
+  __ISB();
 }
 
 /****************************************************************************
@@ -221,8 +221,8 @@ void arm64_mpu_enable(void)
 #endif
          );
   write_sysreg(val, sctlr_el1);
-  ARM64_DSB();
-  ARM64_ISB();
+  __MB();
+  __ISB();
 }
 
 /****************************************************************************
@@ -245,13 +245,13 @@ void arm64_mpu_disable(void)
 
   /* Force any outstanding transfers to complete before disabling MPU */
 
-  ARM64_DMB();
+  __DMB();
 
   val = read_sysreg(sctlr_el1);
   val &= ~(SCTLR_M_BIT | SCTLR_C_BIT);
   write_sysreg(val, sctlr_el1);
-  ARM64_DSB();
-  ARM64_ISB();
+  __MB();
+  __ISB();
 }
 
 /****************************************************************************
@@ -290,14 +290,14 @@ void mpu_modify_region(unsigned int region,
   /* Select the region */
 
   write_sysreg(region, prselr_el1);
-  ARM64_DSB();
+  __MB();
 
   /* Set the region base, limit and attribute */
 
   write_sysreg(rbar, prbar_el1);
   write_sysreg(rlar, prlar_el1);
-  ARM64_DSB();
-  ARM64_ISB();
+  __MB();
+  __ISB();
 }
 
 /****************************************************************************

arch/arm64/src/common/barriers.h

@@ -37,13 +37,13 @@
  * ARM DDI 0487E.a C6.2.81
  */
 
-#define __DSB(arg) __asm__ volatile ("dsb " #arg : : : "memory");
+#define __MB() __asm__ volatile ("dsb sy" : : : "memory");
 
 /* See Arm® Architecture Reference Manual
  * ARM DDI 0487E.a C6.2.79
  */
 
-#define __DMB(arg) __asm__ volatile ("dmb " #arg : : : "memory");
+#define __DMB() __asm__ volatile ("dmb sy" : : : "memory");
 
 /* See Arm® Architecture Reference Manual
  * ARM DDI 0487E.a C6.2.96
@@ -51,12 +51,6 @@
 
 #define __ISB()    __asm__ volatile ("isb" : : : "memory");
 
-/* THe most common barriers */
-
-#define ARM64_DSB()  __DSB(sy)
-#define ARM64_DMB()  __DMB(sy)
-#define ARM64_ISB()  __ISB()
-
 #endif /* __ASSEMBLY__ */
 
 #endif /* ___ARCH_ARM64_SRC_COMMON_BARRIERS_H */

arch/arm64/src/fvp-v8r/fvp_boot.c

@@ -113,7 +113,7 @@ void arm64_el_init(void)
 {
   write_sysreg(CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC, cntfrq_el0);
 
-  ARM64_ISB();
+  __ISB();
 }
 
 #ifdef CONFIG_SMP

arch/arm64/src/goldfish/goldfish_boot.c

@@ -134,7 +134,7 @@ void arm64_el_init(void)
 {
   write_sysreg(CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC, cntfrq_el0);
 
-  ARM64_ISB();
+  __ISB();
 }
 
 /****************************************************************************

arch/arm64/src/imx8/imx8_boot.c

@@ -89,7 +89,7 @@ void arm64_el_init(void)
   if (el == 3)
     {
       write_sysreg(CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC, cntfrq_el0);
-      ARM64_ISB();
+      __ISB();
     }
 }
 

arch/arm64/src/imx9/imx9_ccm.c

@@ -43,12 +43,12 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-#define mb()       \
-  do               \
-    {              \
-      ARM64_DSB(); \
-      ARM64_ISB(); \
-    }              \
+#define mb()   \
+  do           \
+    {          \
+      __MB();  \
+      __ISB(); \
+    }          \
   while (0)
 
 /****************************************************************************

arch/arm64/src/imx9/imx9_clockconfig.c

@@ -52,12 +52,12 @@
 
 /* Common barrier */
 
-#define mb()       \
-  do               \
-    {              \
-      ARM64_DSB(); \
-      ARM64_ISB(); \
-    }              \
+#define mb()   \
+  do           \
+    {          \
+      __MB();  \
+      __ISB(); \
+    }          \
   while (0)
 
 /****************************************************************************

arch/arm64/src/imx9/imx9_enet.c

@@ -611,7 +611,7 @@ static int imx9_transmit(struct imx9_driver_s *priv, uint32_t *buf_swap)
 
   txdesc2->data = buf + split;
 
-  ARM64_DSB();
+  __MB();
 
   /* Make sure the buffer data is in memory */
 
@@ -650,9 +650,9 @@ static int imx9_transmit(struct imx9_driver_s *priv, uint32_t *buf_swap)
    * is safe to clean the cache
    */
 
-  ARM64_DMB();
+  __DMB();
   txdesc->status1 = TXDESC_R;
-  ARM64_DSB();
+  __MB();
 
   /* Make sure the descriptors are written from cache to memory */
 
@@ -999,9 +999,9 @@ static void imx9_receive(struct imx9_driver_s *priv)
                * to this descriptor pair.
                */
 
-              ARM64_DMB();
+              __DMB();
               rxdesc->status1  = RXDESC_E;
-              ARM64_DSB();
+              __MB();
 
               up_clean_dcache((uintptr_t)&rxdesc[(-1)],
                               (uintptr_t)&rxdesc[(-1)] +
@@ -2955,7 +2955,7 @@ static void imx9_initbuffers(struct imx9_driver_s *priv)
   priv->txdesc[IMX9_ENET_NTXBUFFERS - 1].d2.status1 |= TXDESC_W;
   priv->rxdesc[IMX9_ENET_NRXBUFFERS - 1].status1 |= RXDESC_W;
 
-  ARM64_DSB();
+  __MB();
 
   up_clean_dcache((uintptr_t)priv->txdesc,
                   (uintptr_t)priv->txdesc +

arch/arm64/src/imx9/imx9_flexcan.c

@@ -1280,7 +1280,7 @@ static void imx9_txtimeout_work(void *arg)
       /* Disable interrupt for this MB */
 
       modifyreg32(priv->base + IMX9_CAN_IMASK1_OFFSET, mb_bit, 0);
-      ARM64_DSB();
+      __MB();
 
       if (priv->txmb[txmbi].deadline.tv_sec != 0
           && (now->tv_sec > priv->txmb[txmbi].deadline.tv_sec

arch/arm64/src/imx9/imx9_lpi2c.c

@@ -1122,7 +1122,7 @@ static void imx9_lpi2c_setclock(struct imx9_lpi2c_priv_s *priv,
           imx9_get_rootclock(priv->config->clk_root, &src_freq);
 
           /* LPI2C output frequency = (Source Clock (Hz)/ 2^prescale) /
-           *   (CLKLO + 1 + CLKHI + 1 + ROUNDDOWN((2 + FILTSCL) / 2^prescale)
+           *   (CLKLO + 1 + CLKHI + 1 + ALIGN_DOWN((2 + FILTSCL)/2^prescale)
            *
            * Assume  CLKLO = 2 * CLKHI, SETHOLD = CLKHI, DATAVD = CLKHI / 2
            */

arch/arm64/src/imx9/imx9_usbdev.c

@@ -871,7 +871,7 @@ static void imx9_readsetup(struct imx9_usb_s *priv, uint8_t epphy,
   /* Set the trip wire */
 
   imx9_modifyreg(priv, IMX9_USBDEV_USBCMD_OFFSET, 0, USBDEV_USBCMD_SUTW);
-  ARM64_DSB();
+  __MB();
 
   DEBUGASSERT(IS_CACHE_ALIGNED(dqh, sizeof(struct imx9_dqh_s)));
   up_invalidate_dcache((uintptr_t)dqh,
@@ -895,7 +895,7 @@ static void imx9_readsetup(struct imx9_usb_s *priv, uint8_t epphy,
 
   imx9_putreg(priv, IMX9_USBDEV_ENDPTSETUPSTAT_OFFSET,
               IMX9_ENDPTMASK(IMX9_EP0_OUT));
-  ARM64_DSB();
+  __MB();
 }
 
 /****************************************************************************
@@ -1325,7 +1325,7 @@ static inline void imx9_ep0state(struct imx9_usb_s *priv,
       break;
     }
 
-  ARM64_DSB();
+  __MB();
 }
 
 /****************************************************************************

arch/arm64/src/zynq-mpsoc/zynq_boot.c

@@ -99,7 +99,7 @@ void arm64_el_init(void)
   /* At EL3, cntfrq_el0 is uninitialized. It must be set. */
 
   write_sysreg(CONFIG_XPAR_CPU_CORTEXA53_0_TIMESTAMP_CLK_FREQ, cntfrq_el0);
-  ARM64_ISB();
+  __ISB();
 #endif
 }
 

arch/risc-v/src/common/Toolchain.defs

@@ -433,7 +433,12 @@ LDMODULEFLAGS = -r -T $(call CONVERT_PATH,$(TOPDIR)/libs/libc/modlib/gnu-elf.ld)
 CELFFLAGS = $(CFLAGS) -fvisibility=hidden
 CXXELFFLAGS = $(CXXFLAGS) -fvisibility=hidden
 
-LDELFFLAGS = -r -e main
+LDELFFLAGS = -e main
+
+ifeq ($(CONFIG_BINFMT_ELF_RELOCATABLE),y)
+  LDELFFLAGS += -r
+endif
+
 ifeq ($(CONFIG_ARCH_RV32),y)
   LDELFFLAGS += --oformat elf32-littleriscv
 else

arch/sim/src/cmake/Toolchain.cmake

@@ -200,3 +200,7 @@ else()
   add_link_options(-Wl,--gc-sections)
   add_link_options(-Wl,-Ttext-segment=0x40000000)
 endif()
+
+if(CONFIG_HOST_LINUX)
+  add_link_options(-Wl,-z,noexecstack)
+endif()

binfmt/binfmt_copyactions.c

@@ -31,18 +31,13 @@
 #include <errno.h>
 
 #include <nuttx/kmalloc.h>
+#include <nuttx/nuttx.h>
 #include <nuttx/binfmt/binfmt.h>
 
 #include "binfmt.h"
 
 #if defined(CONFIG_ARCH_ADDRENV) && defined(CONFIG_BUILD_KERNEL) && !defined(CONFIG_BINFMT_DISABLE)
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-#define ROUNDUP(x, y)     (((x) + (y) - 1) / (y) * (y))
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -98,8 +93,8 @@ int binfmt_copyactions(FAR const posix_spawn_file_actions_t **copy,
 
           case SPAWN_FILE_ACTION_OPEN:
             open = (FAR struct spawn_open_file_action_s *)entry;
-            size += ROUNDUP(SIZEOF_OPEN_FILE_ACTION_S(strlen(open->path)),
-                            sizeof(FAR void *));
+            size += ALIGN_UP(SIZEOF_OPEN_FILE_ACTION_S(strlen(open->path)),
+                             sizeof(FAR void *));
             break;
 
           default:
@@ -155,8 +150,8 @@ int binfmt_copyactions(FAR const posix_spawn_file_actions_t **copy,
             strcpy(open->path, tmp->path);
 
             buffer = (FAR char *)buffer +
-                     ROUNDUP(SIZEOF_OPEN_FILE_ACTION_S(strlen(tmp->path)),
-                             sizeof(FAR void *));
+                     ALIGN_UP(SIZEOF_OPEN_FILE_ACTION_S(strlen(tmp->path)),
+                              sizeof(FAR void *));
             break;
 
           default:

boards/arm64/a64/pinephone/src/pinephone_display.c

@@ -914,9 +914,9 @@ void pinephone_display_test_pattern(void)
 
       /* Fixes missing rows in the rendered image, not sure why */
 
-      ARM64_DMB();
-      ARM64_DSB();
-      ARM64_ISB();
+      __DMB();
+      __MB();
+      __ISB();
     }
 
   /* Init Framebuffer 1:
@@ -931,9 +931,9 @@ void pinephone_display_test_pattern(void)
 
       /* Fixes missing rows in the rendered image, not sure why */
 
-      ARM64_DMB();
-      ARM64_DSB();
-      ARM64_ISB();
+      __DMB();
+      __MB();
+      __ISB();
     }
 
   /* Init Framebuffer 2:
@@ -972,9 +972,9 @@ void pinephone_display_test_pattern(void)
 
           /* Fixes missing rows in the rendered image, not sure why */
 
-          ARM64_DMB();
-          ARM64_DSB();
-          ARM64_ISB();
+          __DMB();
+          __MB();
+          __ISB();
         }
     }
 }

libs/libbuiltin/libgcc/profile.c

@@ -35,6 +35,7 @@
 #include <nuttx/init.h>
 #include <nuttx/kmalloc.h>
 #include <nuttx/fs/fs.h>
+#include <nuttx/nuttx.h>
 #include <nuttx/spinlock.h>
 
 /****************************************************************************
@@ -112,11 +113,6 @@
 
 #define MAXARCS         (1 << 20)
 
-/* General rounding functions. */
-
-#define ROUNDDOWN(x, y) (((x) / (y)) * (y))
-#define ROUNDUP(x, y)   ((((x) + (y) - 1) / (y)) * (y))
-
 /* See profil(2) where this is described (incorrectly) */
 
 #define SCALE_1_TO_1    0x10000
@@ -288,13 +284,13 @@ void moncontrol(int mode)
 
   if (mode)
     {
-      uintptr_t lowpc = ROUNDDOWN((uintptr_t)&_stext,
+      uintptr_t lowpc = ALIGN_DOWN((uintptr_t)&_stext,
                                    HISTFRACTION * sizeof(HISTCOUNTER));
-      uintptr_t highpc = ROUNDUP((uintptr_t)&_etext,
-                                 HISTFRACTION * sizeof(HISTCOUNTER));
+      uintptr_t highpc = ALIGN_UP((uintptr_t)&_etext,
+                                  HISTFRACTION * sizeof(HISTCOUNTER));
       size_t textsize = highpc - lowpc;
-      size_t kcountsize = ROUNDUP(textsize / HISTFRACTION,
-                                  sizeof(*p->kcount));
+      size_t kcountsize = ALIGN_UP(textsize / HISTFRACTION,
+                                   sizeof(*p->kcount));
       int scale = kcountsize >= textsize ? SCALE_1_TO_1 :
                   (float)kcountsize / textsize * SCALE_1_TO_1;
       FAR unsigned short *kcount = kmm_zalloc(kcountsize);
@@ -370,10 +366,10 @@ void monstartup(unsigned long lowpc, unsigned long highpc)
    * so the rest of the scaling (here and in gprof) stays in ints.
    */
 
-  lowpc = ROUNDDOWN(lowpc, HISTFRACTION * sizeof(HISTCOUNTER));
-  highpc = ROUNDUP(highpc, HISTFRACTION * sizeof(HISTCOUNTER));
+  lowpc = ALIGN_DOWN(lowpc, HISTFRACTION * sizeof(HISTCOUNTER));
+  highpc = ALIGN_UP(highpc, HISTFRACTION * sizeof(HISTCOUNTER));
   textsize = highpc - lowpc;
-  fromssize = ROUNDUP(textsize / HASHFRACTION, sizeof(*p->froms));
+  fromssize = ALIGN_UP(textsize / HASHFRACTION, sizeof(*p->froms));
   tolimit = textsize * ARCDENSITY / 100;
 
   if (tolimit < MINARCS)

mm/iob/iob.h

@@ -41,8 +41,6 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-#define ROUNDUP(x, y)            (((x) + (y) - 1) / (y) * (y))
-
 #if defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_IOB_DEBUG)
 #  define ioberr                 _err
 #  define iobwarn                _warn

mm/iob/iob_alloc.c

@@ -35,6 +35,7 @@
 #ifdef CONFIG_IOB_ALLOC
 #  include <nuttx/kmalloc.h>
 #endif
+#include <nuttx/nuttx.h>
 #include <nuttx/mm/iob.h>
 
 #include "iob.h"
@@ -333,7 +334,7 @@ FAR struct iob_s *iob_alloc_dynamic(uint16_t size)
   FAR struct iob_s *iob;
   size_t alignsize;
 
-  alignsize = ROUNDUP(sizeof(struct iob_s), CONFIG_IOB_ALIGNMENT) + size;
+  alignsize = ALIGN_UP(sizeof(struct iob_s), CONFIG_IOB_ALIGNMENT) + size;
 
   iob = kmm_memalign(CONFIG_IOB_ALIGNMENT, alignsize);
   if (iob)
@@ -344,8 +345,8 @@ FAR struct iob_s *iob_alloc_dynamic(uint16_t size)
       iob->io_bufsize = size;             /* Total length of the iob buffer */
       iob->io_pktlen  = 0;                /* Total length of the packet */
       iob->io_free    = iob_free_dynamic; /* Customer free callback */
-      iob->io_data    = (FAR uint8_t *)ROUNDUP((uintptr_t)(iob + 1),
-                                               CONFIG_IOB_ALIGNMENT);
+      iob->io_data    = (FAR uint8_t *)ALIGN_UP((uintptr_t)(iob + 1),
+                                                CONFIG_IOB_ALIGNMENT);
     }
 
   return iob;

mm/iob/iob_initialize.c

@@ -28,6 +28,7 @@
 
 #include <stdbool.h>
 
+#include <nuttx/nuttx.h>
 #include <nuttx/mm/iob.h>
 
 #include "iob.h"
@@ -39,10 +40,10 @@
 /* Fix the I/O Buffer size with specified alignment size */
 
 #ifdef CONFIG_IOB_ALLOC
-#  define IOB_ALIGN_SIZE  ROUNDUP(sizeof(struct iob_s) + CONFIG_IOB_BUFSIZE, \
-                                  CONFIG_IOB_ALIGNMENT)
+#  define IOB_ALIGN_SIZE  ALIGN_UP(sizeof(struct iob_s) + CONFIG_IOB_BUFSIZE, \
+                                   CONFIG_IOB_ALIGNMENT)
 #else
-#  define IOB_ALIGN_SIZE  ROUNDUP(sizeof(struct iob_s), CONFIG_IOB_ALIGNMENT)
+#  define IOB_ALIGN_SIZE  ALIGN_UP(sizeof(struct iob_s), CONFIG_IOB_ALIGNMENT)
 #endif
 
 #define IOB_BUFFER_SIZE   (IOB_ALIGN_SIZE * CONFIG_IOB_NBUFFERS + \
@@ -137,8 +138,8 @@ void iob_initialize(void)
    * aligned to the CONFIG_IOB_ALIGNMENT memory boundary
    */
 
-  buf = ROUNDUP((uintptr_t)g_iob_buffer + offsetof(struct iob_s, io_data),
-                CONFIG_IOB_ALIGNMENT) - offsetof(struct iob_s, io_data);
+  buf = ALIGN_UP((uintptr_t)g_iob_buffer + offsetof(struct iob_s, io_data),
+                 CONFIG_IOB_ALIGNMENT) - offsetof(struct iob_s, io_data);
 
   /* Get I/O buffer instance from the start address and add each I/O buffer
    * to the free list

sched/clock/clock_timekeeping.c

@@ -53,6 +53,7 @@ static struct timespec g_clock_wall_time;
 static uint64_t        g_clock_last_counter;
 static uint64_t        g_clock_mask;
 static long            g_clock_adjust;
+static spinlock_t      g_clock_lock = SP_UNLOCKED;
 
 /****************************************************************************
  * Private Functions
@@ -72,7 +73,7 @@ static int clock_get_current_time(FAR struct timespec *ts,
   time_t sec;
   int ret;
 
-  flags = enter_critical_section();
+  flags = spin_lock_irqsave(&g_clock_lock);
 
   ret = up_timer_gettick(&counter);
   if (ret < 0)
@@ -96,7 +97,7 @@ static int clock_get_current_time(FAR struct timespec *ts,
   ts->tv_sec = base->tv_sec + sec;
 
 errout_in_critical_section:
-  leave_critical_section(flags);
+  spin_unlock_irqrestore(&g_clock_lock, flags);
   return ret;
 }
 
@@ -123,7 +124,7 @@ int clock_timekeeping_set_wall_time(FAR const struct timespec *ts)
   uint64_t counter;
   int ret;
 
-  flags = enter_critical_section();
+  flags = spin_lock_irqsave(&g_clock_lock);
 
   ret = up_timer_gettick(&counter);
   if (ret < 0)
@@ -137,7 +138,7 @@ int clock_timekeeping_set_wall_time(FAR const struct timespec *ts)
   g_clock_last_counter = counter;
 
 errout_in_critical_section:
-  leave_critical_section(flags);
+  spin_unlock_irqrestore(&g_clock_lock, flags);
   return ret;
 }
 
@@ -188,7 +189,7 @@ int adjtime(FAR const struct timeval *delta, FAR struct timeval *olddelta)
       return -1;
     }
 
-  flags = enter_critical_section();
+  flags = spin_lock_irqsave(&g_clock_lock);
 
   adjust_usec = delta->tv_sec * USEC_PER_SEC + delta->tv_usec;
 
@@ -199,7 +200,7 @@ int adjtime(FAR const struct timeval *delta, FAR struct timeval *olddelta)
 
   g_clock_adjust = adjust_usec;
 
-  leave_critical_section(flags);
+  spin_unlock_irqrestore(&g_clock_lock, flags);
 
   return OK;
 }
@@ -217,7 +218,7 @@ void clock_update_wall_time(void)
   time_t sec;
   int ret;
 
-  flags = enter_critical_section();
+  flags = spin_lock_irqsave(&g_clock_lock);
 
   ret = up_timer_gettick(&counter);
   if (ret < 0)
@@ -271,7 +272,7 @@ void clock_update_wall_time(void)
   g_clock_last_counter = counter;
 
 errout_in_critical_section:
-  leave_critical_section(flags);
+  spin_unlock_irqrestore(&g_clock_lock, flags);
 }
 
 /****************************************************************************
@@ -280,6 +281,9 @@ errout_in_critical_section:
 
 void clock_inittimekeeping(FAR const struct timespec *tp)
 {
+  irqstate_t flags;
+
+  flags = spin_lock_irqsave(&g_clock_lock);
   up_timer_getmask(&g_clock_mask);
 
   if (tp)
@@ -292,6 +296,7 @@ void clock_inittimekeeping(FAR const struct timespec *tp)
     }
 
   up_timer_gettick(&g_clock_last_counter);
+  spin_unlock_irqrestore(&g_clock_lock, flags);
 }
 
 #endif /* CONFIG_CLOCK_TIMEKEEPING */

sched/misc/coredump.c

@@ -32,6 +32,7 @@
 
 #include <nuttx/coredump.h>
 #include <nuttx/elf.h>
+#include <nuttx/nuttx.h>
 #include <nuttx/sched.h>
 
 #include "sched/sched.h"
@@ -54,9 +55,6 @@
 
 #define PROGRAM_ALIGNMENT 64
 
-#define ROUNDUP(x, y)     ((x + (y - 1)) / (y)) * (y)
-#define ROUNDDOWN(x ,y)   (((x) / (y)) * (y))
-
 /****************************************************************************
  * Private Types
  ****************************************************************************/
@@ -166,8 +164,8 @@ static int elf_emit(FAR struct elf_dumpinfo_s *cinfo,
 
 static int elf_emit_align(FAR struct elf_dumpinfo_s *cinfo)
 {
-  off_t align = ROUNDUP(cinfo->stream->nput,
-                        ELF_PAGESIZE) - cinfo->stream->nput;
+  off_t align = ALIGN_UP(cinfo->stream->nput,
+                         ELF_PAGESIZE) - cinfo->stream->nput;
   unsigned char null[256];
   off_t total = align;
   off_t ret = 0;
@@ -258,10 +256,10 @@ static int elf_get_note_size(int stksegs)
 {
   int total;
 
-  total  = stksegs * (sizeof(Elf_Nhdr) + ROUNDUP(CONFIG_TASK_NAME_SIZE, 8) +
-                     sizeof(elf_prstatus_t));
-  total += stksegs * (sizeof(Elf_Nhdr) + ROUNDUP(CONFIG_TASK_NAME_SIZE, 8) +
-                     sizeof(elf_prpsinfo_t));
+  total  = stksegs * (sizeof(Elf_Nhdr) + ALIGN_UP(CONFIG_TASK_NAME_SIZE, 8) +
+                      sizeof(elf_prstatus_t));
+  total += stksegs * (sizeof(Elf_Nhdr) + ALIGN_UP(CONFIG_TASK_NAME_SIZE, 8) +
+                      sizeof(elf_prpsinfo_t));
   return total;
 }
 
@@ -276,7 +274,7 @@ static int elf_get_note_size(int stksegs)
 static void elf_emit_tcb_note(FAR struct elf_dumpinfo_s *cinfo,
                               FAR struct tcb_s *tcb)
 {
-  char name[ROUNDUP(CONFIG_TASK_NAME_SIZE, 8)];
+  char name[ALIGN_UP(CONFIG_TASK_NAME_SIZE, 8)];
   elf_prstatus_t status;
   elf_prpsinfo_t info;
   FAR uintptr_t *regs;
@@ -414,8 +412,8 @@ static void elf_emit_tcb_stack(FAR struct elf_dumpinfo_s *cinfo,
             (tcb->stack_base_ptr - tcb->stack_alloc_ptr);
     }
 
-  sp  = ROUNDDOWN(buf, PROGRAM_ALIGNMENT);
-  len = ROUNDUP(len + (buf - sp), PROGRAM_ALIGNMENT);
+  sp  = ALIGN_DOWN(buf, PROGRAM_ALIGNMENT);
+  len = ALIGN_UP(len + (buf - sp), PROGRAM_ALIGNMENT);
   buf = sp;
 
   elf_emit(cinfo, (FAR void *)buf, len);
@@ -546,17 +544,17 @@ static void elf_emit_tcb_phdr(FAR struct elf_dumpinfo_s *cinfo,
                       (tcb->stack_base_ptr - tcb->stack_alloc_ptr);
     }
 
-  sp = ROUNDDOWN(phdr->p_vaddr, PROGRAM_ALIGNMENT);
-  phdr->p_filesz = ROUNDUP(phdr->p_filesz +
-                           (phdr->p_vaddr - sp), PROGRAM_ALIGNMENT);
+  sp = ALIGN_DOWN(phdr->p_vaddr, PROGRAM_ALIGNMENT);
+  phdr->p_filesz = ALIGN_UP(phdr->p_filesz +
+                            (phdr->p_vaddr - sp), PROGRAM_ALIGNMENT);
   phdr->p_vaddr  = sp;
 
   phdr->p_type   = PT_LOAD;
-  phdr->p_offset = ROUNDUP(*offset, ELF_PAGESIZE);
+  phdr->p_offset = ALIGN_UP(*offset, ELF_PAGESIZE);
   phdr->p_paddr  = phdr->p_vaddr;
   phdr->p_memsz  = phdr->p_filesz;
   phdr->p_flags  = PF_X | PF_W | PF_R;
-  *offset       += ROUNDUP(phdr->p_memsz, ELF_PAGESIZE);
+  *offset       += ALIGN_UP(phdr->p_memsz, ELF_PAGESIZE);
 
   elf_emit(cinfo, phdr, sizeof(*phdr));
 }
@@ -608,13 +606,13 @@ static void elf_emit_phdr(FAR struct elf_dumpinfo_s *cinfo,
   for (i = 0; i < memsegs; i++)
     {
       phdr.p_type   = PT_LOAD;
-      phdr.p_offset = ROUNDUP(offset, ELF_PAGESIZE);
+      phdr.p_offset = ALIGN_UP(offset, ELF_PAGESIZE);
       phdr.p_vaddr  = cinfo->regions[i].start;
       phdr.p_paddr  = phdr.p_vaddr;
       phdr.p_filesz = cinfo->regions[i].end - cinfo->regions[i].start;
       phdr.p_memsz  = phdr.p_filesz;
       phdr.p_flags  = cinfo->regions[i].flags;
-      offset       += ROUNDUP(phdr.p_memsz, ELF_PAGESIZE);
+      offset       += ALIGN_UP(phdr.p_memsz, ELF_PAGESIZE);
       elf_emit(cinfo, &phdr, sizeof(phdr));
     }
 }