Most tools used for compliance and SBOM generation use SPDX identifiers
This change brings us a step closer to an easy SBOM generation.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
test code hello_main
int main(int argc, FAR char *argv[])
{
uint32_t *p = 0xdeedbeff;
*p = 0xffffff;
printf("%p\n %x\n", p, *p);
return 0;
}
qemu mps3-an547 hello_main :
Triggering an exception, and gdb backtrace is:
before:
(gdb) bt
/#0 0x0001168a in systick_getstatus (lower_=0x100010c <g_systick_lower>, status=0x1000a30 <g_intstackalloc+1600>)
at /home/ajh/work/vela_system/nuttx/arch/arm/src/armv8-m/arm_systick.c:142
/#1 0x000122f4 in current_usec () at /home/ajh/work/vela_system/nuttx/drivers/timers/arch_timer.c:105
/#2 0x0001234c in udelay_accurate (microseconds=250000) at /home/ajh/work/vela_system/nuttx/drivers/timers/arch_timer.c:115
/#3 0x000124bc in up_udelay (microseconds=250000) at /home/ajh/work/vela_system/nuttx/drivers/timers/arch_timer.c:463
/#4 0x0001249e in up_mdelay (milliseconds=250) at /home/ajh/work/vela_system/nuttx/drivers/timers/arch_timer.c:446
/#5 0x0000920c in reset_board () at /home/ajh/work/vela_system/nuttx/sched/misc/assert.c:830
/#6 0x0000937c in _assert (filename=0x393f8 "/arch/arm/src/armv8-m/arm_busfault.c", linenum=113, msg=0x393f0 "panic", regs=0x1008500)
at /home/ajh/work/vela_system/nuttx/sched/misc/assert.c:940
/#7 0x00000e2c in arm_busfault (irq=3, context=0x1008500, arg=0x0 <up_ndelay>) at /home/ajh/work/vela_system/nuttx/arch/arm/src/armv8-m/arm_busfault.c:113
/#8 0x000012d2 in arm_hardfault (irq=3, context=0x1008500, arg=0x0 <up_ndelay>)
at /home/ajh/work/vela_system/nuttx/arch/arm/src/armv8-m/arm_hardfault.c:142
/#9 0x00008b20 in irq_dispatch (irq=3, context=0x1008500) at /home/ajh/work/vela_system/nuttx/sched/irq/irq_dispatch.c:145
/#10 0x0000041a in arm_doirq (irq=3, regs=0x1008500) at /home/ajh/work/vela_system/nuttx/arch/arm/src/armv8-m/arm_doirq.c:103
/#11 0x0000034e in exception_common () at /home/ajh/work/vela_system/nuttx/arch/arm/src/armv8-m/arm_exception.S:224
after:
(gdb) bt
/#0 systick_is_running () at /home/ajh/work/vela_system/nuttx/arch/arm/src/armv8-m/arm_systick.c:106
/#1 0x000125c0 in systick_getstatus (lower_=0x1000114 <g_systick_lower>, status=0x1007a20)
at /home/ajh/work/vela_system/nuttx/arch/arm/src/armv8-m/arm_systick.c:141
/#2 0x0001323c in current_usec () at /home/ajh/work/vela_system/nuttx/drivers/timers/arch_timer.c:105
/#3 0x00013294 in udelay_accurate (microseconds=250000) at /home/ajh/work/vela_system/nuttx/drivers/timers/arch_timer.c:115
/#4 0x00013404 in up_udelay (microseconds=250000) at /home/ajh/work/vela_system/nuttx/drivers/timers/arch_timer.c:463
/#5 0x000133e6 in up_mdelay (milliseconds=250) at /home/ajh/work/vela_system/nuttx/drivers/timers/arch_timer.c:446
/#6 0x00008c5c in reset_board () at /home/ajh/work/vela_system/nuttx/sched/misc/assert.c:816
/#7 0x00008e88 in _assert (filename=0x39408 "/arch/arm/src/armv8-m/arm_busfault.c", linenum=113, msg=0x39400 "panic", regs=0x1007cf0)
at /home/ajh/work/vela_system/nuttx/sched/misc/assert.c:915
/#8 0x00000ce4 in arm_busfault (irq=3, context=0x1007cf0, arg=0x0 <up_ndelay>)
at /home/ajh/work/vela_system/nuttx/arch/arm/src/armv8-m/arm_busfault.c:113
/#9 0x0000118a in arm_hardfault (irq=3, context=0x1007cf0, arg=0x0 <up_ndelay>)
at /home/ajh/work/vela_system/nuttx/arch/arm/src/armv8-m/arm_hardfault.c:142
/#10 0x000086cc in irq_dispatch (irq=3, context=0x1007cf0) at /home/ajh/work/vela_system/nuttx/sched/irq/irq_dispatch.c:145
/#11 0x0000041e in arm_doirq (irq=3, regs=0x1007cf0) at /home/ajh/work/vela_system/nuttx/arch/arm/src/armv8-m/arm_doirq.c:99
/#12 0x00000360 in exception_common () at /home/ajh/work/vela_system/nuttx/arch/arm/src/armv8-m/arm_exception.S:230
/#13 0x00027a8c in hello_main (argc=1, argv=0x1006e20) at /home/ajh/work/vela_system/apps/examples/hello/hello_main.c:39
/#14 0x00014968 in nxtask_startup (entrypt=0x27a7d <hello_main>, argc=1, argv=0x1006e20)
at /home/ajh/work/vela_system/nuttx/libs/libc/sched/task_startup.c:72
/#15 0x0000f450 in nxtask_start () at /home/ajh/work/vela_system/nuttx/sched/task/task_start.c:116
/#16 0x00000000 in ?? ()
(gdb)
qemu armv7a nsh, hello_main:
before:
(gdb) bt
/#0 udelay_coarse (microseconds=156000) at /home/ajh/work/vela_system/nuttx/drivers/timers/arch_alarm.c:67
/#1 up_ndelay (nanoseconds=nanoseconds@entry=250000000) at /home/ajh/work/vela_system/nuttx/drivers/timers/arch_alarm.c:431
/#2 0x0060c630 in up_udelay (microseconds=microseconds@entry=250000) at /home/ajh/work/vela_system/nuttx/drivers/timers/arch_alarm.c:416
/#3 0x0060c644 in up_mdelay (milliseconds=milliseconds@entry=250) at /home/ajh/work/vela_system/nuttx/drivers/timers/arch_alarm.c:401
/#4 0x006056bc in reset_board () at /home/ajh/work/vela_system/nuttx/sched/misc/assert.c:816
/#5 _assert (filename=filename@entry=0x63047f "/arch/arm/src/armv7-a/arm_dataabort.c", linenum=linenum@entry=157, msg=msg@entry=0x62f56d "panic",
regs=<optimized out>, regs@entry=0x4020af10) at /home/ajh/work/vela_system/nuttx/sched/misc/assert.c:915
/#6 0x0060bd74 in arm_dataabort (regs=0x4020af10, dfar=<optimized out>, dfsr=<optimized out>)
at /home/ajh/work/vela_system/nuttx/arch/arm/src/armv7-a/arm_dataabort.c:157
/#7 0x0060bc04 in arm_vectordata () at /home/ajh/work/vela_system/nuttx/arch/arm/src/armv7-a/arm_vectors.S:438
Backtrace stopped: previous frame identical to this frame (corrupt stack?)
(gdb)
after:
(gdb) bt
/#0 udelay_coarse (microseconds=192000) at /home/ajh/work/vela_system/nuttx/drivers/timers/arch_alarm.c:67
/#1 up_ndelay (nanoseconds=nanoseconds@entry=250000000) at /home/ajh/work/vela_system/nuttx/drivers/timers/arch_alarm.c:431
/#2 0x0060c650 in up_udelay (microseconds=microseconds@entry=250000) at /home/ajh/work/vela_system/nuttx/drivers/timers/arch_alarm.c:416
/#3 0x0060c664 in up_mdelay (milliseconds=milliseconds@entry=250) at /home/ajh/work/vela_system/nuttx/drivers/timers/arch_alarm.c:401
/#4 0x006056bc in reset_board () at /home/ajh/work/vela_system/nuttx/sched/misc/assert.c:816
/#5 _assert (filename=filename@entry=0x63047f "/arch/arm/src/armv7-a/arm_dataabort.c", linenum=linenum@entry=157, msg=msg@entry=0x62f56d "panic",
regs=<optimized out>, regs@entry=0x4020af10) at /home/ajh/work/vela_system/nuttx/sched/misc/assert.c:915
/#6 0x0060bd94 in arm_dataabort (regs=0x4020af10, dfar=<optimized out>, dfsr=<optimized out>)
at /home/ajh/work/vela_system/nuttx/arch/arm/src/armv7-a/arm_dataabort.c:157
/#7 0x0060bc08 in arm_vectordata () at /home/ajh/work/vela_system/nuttx/arch/arm/src/armv7-a/arm_vectors.S:453
/#8 0x00620cd4 in hello_main (argc=4999, argv=0x0) at /home/ajh/work/vela_system/apps/examples/hello/hello_main.c:41
/#9 0x0060d320 in nxtask_startup (entrypt=0x620cc4 <hello_main>, argc=1, argv=0x4020a088)
at /home/ajh/work/vela_system/nuttx/libs/libc/sched/task_startup.c:72
/#10 0x00609b50 in nxtask_start () at /home/ajh/work/vela_system/nuttx/sched/task/task_start.c:116
/#11 0x00000000 in ?? ()
qemu risc-v nsh
before:
(gdb) bt
/#0 udelay_coarse (microseconds=228000, microseconds@entry=891896832) at timers/arch_alarm.c:67
/#1 up_ndelay (nanoseconds=nanoseconds@entry=250000000) at timers/arch_alarm.c:431
/#2 0x8000397e in up_udelay (microseconds=microseconds@entry=250000) at timers/arch_alarm.c:416
/#3 0x80003988 in up_mdelay (milliseconds=milliseconds@entry=250) at timers/arch_alarm.c:401
/#4 0x80011f1c in reset_board () at misc/assert.c:813
/#5 0x80011f7a in _assert (filename=filename@entry=0x0, linenum=linenum@entry=0, msg=msg@entry=0x8002114c "panic", regs=<optimized out>,
regs@entry=0x80030704) at misc/assert.c:915
/#6 0x80006ad6 in riscv_exception (mcause=<optimized out>, regs=0x80030704, args=<optimized out>) at common/riscv_exception.c:129
/#7 0x80000d9e in riscv_doirq (irq=7, regs=<optimized out>) at common/riscv_doirq.c:99
/#8 0x80000164 in exception_common () at common/riscv_exception_common.S:210
Backtrace stopped: frame did not save the PC
(gdb)
after
(gdb) bt
/#0 0x80003922 in udelay_coarse (microseconds=90000, microseconds@entry=891896832) at timers/arch_alarm.c:67
/#1 up_ndelay (nanoseconds=nanoseconds@entry=250000000) at timers/arch_alarm.c:431
/#2 0x8000397e in up_udelay (microseconds=microseconds@entry=250000) at timers/arch_alarm.c:416
/#3 0x80003988 in up_mdelay (milliseconds=milliseconds@entry=250) at timers/arch_alarm.c:401
/#4 0x80011f2a in reset_board () at misc/assert.c:816
/#5 0x80011f7a in _assert (filename=filename@entry=0x0, linenum=linenum@entry=0, msg=msg@entry=0x8002114c "panic", regs=<optimized out>,
regs@entry=0x80030704) at misc/assert.c:915
/#6 0x80006ad6 in riscv_exception (mcause=<optimized out>, regs=0x80030704, args=<optimized out>) at common/riscv_exception.c:129
/#7 0x80000d9e in riscv_doirq (irq=7, regs=<optimized out>) at common/riscv_doirq.c:99
/#8 0x80000166 in exception_common () at common/riscv_exception_common.S:215
/#9 0x8001792a in hello_main (argc=<optimized out>, argv=<optimized out>) at hello_main.c:41
/#10 0x80004b52 in nxtask_startup (entrypt=0x80030704, argc=1, argv=0x800300e8) at sched/task_startup.c:72
/#11 0x80001e72 in nxtask_start () at task/task_start.c:116
/#12 0x00000000 in ?? ()
Backtrace stopped: frame did not save the PC
(gdb)
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
Most tools used for compliance and SBOM generation use SPDX identifiers
This change brings us a step closer to an easy SBOM generation.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
continue work of a68b00206b
| commit a68b00206b
| Author: hujun5 <hujun5@xiaomi.com>
| Date: Mon Dec 9 20:48:09 2024 +0800
|
| cxd56_rtc.c: use small lock in arch/arm/src/cxd56xx/cxd56_rtc.c
|
| reason:
| We hope to remove all instances of spin_lock_irqsave(NULL).
|
| Signed-off-by: hujun5 <hujun5@xiaomi.com>
Signed-off-by: chao an <anchao@lixiang.com>
Used STM32H7 spi driver as a base. The register set is nearly identical. All registers are named the same with the same offset. There are some bits within the registers that are different but are not referenced in stm32_spi.c. Therfore this driver may just work as is. I did modify the clock source selection for each SPI peripheral, but not much else. Differences in the registers were applied in hardware/stm32h5xxx_spi.h.
Added functionality to SPI to configure the SPI RCC clock.
Added SPI info to Kconfig, updated stm32_spi.c to select and set the RCC clock, and other minor updates.
Updated Pin Map for SPI, added CFG1_BPASS support
Fixed redefinition of GPIO_SPI6_SCK_2
Added SPI_MAX_KER_CK definition.
This definition was needed because the H50 chips allow a kernel clock of 250 MHz. However the datasheets for all other chips (H52, H53, H56, H57) have a max of 125 MHz.
Changed SPI Clock Source Configuration
Moved setting of SPIx clock sources to stm32h5xx_rcc.c. STM32_SPIx_FREQUENCY and STM32_RCC_CCIPR3_SPIxSEL are now defined in board.h. Added error checking in stm32_spi.c to make sure STM32_SPIx_FREQUENCY and STM32_RCC_CCIPR3_SPIxSEL are actually defined.
Style updates
Removed SPI Clock selection from Kconfig
Update arch/arm/src/stm32h5/stm32_spi.h
Co-authored-by: hartmannathan <59230071+hartmannathan@users.noreply.github.com>
Update arch/arm/src/stm32h5/Kconfig
Co-authored-by: hartmannathan <59230071+hartmannathan@users.noreply.github.com>
Update arch/arm/src/stm32h5/stm32_spi.h
Co-authored-by: hartmannathan <59230071+hartmannathan@users.noreply.github.com>
reason:
svc call may trigger hardfault
Background
The origin of this issue is our desire to eliminate the function of storing
"regs" in g_current_regs and instead utilize (*running_task)->xcp.regs for storage.
The benefits of this approach include faster storage speed and
avoiding multiple accesses to g_current_regs during context switching,
thus ensuring that whether returning from an interrupt or an exception,
we consistently use this_task()->xcp.regs
Issue Encountered
However, when storing registers, we must ensure that (running_task)->xcp.regs is invalid
so that it can be safely overwritten.
According to the existing logic, the only scenario where (running_task)->xcp.regs
is valid is during restore_context. We must accurately identify this scenario.
Initially, we used the condition (running_task)==NULL for this purpose, but we deemed
this approach unsatisfactory as it did not align well with the actual logic.
(running_task) should not be NULL. Consequently, we adopted other arch-specific methods for judgment,
but due to special logic in some arch, the judgment was not accurate, leading to this issue.
Solution:
For armv6-m, we haven't found a more suitable solution, so we are sticking with (*running_task)==NULL.
For armv7-m/armv8-m, by removing support for primask, we can achieve accurate judgment.
PRIMASK is a design in armv6-m, that's why arm introduce BASEPRI from armv7-m.
It's wrong to provide this option for armv7-m/armv8-m arch.
Signed-off-by: hujun5 <hujun5@xiaomi.com>
Most tools used for compliance and SBOM generation use SPDX identifiers
This change brings us a step closer to an easy SBOM generation.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
This is continue work of https://github.com/apache/nuttx/pull/13726
We can utilize percpu storage to hold information about the
current running task. If we intend to implement this feature, we would
need to define two macros that help us manage this percpu information
effectively.
up_this_task: This macro is designed to read the contents of the percpu
register to retrieve information about the current
running task.This allows us to quickly access
task-specific data without having to disable interrupts,
access global variables and obtain the current cpu index.
up_update_task: This macro is responsible for updating the contents of
the percpu register.It is typically called during
initialization or when a context switch occurs to ensure
that the percpu register reflects the information of the
newly running task.
Signed-off-by: hujun5 <hujun5@xiaomi.com>
Most tools used for compliance and SBOM generation use SPDX identifiers
This change brings us a step closer to an easy SBOM generation.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
S32C1I instructions may target cached, cache-bypass,
and data RAM memory locations. S32C1I instructions
are not permitted to access memory addresses in data ROM,
instruction memory or the address region allocated to
the XLMI port. Attempts to direct the S32C1I at these
addresses will cause an exception.
Signed-off-by: zhangyuan29 <zhangyuan29@xiaomi.com>
Modify the kernel to use only atomic_xx and atomic64_xx interfaces,
avoiding the use of sizeof or typeof to determine the type of
atomic operations, thereby simplifying the kernel's atomic
interface operations.
Signed-off-by: zhangyuan29 <zhangyuan29@xiaomi.com>
Summary:
- The file includes symbol information provided by ON Semiconductor.
- The license information is the same as lc823450_sdc.c
Impact:
- None
Testing:
- lc823450-xgevk:rndis (build only)
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
reason:
up_set_current_regs initially had two functions:
1: To mark the entry into an interrupt state.
2: To record the context before an interrupt/exception. If we switch to
a new task, we need to store the upcoming context regs by calling up_set_current_regs(regs).
Currently, we record the context in other ways, so the second function is obsolete.
Therefore, we need to rename up_set_current_regs to better reflect its actual meaning,
which is solely to mark an interrupt.
Signed-off-by: hujun5 <hujun5@xiaomi.com>
Adding the STM32H5 FDCAN Hardware definitions. The register set is identical to the STM32G4. No major changes other than changing G4 to H5 and removing ifdef requirement for STM32G4.
Fixed style issues
EEFC read sequence requires read length in words instead of bytes,
therefore bytes given by the user has to be recalculated to words.
The calculation however had a mistake in brackets and was just adding
1 to buflen instead of recalculating it to 4 byte words. This caused
global array g_page_buffer to overflow for some reads.
This fixes the calculation.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
reason:
Since the scheduling records have already been moved to the interrupt exit in this submission,
we need to delete the original records' locations.
This commit fixes the regression from https://github.com/apache/nuttx/pull/13651
Signed-off-by: hujun5 <hujun5@xiaomi.com>
1. support fiq decoding and dispatch
2. replace CONFIG_ARMV8R_DECODEFIQ with CONFIG_ARCH_HIPRI_INTERRUPT
Signed-off-by: Jinliang Li <lijinliang1@lixiang.com>
Make this_cpu is arch independent and up_cpu_index do that.
In AMP mode, up_cpu_index() may return the index of the physical core.
Signed-off-by: hujun5 <hujun5@xiaomi.com>
reason:
up_set_current_regs initially had two functions:
1: To mark the entry into an interrupt state.
2: To record the context before an interrupt/exception. If we switch to
a new task, we need to store the upcoming context regs by calling up_set_current_regs(regs).
Currently, we record the context in other ways, so the second function is obsolete.
Therefore, we need to rename up_set_current_regs to better reflect its actual meaning,
which is solely to mark an interrupt.
Signed-off-by: hujun5 <hujun5@xiaomi.com>
profile-generate is used to generate compilation feedback optimization data, not just code coverage data
It will rely on the toolchain library:
nuttx/libs/libc/misc/lib_utsname.c:94:(.text.uname+0x2c): undefined reference to `__gcov_indirect_call_profiler_v4'
arm-none-eabi-ld: nuttx/libs/libc/misc/lib_utsname.c:113:(.text.uname+0x178): undefined reference to `__gcov_indirect_call'
arm-none-eabi-ld: nuttx/libs/libc/misc/lib_utsname.c:113:(.text.uname+0x188): undefined reference to `__gcov_time_profiler_counter'
arm-none-eabi-ld: nuttx/staging/libc.a(lib_utsname.o):(.data..LPBX0+0x30): undefined reference to `__gcov_merge_time_profile'
Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
This issue is related to the Arm toolchain for Windows which is available for x86 host architecture only (compatible with x86_64)
Windows (mingw-w64-i686) hosted cross toolchains
AArch32 bare-metal target (arm-none-eabi)
Issue
/bin/sh: line 1: /home/nuttx/nuttxnew/tools/gcc-arm-none-eabi/bin/arm-none-eabi-ar: Argument list too long
On Windows, arm-none-eabi-ar can only accept strings up to a maximum length of 32,768 characters.
We could suppress the 32K include string limitation by setting the CMake variable CMAKE_NINJA_FORCE_RESPONSE_FILE to ON.
This is unfortunately not enough!!! ): In the build phase this error comes out
$ cmake --build build
[2/1025] Building ASM object arch/CMakeFiles/arch.dir/arm/src/armv7-m/arm_exception.S.obj
FAILED: arch/CMakeFiles/arch.dir/arm/src/armv7-m/arm_exception.S.obj
/home/nuttx/nuttxnew/tools/gcc-arm-none-eabi/bin/arm-none-eabi-gcc.exe @arch/CMakeFiles/arch.dir/arm/src/armv7-m/arm_exception.S.obj.rsp -MD -MT arch/CMakeFiles/arch.dir/arm/src/armv7-m/arm_exception.S.obj -MF arch/CMakeFiles/arch.dir/arm/src/armv7-m/arm_exception.S.obj.d -o arch/CMakeFiles/arch.dir/arm/src/armv7-m/arm_exception.S.obj -c /home/nuttx/nxninja/nuttx/arch/arm/src/armv7-m/arm_exception.S
C:/msys64/home/nuttx/nxninja/nuttx/arch/arm/src/armv7-m/arm_exception.S:42:10: fatal error: nuttx/config.h: No such file or directory
42 | #include <nuttx/config.h>
| ^~~~~~~~~~~~~~~~
compilation terminated.
The Workround I found to solve this problem is to overwrite
the responsible file flag CMAKE_${lang}_RESPONSE_FILE_FLAG with $DEFINES $INCLUDES $FLAGS
Maybe there is a better solution but this one it works. :)
the stub-function entry address is stored in r4, we should branch to the
stub-function with blx r4, not r5
Signed-off-by: guoshichao <guoshichao@xiaomi.com>
This commit adds register definitions for advanced, basic, and general purpose timers. Formatting convention was taken from the H7 hardware timer header.
These files were copied from a config of pico-sdk 2.0.0.
They provide struct address mapped access to peripherals, along
with register definitions. It also provides some compiler helpers
that are partially used by the port.
Adds ADC support with minimal feature set (no DMA or Timers etc). A new nucleo-h563zi configuration was added to
provide easy testing with the adc example NSH addon.
Fix Kconfig spacing to tabs
chip/efm32_start.c:150:3: warning: implicit declaration of function 'itm_syslog_initialize';
did you mean 'syslog_initialize'? [-Wimplicit-function-declaration]
150 | itm_syslog_initialize();
| ^~~~~~~~~~~~~~~~~~~~~
| syslog_initialize
Signed-off-by: chao an <anchao@lixiang.com>
Summary:
- In https://github.com/apache/nuttx/pull/14465,
atomic_compare_exchange_weak_explicit() was newly introduced
in semaphore. However, cxd56xx has an issue with the API
if SMP is enabled (see up_testset2 in cxd56_testset.c).
- This commit fixes the issue by using LIBC_ARCH_ATOMIC.
Impact:
- Only cxd56xx SoCs in SMP mode.
Testing:
- Tested with spresense:smp, spresense:wifi_smp
- NOTE: If DEBUG_ASSERTIONS is enabled assert would be happend.
I think this might be another issue.
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
The PLL clock configuration was simplified on the assumption the clocks are correctly set in the board.h file. Instead of seperate conditions
for register components, assume the relevant PLL registers are fully defined in board.h. This should result in easier to understand defines in board.h
and simpler code flow in the standard clock configuration function.
Changes were mad in the board file alongside changing the arch files. Changes to board/stm32h5:
- PLL1 has been configured to use integer instead of fractional mode to reach the 250 MHz target. PLL2 and PLL3 configurations were
removed since they are currently unused in the H5 configuration.
- PLL1 output was verified by testing for changes in serial baud rate.
syslog_putc() have a lot of duplicate logic with syslog_write().
remove syslog_putc() and reuse syslog_write() to simplify syslog printing.
Signed-off-by: chao an <anchao@lixiang.com>
reason:
When entering an exception or interrupt, there are two sets of registers:
one is the "running regs", which we need to save,
and the other is the "ready to running regs", which we may soon use.
For consistency in logic, we can always store the "running regs" in the regs field of g_running_tasks,
otherwise it may lead to errors in the storage location of the "running regs."
When we need to access the "running regs," we should uniformly retrieve them from the regs field of g_running_tasks.
As the next step, we will rename the set_current_regs/up_current_regs functions
for each architecture to more appropriate names, solely for the purpose of identifying interrupts.
Signed-off-by: hujun5 <hujun5@xiaomi.com>
Some armv7-m-based SoCs do not work with atomic instructions,
even though armv7-m supports them.
To avoid using atomic instructions generated by gcc,
CONFIG_LIBC_ARCH_ATOMIC is newly introduced with which
arch_atomic.c is linked explicitly.
However, the function names need to be changed to avoid
build errors, since the functions described in stdatomic.h
are gcc built-in and inlined when the code is compiled.
About libcxx with CONFIG_LIBC_ARCH_ATOMIC, it still
does not work. It is also needed to call nx_atomic_ ver
instead of __atomic ver in
libcxx/include/__atomic/cxx_atomic_lmpl.h.
Signed-off-by: Takuya Miyasita <Takuya.Miyashita@sony.com>
This commit adds a max_pins field into the private struct.
AFEC0 has 11, AFEC1 has 12. The 12th pin of AFEC0 is an internal
pin connected to a temperature sensor, which we don't use.
Signed-off-by: Stepan Pressl <pressste@fel.cvut.cz>
1. arch/arm/src/cmake/gcc.cmake: The same judgment has been made in line 164
2. boards/sim/sim/sim/scripts/Make.defs: arch/sim/src/Makefile also has in line 147
Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com>
Added I2C driver for the STM32H5. This driver uses the STM32H7 I2C driver as a base. The primary difference is setclock dynamically sets the I2C TIMINGR register instead of using hardcoded values. This allows the I2C peripherals to use any of the input clocks and set to any speed 0-1MHz. Additionally, Kconfig options were made available to set the Digital Noise Filter (DNF), Analog Noise Filter, I2C Clock source (i2c_ker_ck), as well as set i2c rise/fall times which are crucial to timing. Care must be taken when setting the clock source and filters, as not all settings are compatible with all i2c clock frequencies.
Some armv7-m-based SoCs do not work with atomic instructions,
even though armv7-m supports them.
To avoid using atomic instructions generated by gcc,
CONFIG_LIBC_ARCH_ATOMIC is newly introduced with which
arch_atomic.c is linked explicitly.
However, the function names need to be changed to avoid
build errors, since the functions described in stdatomic.h
are gcc built-in and inlined when the code is compiled.
Signed-off-by: Takuya Miyasita <Takuya.Miyashita@sony.com>
