Commit graph

23196 commits

Author SHA1 Message Date
chenxiaoyi
ad8902a33e esp32[|s2|s3]: adapt to new syscall implementation
Signed-off-by: chenxiaoyi <chenxiaoyi@xiaomi.com>
2024-12-27 00:25:55 +08:00
chenxiaoyi
aa426d1edb xtensa: change write intset register to syscall instruction
Signed-off-by: chenxiaoyi <chenxiaoyi@xiaomi.com>
2024-12-27 00:25:55 +08:00
chenxiaoyi
1757ecc5c1 xtensa: add backtrace link from syscall exception
Signed-off-by: chenxiaoyi <chenxiaoyi@xiaomi.com>
2024-12-27 00:25:55 +08:00
Peter van der Perk
430c79ff89 imxrt: FlexSPI allow RWW 2024-12-27 00:16:47 +08:00
hujun5
2886fddc0f arm64: fix tpidr maybe null
Before the MPU initialization, the up_update_task(this_cpu()) function is called at a time when hardware cache coherency is not yet enabled.
In certain critical scenarios, Core 1 reads a zero value for tcb from the global variable g_assignedtask and stores this zero value into the tpidr
register. This results in subsequent interrupt handlers reading a zero tcb, causing an exception.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-27 00:16:35 +08:00
hujun5
c0f7dd979e fix compile error
CC:  pthread/pthread_exit.c common/espressif/esp_lowputc.c: In function 'esp_lowputc_disable_all_uart_int':
common/espressif/esp_lowputc.c:215:29: error: passing argument 1 of 'spin_lock_irqsave' discards 'const' qualifier from pointer target type [-Werror=discarded-qualifiers]
  215 |   flags = spin_lock_irqsave(&priv->lock);
      |                             ^~~~~~~~~~~
In file included from common/espressif/esp_lowputc.c:40:
/home/hujun5/下载/vela_sim/nuttx/include/nuttx/spinlock.h:511:55: note: expected 'volatile spinlock_t *' {aka 'volatile unsigned int *'} but argument is of type 'const spinlock_t *' {aka 'const unsigned int *'}
  511 | irqstate_t spin_lock_irqsave(FAR volatile spinlock_t *lock)
      |                                  ~~~~~~~~~~~~~~~~~~~~~^~~~
common/espressif/esp_lowputc.c:232:26: error: passing argument 1 of 'spin_unlock_irqrestore' discards 'const' qualifier from pointer target type [-Werror=discarded-qualifiers]
  232 |   spin_unlock_irqrestore(&priv->lock, flags);
      |                          ^~~~~~~~~~~
/home/hujun5/下载/vela_sim/nuttx/include/nuttx/spinlock.h:674:54: note: expected 'volatile spinlock_t *' {aka 'volatile unsigned int *'} but argument is of type 'const spinlock_t *' {aka 'const unsigned int *'}
  674 | void spin_unlock_irqrestore(FAR volatile spinlock_t *lock,

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-26 23:43:49 +08:00
yangsen5
15c1c9d42e sim_alsa: set paused to false when executing close
Signed-off-by: yangsen5 <yangsen5@xiaomi.com>
2024-12-26 23:31:55 +08:00
yangsen5
94c0f71db9 v4l2m2m: modify return value of g_bufsize to uint32_t
CID 1578530: (#1 of 1): INTEGER_OVERFLOW

Signed-off-by: yangsen5 <yangsen5@xiaomi.com>
2024-12-25 17:06:48 +08:00
Henry Rovner
923dc37a3b risc-v/bl808: Add I2C driver
This change implements a driver with support for all four I2C blocks on the BL808.
2024-12-25 11:03:26 +08:00
hujun5
50fd02c789 use small lock in following files:
arch/arm/src/kinetis/kinetis_serial.c
arch/arm/src/kl/kl_serial.c
arch/arm/src/lc823450/lc823450_irq.c
arch/arm/src/lc823450/lc823450_syscontrol.c
arch/arm/src/lpc54xx/lpc54_serial.c
arch/arm/src/max326xx/max32660/max32660_dma.c
arch/arm/src/max326xx/max32660/max32660_gpio.c
arch/arm/src/max326xx/max32660/max32660_lowputc.c
arch/arm/src/max326xx/max32660/max32660_serial.c
arch/arm/src/mx8mp/mx8mp_serial.c
arch/arm/src/nrf52/nrf52_gpio.c
arch/arm/src/nrf53/nrf53_gpio.c
arch/arm/src/nrf91/nrf91_gpio.c
arch/arm/src/rp2040/rp2040_uart.c

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-23 23:02:26 +08:00
hujun5
9aa5eda649 use small lock in following file
arch/arm/src/efm32/efm32_leserial.c
arch/arm/src/efm32/efm32_serial.c
arch/arm/src/gd32f4/gd32f4xx_serial.c
arch/arm/src/imx9/imx9_edma.c
arch/arm/src/imxrt/imxrt_edma.c
arch/arm/src/imxrt/imxrt_hprtc.c
arch/arm/src/kinetis/kinetis_lpserial.c
arch/arm/src/lc823450/lc823450_gpio.c
arch/arm/src/s32k1xx/s32k1xx_edma.c
arch/arm/src/s32k3xx/s32k3xx_edma.c
arch/arm64/src/imx9/imx9_edma.c

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-23 23:01:01 +08:00
hujun5
b66c1b94ce use small lock in following files:
arch/arm/src/rp2040/rp2040_usbdev.c
arch/arm/src/rp23xx/rp23xx_uart.c
arch/arm/src/s32k1xx/s32k1xx_enet.c
arch/arm/src/sam34/sam_lowputc.c
arch/arm/src/sama5/sam_lowputc.c
arch/arm/src/samd2l2/sam_serial.c
arch/arm/src/samd5e5/sam_serial.c
arch/arm/src/samv7/sam_lowputc.c
arch/arm/src/stm32/stm32_hciuart.c
arch/arm/src/stm32/stm32_qencoder.c
arch/arm/src/stm32/stm32_serial.c
arch/arm/src/stm32f0l0g0/stm32_serial_v1.c

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-23 22:56:43 +08:00
hujun5
c96b8cdfdd use small lock in following files:
arch/arm/src/stm32f0l0g0/stm32_serial_v2.c
arch/arm/src/stm32f7/stm32_qencoder.c
arch/arm/src/stm32f7/stm32_serial.c
arch/arm/src/stm32h5/stm32_serial.c
arch/arm/src/stm32h7/stm32_qencoder.c
arch/arm/src/stm32h7/stm32_serial.c
arch/arm/src/stm32l4/stm32l4_qencoder.c
arch/arm/src/stm32l4/stm32l4_serial.c
arch/arm/src/stm32l5/stm32l5_serial.c
arch/arm/src/stm32u5/stm32_serial.c
arch/arm/src/stm32wb/stm32wb_serial.c
arch/arm/src/stm32wl5/stm32wl5_serial.c
arch/arm/src/tiva/cc13xx/cc13xx_enablepwr.c
arch/risc-v/src/rv32m1/rv32m1_serial.c

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-23 22:53:19 +08:00
hujun5
798695a4f7 use small lock in following files:
arch/arm/src/tiva/common/tiva_hciuart.c
arch/arm/src/tms570/tms570_lowputc.c
arch/arm/src/xmc4/xmc4_serial.c
arch/arm64/src/a64/a64_serial.c
arch/mips/src/pic32mx/pic32mx_serial.c
arch/mips/src/pic32mz/pic32mz_serial.c
arch/risc-v/src/c906/c906_serial.c
arch/risc-v/src/fe310/fe310_serial.c
arch/risc-v/src/hpm6750/hpm6750_serial.c
arch/risc-v/src/k210/k210_serial.c
arch/sparc/src/bm3803/bm3803-serial.c
arch/sparc/src/bm3823/bm3823-serial.c

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-23 22:48:35 +08:00
hujun5
46c2d46a6b use small lock in:
arch/arm/src/imxrt/imxrt_wdog.c
arch/arm/src/kinetis/kinetis_edma.c
arch/arm/src/lc823450/lc823450_dvfs2.c
arch/arm/src/lc823450/lc823450_timer.c
arch/arm/src/lpc54xx/lpc54_lowputc.c

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-23 15:01:08 +08:00
hujun5
eb587d72e0 fix compile error
Configuration/Tool: esp32s2-kaluga-1/audio
Error: chip/esp32s2_lowputc.c:102:22: error: expected '}' before ';' token
  102 |   .lock = SP_UNLOCKED;
      |                      ^
chip/esp32s2_lowputc.c:62:1: note: to match this '{'
   62 | {

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-23 14:48:35 +08:00
hujun5
97eef351dc use small lock in following file
arch/or1k/src/mor1kx/mor1kx_serial.c
arch/risc-v/src/bl602/bl602_serial.c
arch/risc-v/src/common/espressif/esp_lowputc.c
arch/risc-v/src/common/espressif/esp_lowputc.h
arch/risc-v/src/common/espressif/esp_tickless.c
arch/risc-v/src/esp32c3-legacy/esp32c3_idle.c
arch/risc-v/src/esp32c3-legacy/esp32c3_lowputc.c
arch/risc-v/src/esp32c3-legacy/esp32c3_lowputc.h
arch/risc-v/src/esp32c3-legacy/esp32c3_rtc_lowerhalf.c
arch/risc-v/src/fe310/fe310_gpio.c

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-22 18:59:44 +08:00
Kyle Wilson
d59b8f25b8 Added hardware defines for stm32h5_qspi driver and octospi GPIOs (used by stm32h5_qspi driver).
Fixed comments and indent

Add commit log to OCTOSPI HW PR

Summary

hardware/stm32_qspi.h - Defines for the STM32H5 QSPI driver. The peripheral on the STM32H5 is actually an OCTOSPI peripheral, however it was decided to use it as a QSPI peripheral for the following reasons:

    There is currently support for QSPI within Nuttx.
    The STM32H7 QSPI register set is very similar to the STM32H5 OCTOSPI register set and the STM32H7 series has an existing QSPI driver.
    OCTOSPI devices are rare as of now and are not part of our use case.

hardware/stm32h56xxx_pinmap.h - Added pin mappings for OCTOSPI GPIOs.
Impact

This change will not impact any architectures outside of the STM32H5 series. Even for the STM32H5 series, these changes will only have an impact if they are utilized.
Testing

No testing yet for these files other than ensuring that we can still build Nuttx. Further testing will be documented in a future pull request when the STM32H5 QSPI driver is added.
2024-12-22 18:54:18 +08:00
hujun5
f25e3d2324 use small lock in following files
arch/risc-v/src/litex/litex_emac.c
arch/risc-v/src/mpfs/mpfs_coremmc.c
arch/risc-v/src/mpfs/mpfs_usb.c
arch/xtensa/src/esp32/esp32_idle.c
arch/xtensa/src/esp32/esp32_rtc_lowerhalf.c
arch/xtensa/src/esp32s2/esp32s2_idle.c
arch/xtensa/src/esp32s2/esp32s2_lowputc.c
arch/xtensa/src/esp32s2/esp32s2_lowputc.h
arch/xtensa/src/esp32s2/esp32s2_rtc_lowerhalf.c
arch/xtensa/src/esp32s3/esp32s3_idle.c

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-22 18:53:15 +08:00
hujun5
8411a97b85 use small lock in following files
arch/xtensa/src/esp32s3/esp32s3_rtc_lowerhalf.c
arch/z16/src/z16f/z16f_serial.c
arch/z80/src/z8/z8_serial.c
boards/arm/max326xx/max32660-evsys/src/max326_button.c
boards/arm/stm32/stm32f4discovery/src/stm32_gs2200m.c
drivers/i2c/i2c_bitbang.c
drivers/power/supply/act8945a.c
drivers/serial/uart_pci_16550.c
drivers/serial/uart_pl011.c
drivers/wireless/bluetooth/bt_uart_shim.c

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-22 18:43:26 +08:00
Jorge Guzman
e55966d3dc arm/stm32h753bi: Add support to lvgl
Signed-off-by: Jorge Guzman <jorge.gzm@gmail.com>
2024-12-22 05:44:14 -03:00
Tiago Medicci Serrano
7548db1980 arch/xtensa: Support __thread and thread_local keywords
Enable architecture-specific support for those keywords. This is a
"gcc-based" thread local storage implementation.
2024-12-21 20:49:07 +08:00
Kyle Wilson
e039fa039d Added comma to fix undefined bits struct member 2024-12-20 23:08:09 -05:00
yaojingwei
bbd6931d61 nuttx/audio: add fake audio driver.
Some checks are pending
Build Documentation / build-html (push) Waiting to run
The fake audio driver aims to easily simulate the functions of audio driver through reading and writing files.
With it, you can conveniently customize and define various capture or playback audio drivers for debugging or automated testing.

Signed-off-by: yaojingwei <yaojingwei@xiaomi.com>
2024-12-20 11:47:08 -03:00
hujun5
67b95d0142 use small lock in following files
arch/arm/src/armv7-a/arm_gicv2.c
arch/arm/src/imx6/imx_serial.c
arch/arm/src/imxrt/imxrt_flexcan.c
arch/xtensa/src/esp32/esp32_himem.c
arch/xtensa/src/esp32s3/esp32s3_himem.c

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-20 20:58:43 +08:00
chao an
d36ddb5790 arm/modifyreg: Use common lock to protect the modify address to ensure consistency
Signed-off-by: chao an <anchao@lixiang.com>
2024-12-20 19:54:07 +08:00
hujun5
59a849a7cc esp_rtc: use small lock in arch/risc-v/src/common/espressif/esp_rtc.c
reason:
We would like to replace the big lock with a small lock.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-20 14:10:56 +08:00
hujun5
2b762267f3 imx9_flexcan: use small lock in arch/arm/src/imx9/imx9_flexcan.c
reason:
We would like to replace the big lock with a small lock.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-20 14:09:34 +08:00
hujun5
a8353eef51 imx9_lpuart: use small lock in arch/arm(64)/src/imx9/imx9_lpuart.c
reason:
We would like to replace the big lock with a small lock.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-20 11:53:02 +08:00
Filipe Cavalcanti
97c0b43d86 arch/risc-v/espressif: add missing spinlock to wlan_recvframe 2024-12-19 18:16:50 -03:00
bazooka Joe
a7869bb28b stm32_i2c: fix sending large data over i2c
To trigger TC interrupt NBYTES needs to be set before RELOAD is disabled
similar to previous commitdone on stm32h7 510b6221ca
2024-12-19 22:06:04 +08:00
hujun5
ecdff659d1 modifyreg[8|32]: use small lock in modifyreg[8|32]
reason:
We would like to replace the big lock with a small lock.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-19 21:55:21 +08:00
YAMAMOTO Takashi
b4e5c74319 arch/sim/src/nuttx-names.in: Add pipe2
This breaks the libuv build without CONFIG_PIPES
as expected:

```
LD:  nuttx
/usr/bin/ld: nuttx.rel: in function `uv_pipe':
/src/apps/system/libuv/libuv/src/unix/pipe.c:516: undefined reference to `NXpipe2'
collect2: error: ld returned 1 exit status
make[1]: *** [Makefile:427: nuttx] Error 1
make: *** [tools/Unix.mk:551: nuttx] Error 2
```

That is, this correctly exposes https://github.com/apache/nuttx/issues/14773
on linux.
2024-12-19 14:46:59 +08:00
hujun5
5d68ab635c remove big lock in arch_phy_irq
reason:
We would like to replace the big lock with a small lock.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-18 23:28:18 +08:00
hujun5
c1b665c5d5 at32_serial: use small lock in arch/arm/src/at32/at32_serial.c
reason:
We would like to replace the big lock with a small lock.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-18 23:07:58 +08:00
hujun5
75ddce6e3a modifyreg16: use small lock in modifyreg16
reason:
We would like to replace the big lock with a small lock.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-18 20:28:26 +08:00
hujun5
f367ba2842 cxd: use small lock
reason:
We would like to replace the big lock with a small lock.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-18 20:21:58 +08:00
hujun5
826aa4f732 imx_gpio: use small lock in arch/arm/src/imx6/imx_gpio.c
reason:
We would like to replace the big lock with a small lock.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-18 20:10:45 +08:00
Andre Heinemans
16babb08c9 imx9: iomuxc: add assert on scmi pinconfig result 2024-12-18 20:09:12 +08:00
Andre Heinemans
01e05c2660 imx9: add config for waking WFI at systick 2024-12-18 20:09:12 +08:00
chao an
c7ccc0f9ec arm64/cache: add i/dcache check to avoid build break
arch/arm64/src/common/arm64_cache.c:344:35: error: macro "up_get_icache_linesize" passed 1 arguments, but takes just 0
  344 | size_t up_get_icache_linesize(void)
      |                                   ^

Feishu-Id: 4956395133

Signed-off-by: chao an <anchao@lixiang.com>
2024-12-18 20:07:59 +08:00
Alin Jerpelea
658e4ffae2 arch/x86_64: migrate to SPDX identifier
Most tools used for compliance and SBOM generation use SPDX identifiers
This change brings us a step closer to an easy SBOM generation.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2024-12-18 17:51:57 +08:00
Alin Jerpelea
559b533863 arch/xtensa: migrate to SPDX identifier
Most tools used for compliance and SBOM generation use SPDX identifiers
This change brings us a step closer to an easy SBOM generation.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2024-12-18 17:51:57 +08:00
Alin Jerpelea
438fcfb13a arch/arm: migrate to SPDX identifier
Most tools used for compliance and SBOM generation use SPDX identifiers
This change brings us a step closer to an easy SBOM generation.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2024-12-18 17:51:57 +08:00
hujun5
e3717b3086 esp32_rtc: use small lock in arch/xtensa/src/esp32[s2]/esp32s2_rtc.c
reason:
We would like to replace the big lock with a small lock.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-18 11:53:15 +08:00
Eren Terzioglu
c3d03f02fb esp32[c3|c6|h2]: Fix ledc clk issue 2024-12-17 13:35:42 -03:00
Eren Terzioglu
767c5f16f0 esp32[s2|s3]: Add pulse counter support 2024-12-17 13:35:42 -03:00
Eren Terzioglu
e48d092778 esp32[c6|h2]: Add pulse counter support 2024-12-17 13:35:42 -03:00
Filipe Cavalcanti
ecf683b13e arch/risc-v/esp32c6: fix memcpy on AP password 2024-12-17 11:27:02 -03:00
Filipe Cavalcanti
ac56285bf8 arch/xtensa: fix memcpy on AP password 2024-12-17 11:27:02 -03:00