Merge 5e23c4a79b into a2d4d74af7

clock_timekeeping: remove enter_critical_section in sched/clock/clock_timekeeping.c
reason: We would like to replace the critical section with a small lock. Signed-off-by: hujun5 <hujun5@xiaomi.com>
2025-01-12 22:08:35 +08:00 · 2025-01-12 16:54:09 +08:00 · 2025-01-12 16:51:40 +08:00 · 2025-01-12 16:48:35 +08:00 · 2025-01-12 16:47:54 +08:00 · 2025-01-12 16:17:52 +08:00
561 changed files with 16171 additions and 3247 deletions
--- a/.github/workflows/arch.yml
+++ b/.github/workflows/arch.yml
@ -173,21 +173,14 @@ jobs:

          # If Not a Simple PR: Build all targets
          if [[ "$quit" == "1" ]]; then
-            # If PR was Created or Modified: Exclude some boards
+            # If PR was Created or Modified: Include all boards
            pr=${{github.event.pull_request.number}}
            if [[ "$pr" != "" ]]; then
-              echo "Excluding arm-0[1249], arm-1[124-9], risc-v-04..06, sim-03, xtensa-02"
+              echo "Include all boards"
              boards=$(
                echo '${{ inputs.boards }}' |
                jq --compact-output \
-                'map(
-                  select(
-                    test("arm-0[1249]") == false and test("arm-1[124-9]") == false and
-                    test("risc-v-0[4-9]") == false and
-                    test("sim-0[3-9]") == false and
-                    test("xtensa-0[2-9]") == false
-                  )
-                )'
+                '.'
              )
            fi
            echo "selected_builds=$boards" | tee -a $GITHUB_OUTPUT
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@ -87,7 +87,7 @@ find_program(KCONFIGLIB olddefconfig)
 if(NOT KCONFIGLIB)
  message(
    FATAL_ERROR "Kconfig environment depends on kconfiglib, Please install:
-  $ sudo apt install python3-kconfiglib")
+  $ sudo pip3 install kconfiglib")
 endif()

 # BOARD CONFIG can be set to directory path, or <board-name>[/:]<config-name>
@ -727,6 +727,7 @@ else()
      OUTPUT nuttx.rel
      COMMAND
        ${CMAKE_C_COMPILER} ARGS -r $<$<BOOL:${CONFIG_SIM_M32}>:-m32>
+        $<$<BOOL:${CONFIG_HOST_LINUX}>:-Wl,-z,noexecstack>
        $<TARGET_OBJECTS:sim_head> $<$<NOT:$<BOOL:${APPLE}>>:-Wl,--start-group>
        ${nuttx_libs_paths} $<$<NOT:$<BOOL:${APPLE}>>:-Wl,--end-group> -o
        nuttx.rel
--- a/Documentation/applications/interpreters/python/index.rst
+++ b/Documentation/applications/interpreters/python/index.rst
@ -38,13 +38,35 @@ This will generate a ``nutxx`` binary. This file can be run using the RISC-V QEM
 Try Python in NSH
 =================

+Before running the RISC-V QEMU, create a raw disk image with the following command:
+
 .. code:: console

-   $ .qemu-system-riscv32 -semihosting -M virt,aclint=on -cpu rv32 -smp 1 -bios none -kernel nuttx -nographic
+   $ dd if=/dev/zero of=./mydisk-1gb.img bs=1M count=1024
+
+Then, run RISC-V QEMU with the following command:
+
+.. code:: console
+
+   $ qemu-system-riscv32 -semihosting -M virt,aclint=on -cpu rv32 -smp 8 \
+      -global virtio-mmio.force-legacy=false \
+      -device virtio-serial-device,bus=virtio-mmio-bus.0 \
+      -chardev socket,telnet=on,host=127.0.0.1,port=3450,server=on,wait=off,id=foo \
+      -device virtconsole,chardev=foo \
+      -device virtio-rng-device,bus=virtio-mmio-bus.1 \
+      -netdev user,id=u1,hostfwd=tcp:127.0.0.1:10023-10.0.2.15:23,hostfwd=tcp:127.0.0.1:15001-10.0.2.15:5001 \
+      -device virtio-net-device,netdev=u1,bus=virtio-mmio-bus.2 \
+      -drive file=./mydisk-1gb.img,if=none,format=raw,id=hd \
+      -device virtio-blk-device,bus=virtio-mmio-bus.3,drive=hd \
+      -bios none -kernel ./nuttx -nographic
+
+   ABC[    0.062131] board_userled: LED 1 set to 0
+   [    0.063269] board_userled: LED 2 set to 0
+   [    0.063367] board_userled: LED 3 set to 0
+   telnetd [4:100]

-   ABC
   NuttShell (NSH) NuttX-10.4.0
-   nsh> mount_modules
+   nsh> python_mount_modules
   Mounting ROMFS filesystem at target=/usr/local/lib/ with source=/dev/ram1
   nsh> export PYTHONHOME /usr/local
   nsh> export PYTHON_BASIC_REPL 1
@ -58,5 +80,5 @@ Demo

 Check the following `asciinema <https://asciinema.org/>`_ demo to see how to run Python on NuttX. You can copy and paste the commands from the demo to try it yourself.

-.. image:: https://asciinema.org/a/orkD8fKuahMEgQfBak9abliE4.svg
-   :target: https://asciinema.org/a/orkD8fKuahMEgQfBak9abliE4
+.. image:: https://asciinema.org/a/bYYy1fyIOQ3hOY4lJ7L3WFcNb.svg
+   :target: https://asciinema.org/a/bYYy1fyIOQ3hOY4lJ7L3WFcNb
--- a/Documentation/applications/system/nxdiag/index.rst
+++ b/Documentation/applications/system/nxdiag/index.rst
@ -7,9 +7,12 @@ It also can be used to run a tests to verify that the vendor's tools are properl

 Its primary purpose is to gather information that can be used to debug problems and ease the process of reporting bugs for uninexperienced users.

-This tool uses a Python script (``apps/tools/host_sysinfo.py``) to gather information about the host system during build and a C
+This tool uses a Python script (``nuttx/tools/host_info_dump.py``) to gather information about the host system during build and a C
 program to gather information about the NuttX system and display all available information. For more information about the python
-script, check the command line options and code comments of ``host_sysinfo.py``.
+script, check the command line options and code comments of ``host_info_dump.py``.
+
+Alternatively, ``host_info`` target can be used without enabling nxdiag application and reflashing to get information about system. 
+Target can work after configuration step and prints information about the NuttX and host systems.

 .. note:: Nxdiag requires Python 3.6 or later. On Linux distributions, the ``distro`` Python module is
          recommended as it provides more accurate information about the host system.
--- a/Documentation/guides/index.rst
+++ b/Documentation/guides/index.rst
@ -69,4 +69,5 @@ Guides
  ram_rom_disks.rst
  reading_can_msgs.rst
  remove_device_drivers_nsh.rst
+  rust.rst

--- a/Documentation/guides/rust.rst
+++ b/Documentation/guides/rust.rst
@ -0,0 +1,90 @@
+===============
+Rust in NuttX
+===============
+
+.. warning::
+    This guide is under development. Rust support in NuttX is experimental.
+
+Introduction
+============
+NuttX is exploring Rust integration to provide memory safety guarantees and modern
+language features while maintaining its small footprint and real-time capabilities.
+
+This guide covers:
+
+- Setting up Rust toolchain for NuttX development
+- Building Rust components with NuttX
+- Interoperability between Rust and C
+- Testing Rust components
+
+Prerequisites
+=============
+- Rust toolchain installed (rustup recommended)
+- NuttX build environment configured
+- Basic knowledge of Rust and NuttX development
+
+Supported Platforms
+===================
+- AArch64 (WIP)
+- ARMv7-A (WIP)
+- ARMv6-M
+- ARMv7-M
+- ARMv8-M
+- RISCV32
+- RISCV64
+
+Getting Started
+===============
+1. Install Rust toolchain and switch to nightly
+
+Please refer to the official Rust installation guide for more details: https://www.rust-lang.org/tools/install
+
+.. code-block:: bash
+
+    rustup toolchain install nightly
+    rustup default nightly
+
+2. Prepare NuttX build environment
+
+Please ensure that you have a working NuttX build environment, and with the following PR merged or cherry-picked:
+- https://github.com/apache/nuttx-apps/pull/2487
+- https://github.com/apache/nuttx/pull/15469
+
+3. Enable essential kernel configurations
+
+Pleae enable the following configurations in your NuttX configuration:
+- CONFIG_SYSTEM_TIME64
+- CONFIG_FS_LARGEFILE
+- CONFIG_TLS_NELEM = 16
+- CONFIG_DEV_URANDOM
+
+The `rv-virt:nsh` board using make as the build system is recommended for testing Rust applications as it has been verified to work with this configuration.
+
+For `rv-virt:nsh` board, you should disable `CONFIG_ARCH_FPU` configuration since RISCV32 with FPU is not supported yet.
+
+4. Enable sample application
+
+Please enable the sample application in your NuttX configuration:
+- CONFIG_EXAMPLES_HELLO_RUST_CARGO
+
+5. Build and run the sample application
+
+Build the NuttX image and run it on your target platform:
+
+.. code-block:: bash
+
+    qemu-system-riscv32 -semihosting -M virt,aclint=on -cpu rv32 -smp 8 -bios nuttx/nuttx -nographic
+
+    NuttShell (NSH) NuttX-12.8.0
+    nsh> hello_rust_cargo
+    {"name":"John","age":30}
+    {"name":"Jane","age":25}
+    Deserialized: Alice is 28 years old
+    Pretty JSON:
+    {
+    "name": "Alice",
+    "age": 28
+    }
+    Hello world from tokio!
+
+Congratulations! You have successfully built and run a Rust application on NuttX.
--- a/Documentation/implementation/simulation.rst
+++ b/Documentation/implementation/simulation.rst
--- a/Documentation/platforms/risc-v/qemu-rv/boards/rv-virt/index.rst
+++ b/Documentation/platforms/risc-v/qemu-rv/boards/rv-virt/index.rst
@ -361,7 +361,7 @@ This configuration is used for 32-bit RISC-V
 python
 ------

-Enables the Python interpreter for NuttX. This configuration is based on `nsh`_.
+Enables the Python interpreter for NuttX. This configuration is based on `netnsh`_.

 For more information on how to build and run Python on NuttX,
 please refer to the :doc:`Python Interpreter </applications/interpreters/python/index>` page.
--- a/arch/arm/include/arm/irq.h
+++ b/arch/arm/include/arm/irq.h
@ -177,7 +177,7 @@ extern volatile bool g_interrupt_context[CONFIG_SMP_NCPUS];

 /* Save the current interrupt enable state & disable IRQs. */

-static inline irqstate_t up_irq_save(void)
+static inline_function irqstate_t up_irq_save(void)
 {
  unsigned int flags;
  unsigned int temp;
@ -194,7 +194,7 @@ static inline irqstate_t up_irq_save(void)

 /* Restore saved IRQ & FIQ state */

-static inline void up_irq_restore(irqstate_t flags)
+static inline_function void up_irq_restore(irqstate_t flags)
 {
  __asm__ __volatile__
    (
@ -206,7 +206,7 @@ static inline void up_irq_restore(irqstate_t flags)

 /* Enable IRQs and return the previous IRQ state */

-static inline irqstate_t up_irq_enable(void)
+static inline_function irqstate_t up_irq_enable(void)
 {
  unsigned int flags;
  unsigned int temp;
@ -256,6 +256,25 @@ static inline_function void up_set_interrupt_context(bool flag)
 #endif
 }

+static inline_function uint32_t up_getsp(void)
+{
+  register uint32_t sp;
+
+  __asm__ __volatile__
+  (
+    "mov %0, sp\n"
+    : "=r" (sp)
+  );
+
+  return sp;
+}
+
+static inline_function uintptr_t up_getusrsp(void *regs)
+{
+  uint32_t *ptr = (uint32_t *)regs;
+  return ptr[REG_SP];
+}
+
 /****************************************************************************
 * Public Function Prototypes
 ****************************************************************************/
--- a/arch/arm/include/armv6-m/irq.h
+++ b/arch/arm/include/armv6-m/irq.h
@ -209,8 +209,7 @@ struct xcptcontext

 /* Get/set the PRIMASK register */

-static inline uint8_t getprimask(void) always_inline_function;
-static inline uint8_t getprimask(void)
+static always_inline_function uint8_t getprimask(void)
 {
  uint32_t primask;
  __asm__ __volatile__
@ -223,8 +222,7 @@ static inline uint8_t getprimask(void)
  return (uint8_t)primask;
 }

-static inline void setprimask(uint32_t primask) always_inline_function;
-static inline void setprimask(uint32_t primask)
+static always_inline_function void setprimask(uint32_t primask)
 {
  __asm__ __volatile__
    (
@ -236,16 +234,14 @@ static inline void setprimask(uint32_t primask)

 /* Disable IRQs */

-static inline void up_irq_disable(void) always_inline_function;
-static inline void up_irq_disable(void)
+static always_inline_function void up_irq_disable(void)
 {
  __asm__ __volatile__ ("\tcpsid  i\n");
 }

 /* Save the current primask state & disable IRQs */

-static inline irqstate_t up_irq_save(void) always_inline_function;
-static inline irqstate_t up_irq_save(void)
+static always_inline_function irqstate_t up_irq_save(void)
 {
  unsigned short primask;

@ -266,16 +262,14 @@ static inline irqstate_t up_irq_save(void)

 /* Enable IRQs */

-static inline void up_irq_enable(void) always_inline_function;
-static inline void up_irq_enable(void)
+static always_inline_function void up_irq_enable(void)
 {
  __asm__ __volatile__ ("\tcpsie  i\n");
 }

 /* Restore saved primask state */

-static inline void up_irq_restore(irqstate_t flags) always_inline_function;
-static inline void up_irq_restore(irqstate_t flags)
+static always_inline_function void up_irq_restore(irqstate_t flags)
 {
  /* If bit 0 of the primask is 0, then we need to restore
   * interrupts.
@ -291,8 +285,7 @@ static inline void up_irq_restore(irqstate_t flags)

 /* Get/set IPSR */

-static inline uint32_t getipsr(void) always_inline_function;
-static inline uint32_t getipsr(void)
+static always_inline_function uint32_t getipsr(void)
 {
  uint32_t ipsr;
  __asm__ __volatile__
@ -307,8 +300,7 @@ static inline uint32_t getipsr(void)

 /* Get/set CONTROL */

-static inline uint32_t getcontrol(void) always_inline_function;
-static inline uint32_t getcontrol(void)
+static always_inline_function uint32_t getcontrol(void)
 {
  uint32_t control;
  __asm__ __volatile__
@ -321,8 +313,7 @@ static inline uint32_t getcontrol(void)
  return control;
 }

-static inline void setcontrol(uint32_t control) always_inline_function;
-static inline void setcontrol(uint32_t control)
+static always_inline_function void setcontrol(uint32_t control)
 {
  __asm__ __volatile__
    (
@ -332,6 +323,20 @@ static inline void setcontrol(uint32_t control)
      : "memory");
 }

+static always_inline_function uint32_t getpsp(void)
+{
+  uint32_t psp;
+
+  __asm__ __volatile__
+    (
+     "\tmrs  %0, psp\n"
+     : "=r" (psp)
+     :
+     : "memory");
+
+  return psp;
+}
+
 /****************************************************************************
 * Name: up_cpu_index
 *
@ -344,7 +349,7 @@ static inline void setcontrol(uint32_t control)
 int up_cpu_index(void) noinstrument_function;
 #endif /* CONFIG_ARCH_HAVE_MULTICPU */

-static inline_function uint32_t up_getsp(void)
+static always_inline_function uint32_t up_getsp(void)
 {
  register uint32_t sp;

@ -357,8 +362,13 @@ static inline_function uint32_t up_getsp(void)
  return sp;
 }

-noinstrument_function
-static inline_function bool up_interrupt_context(void)
+static always_inline_function uintptr_t up_getusrsp(void *regs)
+{
+  uint32_t *ptr = (uint32_t *)regs;
+  return ptr[REG_SP];
+}
+
+static always_inline_function bool up_interrupt_context(void)
 {
  return getipsr() != 0;
 }
--- a/arch/arm/include/armv7-a/irq.h
+++ b/arch/arm/include/armv7-a/irq.h
@ -343,7 +343,7 @@ struct xcptcontext

 /* Return the current IRQ state */

-static inline irqstate_t irqstate(void)
+static inline_function irqstate_t irqstate(void)
 {
  unsigned int cpsr;

@ -360,7 +360,7 @@ static inline irqstate_t irqstate(void)

 /* Disable IRQs and return the previous IRQ state */

-noinstrument_function static inline irqstate_t up_irq_save(void)
+noinstrument_function static inline_function irqstate_t up_irq_save(void)
 {
  unsigned int cpsr;

@ -382,7 +382,7 @@ noinstrument_function static inline irqstate_t up_irq_save(void)

 /* Enable IRQs and return the previous IRQ state */

-static inline irqstate_t up_irq_enable(void)
+static inline_function irqstate_t up_irq_enable(void)
 {
  unsigned int cpsr;

@ -406,7 +406,7 @@ static inline irqstate_t up_irq_enable(void)

 /* Disable IRQs and return the previous IRQ state */

-static inline irqstate_t up_irq_disable(void)
+static inline_function irqstate_t up_irq_disable(void)
 {
  unsigned int cpsr;

@ -424,7 +424,8 @@ static inline irqstate_t up_irq_disable(void)

 /* Restore saved IRQ & FIQ state */

-noinstrument_function static inline void up_irq_restore(irqstate_t flags)
+noinstrument_function static inline_function
+void up_irq_restore(irqstate_t flags)
 {
  __asm__ __volatile__
    (
@ -472,6 +473,12 @@ static inline_function uint32_t up_getsp(void)
  return sp;
 }

+static inline_function uintptr_t up_getusrsp(void *regs)
+{
+  uint32_t *ptr = (uint32_t *)regs;
+  return ptr[REG_SP];
+}
+
 noinstrument_function
 static inline_function void up_set_interrupt_context(bool flag)
 {
--- a/arch/arm/include/armv7-m/irq.h
+++ b/arch/arm/include/armv7-m/irq.h
@ -267,8 +267,7 @@ struct xcptcontext

 /* Get/set the PRIMASK register */

-static inline uint8_t getprimask(void) always_inline_function;
-static inline uint8_t getprimask(void)
+static always_inline_function uint8_t getprimask(void)
 {
  uint32_t primask;
  __asm__ __volatile__
@ -281,8 +280,7 @@ static inline uint8_t getprimask(void)
  return (uint8_t)primask;
 }

-static inline void setprimask(uint32_t primask) always_inline_function;
-static inline void setprimask(uint32_t primask)
+static always_inline_function void setprimask(uint32_t primask)
 {
  __asm__ __volatile__
    (
@ -292,14 +290,12 @@ static inline void setprimask(uint32_t primask)
      : "memory");
 }

-static inline void cpsie(void) always_inline_function;
-static inline void cpsie(void)
+static always_inline_function void cpsie(void)
 {
  __asm__ __volatile__ ("\tcpsie  i\n");
 }

-static inline void cpsid(void) always_inline_function;
-static inline void cpsid(void)
+static always_inline_function void cpsid(void)
 {
  __asm__ __volatile__ ("\tcpsid  i\n");
 }
@ -310,8 +306,7 @@ static inline void cpsid(void)
 * lower priority level as the BASEPRI value.
 */

-static inline uint8_t getbasepri(void) always_inline_function;
-static inline uint8_t getbasepri(void)
+static always_inline_function uint8_t getbasepri(void)
 {
  uint32_t basepri;

@ -325,8 +320,7 @@ static inline uint8_t getbasepri(void)
  return (uint8_t)basepri;
 }

-static inline void setbasepri(uint32_t basepri) always_inline_function;
-static inline void setbasepri(uint32_t basepri)
+static always_inline_function void setbasepri(uint32_t basepri)
 {
  __asm__ __volatile__
    (
@ -343,8 +337,7 @@ static inline void setbasepri(uint32_t basepri)
 * 837070 Workaround may be required if we are raising the priority.
 */

-static inline void raisebasepri(uint32_t basepri) always_inline_function;
-static inline void raisebasepri(uint32_t basepri)
+static always_inline_function void raisebasepri(uint32_t basepri)
 {
  register uint32_t primask;

@ -378,8 +371,7 @@ static inline void raisebasepri(uint32_t basepri)

 /* Disable IRQs */

-static inline void up_irq_disable(void) always_inline_function;
-static inline void up_irq_disable(void)
+static always_inline_function void up_irq_disable(void)
 {
  /* Probably raising priority */

@ -388,9 +380,7 @@ static inline void up_irq_disable(void)

 /* Save the current primask state & disable IRQs */

-static inline irqstate_t up_irq_save(void)
-always_inline_function noinstrument_function;
-static inline irqstate_t up_irq_save(void)
+static always_inline_function irqstate_t up_irq_save(void)
 {
  /* Probably raising priority */

@ -401,8 +391,7 @@ static inline irqstate_t up_irq_save(void)

 /* Enable IRQs */

-static inline void up_irq_enable(void) always_inline_function;
-static inline void up_irq_enable(void)
+static always_inline_function void up_irq_enable(void)
 {
  /* In this case, we are always retaining or lowering the priority value */

@ -412,9 +401,7 @@ static inline void up_irq_enable(void)

 /* Restore saved primask state */

-static inline void up_irq_restore(irqstate_t flags)
-always_inline_function noinstrument_function;
-static inline void up_irq_restore(irqstate_t flags)
+static always_inline_function void up_irq_restore(irqstate_t flags)
 {
  /* In this case, we are always retaining or lowering the priority value */

@ -423,8 +410,7 @@ static inline void up_irq_restore(irqstate_t flags)

 /* Get/set IPSR */

-static inline uint32_t getipsr(void) always_inline_function;
-static inline uint32_t getipsr(void)
+static always_inline_function uint32_t getipsr(void)
 {
  uint32_t ipsr;
  __asm__ __volatile__
@ -439,8 +425,7 @@ static inline uint32_t getipsr(void)

 /* Get/set FAULTMASK */

-static inline uint32_t getfaultmask(void) always_inline_function;
-static inline uint32_t getfaultmask(void)
+static always_inline_function uint32_t getfaultmask(void)
 {
  uint32_t faultmask;
  __asm__ __volatile__
@ -453,8 +438,7 @@ static inline uint32_t getfaultmask(void)
  return faultmask;
 }

-static inline void setfaultmask(uint32_t faultmask) always_inline_function;
-static inline void setfaultmask(uint32_t faultmask)
+static always_inline_function void setfaultmask(uint32_t faultmask)
 {
  __asm__ __volatile__
    (
@ -466,8 +450,7 @@ static inline void setfaultmask(uint32_t faultmask)

 /* Get/set CONTROL */

-static inline uint32_t getcontrol(void) always_inline_function;
-static inline uint32_t getcontrol(void)
+static always_inline_function uint32_t getcontrol(void)
 {
  uint32_t control;
  __asm__ __volatile__
@ -480,8 +463,7 @@ static inline uint32_t getcontrol(void)
  return control;
 }

-static inline void setcontrol(uint32_t control) always_inline_function;
-static inline void setcontrol(uint32_t control)
+static always_inline_function void setcontrol(uint32_t control)
 {
  __asm__ __volatile__
    (
@ -491,6 +473,20 @@ static inline void setcontrol(uint32_t control)
      : "memory");
 }

+static always_inline_function uint32_t getpsp(void)
+{
+  uint32_t psp;
+
+  __asm__ __volatile__
+    (
+     "\tmrs  %0, psp\n"
+     : "=r" (psp)
+     :
+     : "memory");
+
+  return psp;
+}
+
 /****************************************************************************
 * Name: up_cpu_index
 *
@ -503,7 +499,7 @@ static inline void setcontrol(uint32_t control)
 int up_cpu_index(void) noinstrument_function;
 #endif /* CONFIG_ARCH_HAVE_MULTICPU */

-static inline_function uint32_t up_getsp(void)
+static always_inline_function uint32_t up_getsp(void)
 {
  register uint32_t sp;

@ -516,8 +512,13 @@ static inline_function uint32_t up_getsp(void)
  return sp;
 }

-noinstrument_function
-static inline_function bool up_interrupt_context(void)
+static always_inline_function uintptr_t up_getusrsp(void *regs)
+{
+  uint32_t *ptr = (uint32_t *)regs;
+  return ptr[REG_SP];
+}
+
+static always_inline_function bool up_interrupt_context(void)
 {
  return getipsr() != 0;
 }
--- a/arch/arm/include/armv7-r/irq.h
+++ b/arch/arm/include/armv7-r/irq.h
@ -342,7 +342,7 @@ struct xcptcontext

 /* Return the current IRQ state */

-static inline irqstate_t irqstate(void)
+static inline_function irqstate_t irqstate(void)
 {
  unsigned int cpsr;

@ -359,7 +359,7 @@ static inline irqstate_t irqstate(void)

 /* Disable IRQs and return the previous IRQ state */

-noinstrument_function static inline irqstate_t up_irq_save(void)
+noinstrument_function static inline_function irqstate_t up_irq_save(void)
 {
  unsigned int cpsr;

@ -380,7 +380,7 @@ noinstrument_function static inline irqstate_t up_irq_save(void)

 /* Enable IRQs and return the previous IRQ state */

-static inline irqstate_t up_irq_enable(void)
+static inline_function irqstate_t up_irq_enable(void)
 {
  unsigned int cpsr;

@ -401,7 +401,7 @@ static inline irqstate_t up_irq_enable(void)

 /* Disable IRQs and return the previous IRQ state */

-static inline irqstate_t up_irq_disable(void)
+static inline_function irqstate_t up_irq_disable(void)
 {
  unsigned int cpsr;

@ -419,7 +419,8 @@ static inline irqstate_t up_irq_disable(void)

 /* Restore saved IRQ & FIQ state */

-noinstrument_function static inline void up_irq_restore(irqstate_t flags)
+noinstrument_function static inline_function
+void up_irq_restore(irqstate_t flags)
 {
  __asm__ __volatile__
    (
@ -467,6 +468,12 @@ static inline_function uint32_t up_getsp(void)
  return sp;
 }

+static inline_function uintptr_t up_getusrsp(void *regs)
+{
+  uint32_t *ptr = (uint32_t *)regs;
+  return ptr[REG_SP];
+}
+
 noinstrument_function
 static inline_function void up_set_interrupt_context(bool flag)
 {
--- a/arch/arm/include/armv8-m/irq.h
+++ b/arch/arm/include/armv8-m/irq.h
@ -278,8 +278,7 @@ struct xcptcontext

 /* Get/set the PRIMASK register */

-static inline uint8_t getprimask(void) always_inline_function;
-static inline uint8_t getprimask(void)
+static always_inline_function uint8_t getprimask(void)
 {
  uint32_t primask;
  __asm__ __volatile__
@ -292,8 +291,7 @@ static inline uint8_t getprimask(void)
  return (uint8_t)primask;
 }

-static inline void setprimask(uint32_t primask) always_inline_function;
-static inline void setprimask(uint32_t primask)
+static always_inline_function void setprimask(uint32_t primask)
 {
  __asm__ __volatile__
    (
@ -303,14 +301,12 @@ static inline void setprimask(uint32_t primask)
      : "memory");
 }

-static inline void cpsie(void) always_inline_function;
-static inline void cpsie(void)
+static always_inline_function void cpsie(void)
 {
  __asm__ __volatile__ ("\tcpsie  i\n");
 }

-static inline void cpsid(void) always_inline_function;
-static inline void cpsid(void)
+static always_inline_function void cpsid(void)
 {
  __asm__ __volatile__ ("\tcpsid  i\n");
 }
@ -321,8 +317,7 @@ static inline void cpsid(void)
 * lower priority level as the BASEPRI value.
 */

-static inline uint8_t getbasepri(void) always_inline_function;
-static inline uint8_t getbasepri(void)
+static always_inline_function uint8_t getbasepri(void)
 {
  uint32_t basepri;

@ -336,8 +331,7 @@ static inline uint8_t getbasepri(void)
  return (uint8_t)basepri;
 }

-static inline void setbasepri(uint32_t basepri) always_inline_function;
-static inline void setbasepri(uint32_t basepri)
+static always_inline_function void setbasepri(uint32_t basepri)
 {
  __asm__ __volatile__
    (
@ -351,8 +345,7 @@ static inline void setbasepri(uint32_t basepri)

 /* Disable IRQs */

-static inline void up_irq_disable(void) always_inline_function;
-static inline void up_irq_disable(void)
+static always_inline_function void up_irq_disable(void)
 {
  /* Probably raising priority */

@ -361,9 +354,7 @@ static inline void up_irq_disable(void)

 /* Save the current primask state & disable IRQs */

-static inline irqstate_t up_irq_save(void)
-always_inline_function noinstrument_function;
-static inline irqstate_t up_irq_save(void)
+static always_inline_function irqstate_t up_irq_save(void)
 {
  /* Probably raising priority */

@ -374,8 +365,7 @@ static inline irqstate_t up_irq_save(void)

 /* Enable IRQs */

-static inline void up_irq_enable(void) always_inline_function;
-static inline void up_irq_enable(void)
+static always_inline_function void up_irq_enable(void)
 {
  /* In this case, we are always retaining or lowering the priority value */

@ -385,9 +375,8 @@ static inline void up_irq_enable(void)

 /* Restore saved primask state */

-static inline void up_irq_restore(irqstate_t flags)
-always_inline_function noinstrument_function;
-static inline void up_irq_restore(irqstate_t flags)
+static always_inline_function
+void up_irq_restore(irqstate_t flags)
 {
  /* In this case, we are always retaining or lowering the priority value */

@ -396,8 +385,7 @@ static inline void up_irq_restore(irqstate_t flags)

 /* Get/set IPSR */

-static inline uint32_t getipsr(void) always_inline_function;
-static inline uint32_t getipsr(void)
+static always_inline_function uint32_t getipsr(void)
 {
  uint32_t ipsr;
  __asm__ __volatile__
@ -412,8 +400,7 @@ static inline uint32_t getipsr(void)

 /* Get/set FAULTMASK */

-static inline uint32_t getfaultmask(void) always_inline_function;
-static inline uint32_t getfaultmask(void)
+static always_inline_function uint32_t getfaultmask(void)
 {
  uint32_t faultmask;
  __asm__ __volatile__
@ -426,8 +413,7 @@ static inline uint32_t getfaultmask(void)
  return faultmask;
 }

-static inline void setfaultmask(uint32_t faultmask) always_inline_function;
-static inline void setfaultmask(uint32_t faultmask)
+static always_inline_function void setfaultmask(uint32_t faultmask)
 {
  __asm__ __volatile__
    (
@ -439,8 +425,7 @@ static inline void setfaultmask(uint32_t faultmask)

 /* Get/set CONTROL */

-static inline uint32_t getcontrol(void) always_inline_function;
-static inline uint32_t getcontrol(void)
+static always_inline_function uint32_t getcontrol(void)
 {
  uint32_t control;
  __asm__ __volatile__
@ -453,8 +438,7 @@ static inline uint32_t getcontrol(void)
  return control;
 }

-static inline void setcontrol(uint32_t control) always_inline_function;
-static inline void setcontrol(uint32_t control)
+static always_inline_function void setcontrol(uint32_t control)
 {
  __asm__ __volatile__
    (
@ -464,6 +448,20 @@ static inline void setcontrol(uint32_t control)
      : "memory");
 }

+static always_inline_function uint32_t getpsp(void)
+{
+  uint32_t psp;
+
+  __asm__ __volatile__
+    (
+     "\tmrs  %0, psp\n"
+     : "=r" (psp)
+     :
+     : "memory");
+
+  return psp;
+}
+
 /****************************************************************************
 * Name: up_cpu_index
 *
@ -476,7 +474,7 @@ static inline void setcontrol(uint32_t control)
 int up_cpu_index(void) noinstrument_function;
 #endif /* CONFIG_ARCH_HAVE_MULTICPU */

-static inline_function uint32_t up_getsp(void)
+static always_inline_function uint32_t up_getsp(void)
 {
  uint32_t sp;

@ -489,8 +487,13 @@ static inline_function uint32_t up_getsp(void)
  return sp;
 }

-noinstrument_function
-static inline_function bool up_interrupt_context(void)
+static always_inline_function uintptr_t up_getusrsp(void *regs)
+{
+  uint32_t *ptr = (uint32_t *)regs;
+  return ptr[REG_SP];
+}
+
+static always_inline_function bool up_interrupt_context(void)
 {
  return getipsr() != 0;
 }
--- a/arch/arm/include/armv8-r/irq.h
+++ b/arch/arm/include/armv8-r/irq.h
@ -342,7 +342,7 @@ struct xcptcontext

 /* Return the current IRQ state */

-static inline irqstate_t irqstate(void)
+static inline_function irqstate_t irqstate(void)
 {
  unsigned int cpsr;

@ -359,7 +359,7 @@ static inline irqstate_t irqstate(void)

 /* Disable IRQs and return the previous IRQ state */

-noinstrument_function static inline irqstate_t up_irq_save(void)
+noinstrument_function static inline_function irqstate_t up_irq_save(void)
 {
  unsigned int cpsr;

@ -380,7 +380,7 @@ noinstrument_function static inline irqstate_t up_irq_save(void)

 /* Enable IRQs and return the previous IRQ state */

-static inline irqstate_t up_irq_enable(void)
+static inline_function irqstate_t up_irq_enable(void)
 {
  unsigned int cpsr;

@ -401,7 +401,7 @@ static inline irqstate_t up_irq_enable(void)

 /* Disable IRQs and return the previous IRQ state */

-static inline irqstate_t up_irq_disable(void)
+static inline_function irqstate_t up_irq_disable(void)
 {
  unsigned int cpsr;

@ -419,7 +419,8 @@ static inline irqstate_t up_irq_disable(void)

 /* Restore saved IRQ & FIQ state */

-noinstrument_function static inline void up_irq_restore(irqstate_t flags)
+noinstrument_function static inline_function
+void up_irq_restore(irqstate_t flags)
 {
  __asm__ __volatile__
    (
@ -467,6 +468,12 @@ static inline_function uint32_t up_getsp(void)
  return sp;
 }

+static inline_function uintptr_t up_getusrsp(void *regs)
+{
+  uint32_t *ptr = (uint32_t *)regs;
+  return ptr[REG_SP];
+}
+
 noinstrument_function
 static inline_function void up_set_interrupt_context(bool flag)
 {
--- a/arch/arm/include/tlsr82/irq.h
+++ b/arch/arm/include/tlsr82/irq.h
@ -194,7 +194,7 @@ extern volatile bool g_interrupt_context[CONFIG_SMP_NCPUS];

 /* Save the current interrupt enable state & disable IRQs. */

-static inline irqstate_t up_irq_save(void)
+static inline_function irqstate_t up_irq_save(void)
 {
  irqstate_t r = _IRQ_EN_REG;
  _IRQ_EN_REG = 0;
@ -203,36 +203,36 @@ static inline irqstate_t up_irq_save(void)

 /* Restore saved IRQ & FIQ state */

-static inline void up_irq_restore(irqstate_t flags)
+static inline_function void up_irq_restore(irqstate_t flags)
 {
  _IRQ_EN_REG = flags;
 }

 /* Enable IRQs and return the previous IRQ state */

-static inline irqstate_t up_irq_enable(void)
+static inline_function irqstate_t up_irq_enable(void)
 {
  irqstate_t r = _IRQ_EN_REG;
  _IRQ_EN_REG = 1;
  return r;
 }

-static inline void up_irq_disable(void)
+static inline_function void up_irq_disable(void)
 {
  up_irq_save();
 }

-static inline void up_disable_irq(int irq)
+static inline_function void up_disable_irq(int irq)
 {
  _IRQ_MASK_REG &= ~(1 << irq);
 }

-static inline void up_enable_irq(int irq)
+static inline_function void up_enable_irq(int irq)
 {
  _IRQ_MASK_REG |= (1 << irq);
 }

-static inline uint32_t getcontrol(void)
+static inline_function uint32_t getcontrol(void)
 {
  return 0;
 }
@ -262,6 +262,12 @@ static inline_function uint32_t up_getsp(void)
  return sp;
 }

+static inline_function uintptr_t up_getusrsp(void *regs)
+{
+  uint32_t *ptr = (uint32_t *)regs;
+  return ptr[REG_SP];
+}
+
 noinstrument_function
 static inline_function bool up_interrupt_context(void)
 {
--- a/arch/arm/src/CMakeLists.txt
+++ b/arch/arm/src/CMakeLists.txt
@ -29,7 +29,7 @@ add_subdirectory(common)
 target_include_directories(arch BEFORE PUBLIC ${NUTTX_CHIP_ABS_DIR} common
                                              ${ARCH_SUBDIR})

-if(NOT CONFIG_BUILD_FLAT)
+if(CONFIG_BUILD_PROTECTED)
  target_include_directories(arch_interface BEFORE PUBLIC ${NUTTX_CHIP_ABS_DIR}
                                                          common ${ARCH_SUBDIR})
 endif()
--- a/arch/arm/src/am335x/am335x_can.c
+++ b/arch/arm/src/am335x/am335x_can.c
@ -27,9 +27,11 @@
 #include <nuttx/config.h>

 #include <assert.h>
+#include <sched.h>

 #include <arch/board/board.h>
 #include <nuttx/irq.h>
+#include <nuttx/spinlock.h>
 #include <nuttx/arch.h>
 #include <nuttx/can/can.h>

@ -205,6 +207,8 @@ static struct can_dev_s g_can1dev =
 };
 #endif

+static spinlock_t g_can_lock = SP_UNLOCKED;
+
 /****************************************************************************
 * Private Functions
 ****************************************************************************/
@ -1079,7 +1083,8 @@ struct can_dev_s *am335x_can_initialize(int port)

  syslog(LOG_DEBUG, "CAN%d\n", port);

-  flags = enter_critical_section();
+  flags = spin_lock_irqsave(&g_can_lock);
+  sched_lock();

 #ifdef CONFIG_AM335X_CAN0
  if (port == 0)
@ -1109,11 +1114,13 @@ struct can_dev_s *am335x_can_initialize(int port)
    {
      canerr("Unsupported port: %d\n", port);

-      leave_critical_section(flags);
+      spin_unlock_irqrestore(&g_can_lock, flags);
+      sched_unlock();
      return NULL;
    }

-  leave_critical_section(flags);
+  spin_unlock_irqrestore(&g_can_lock, flags);
+  sched_unlock();

  return candev;
 }
@ -1124,7 +1131,8 @@ void am335x_can_uninitialize(struct can_dev_s *dev)

  DEBUGASSERT(dev);

-  flags = enter_critical_section();
+  flags = spin_lock_irqsave(&g_can_lock);
+  sched_lock();

 #ifdef CONFIG_AM335X_CAN0
  if (dev == &g_can0dev)
@ -1151,7 +1159,8 @@ void am335x_can_uninitialize(struct can_dev_s *dev)
      canerr("Not a CAN device: %p\n", dev);
    }

-  leave_critical_section(flags);
+  spin_unlock_irqrestore(&g_can_lock, flags);
+  sched_unlock();
 }

 #endif
--- a/arch/arm/src/am335x/am335x_gpio.c
+++ b/arch/arm/src/am335x/am335x_gpio.c
@ -31,6 +31,7 @@
 #include <errno.h>

 #include <nuttx/irq.h>
+#include <nuttx/spinlock.h>

 #include "chip.h"
 #include "arm_internal.h"
@ -219,6 +220,8 @@ static const uint8_t *g_gpio_padctl[AM335X_GPIO_NPORTS] =
  g_gpio3_padctl,                    /* GPIO3 */
 };

+static spinlock_t g_gpio_lock = SP_UNLOCKED;
+
 /****************************************************************************
 * Private Functions
 ****************************************************************************/
@ -364,7 +367,7 @@ int am335x_gpio_config(gpio_pinset_t pinset)

  /* Configure the pin as an input initially to avoid any spurious outputs */

-  flags = enter_critical_section();
+  flags = spin_lock_irqsave(&g_gpio_lock);

  /* Configure based upon the pin mode */

@ -407,7 +410,7 @@ int am335x_gpio_config(gpio_pinset_t pinset)
        break;
    }

-  leave_critical_section(flags);
+  spin_unlock_irqrestore(&g_gpio_lock, flags);
  return ret;
 }

@ -425,9 +428,9 @@ void am335x_gpio_write(gpio_pinset_t pinset, bool value)
  int port = (pinset & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT;
  int pin  = (pinset & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT;

-  flags = enter_critical_section();
+  flags = spin_lock_irqsave(&g_gpio_lock);
  am335x_gpio_setoutput(port, pin, value);
-  leave_critical_section(flags);
+  spin_unlock_irqrestore(&g_gpio_lock, flags);
 }

 /****************************************************************************
@ -445,9 +448,9 @@ bool am335x_gpio_read(gpio_pinset_t pinset)
  int pin  = (pinset & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT;
  bool value;

-  flags = enter_critical_section();
+  flags = spin_lock_irqsave(&g_gpio_lock);
  value = am335x_gpio_getinput(port, pin);
-  leave_critical_section(flags);
+  spin_unlock_irqrestore(&g_gpio_lock, flags);
  return value;
 }

--- a/arch/arm/src/am335x/am335x_i2c.c
+++ b/arch/arm/src/am335x/am335x_i2c.c
@ -37,6 +37,7 @@

 #include <nuttx/arch.h>
 #include <nuttx/irq.h>
+#include <nuttx/spinlock.h>
 #include <nuttx/clock.h>
 #include <nuttx/mutex.h>
 #include <nuttx/semaphore.h>
@ -185,6 +186,7 @@ struct am335x_i2c_priv_s

  int refs;                    /* Reference count */
  mutex_t lock;                /* Mutual exclusion mutex */
+  spinlock_t spinlock;         /* Spinlock */
 #ifndef CONFIG_I2C_POLLED
  sem_t sem_isr;               /* Interrupt wait semaphore */
 #endif
@ -317,6 +319,7 @@ static struct am335x_i2c_priv_s am335x_i2c0_priv =
  .config     = &am335x_i2c0_config,
  .refs       = 0,
  .lock       = NXMUTEX_INITIALIZER,
+  .spinlock   = SP_UNLOCKED,
 #ifndef CONFIG_I2C_POLLED
  .sem_isr    = SEM_INITIALIZER(0),
 #endif
@ -352,6 +355,7 @@ static struct am335x_i2c_priv_s am335x_i2c1_priv =
  .config     = &am335x_i2c1_config,
  .refs       = 0,
  .lock       = NXMUTEX_INITIALIZER,
+  .spinlock   = SP_UNLOCKED,
 #ifndef CONFIG_I2C_POLLED
  .sem_isr    = SEM_INITIALIZER(0),
 #endif
@ -387,6 +391,7 @@ static struct am335x_i2c_priv_s am335x_i2c2_priv =
  .config     = &am335x_i2c2_config,
  .refs       = 0,
  .lock       = NXMUTEX_INITIALIZER,
+  .spinlock   = SP_UNLOCKED,
 #ifndef CONFIG_I2C_POLLED
  .sem_isr    = SEM_INITIALIZER(0),
 #endif
@ -492,7 +497,7 @@ static inline int am335x_i2c_sem_waitdone(struct am335x_i2c_priv_s *priv)
  uint32_t regval;
  int ret;

-  flags = enter_critical_section();
+  flags = spin_lock_irqsave(&priv->spinlock);

  /* Enable Interrupts when master mode */

@ -529,6 +534,8 @@ static inline int am335x_i2c_sem_waitdone(struct am335x_i2c_priv_s *priv)
   */

  priv->intstate = INTSTATE_WAITING;
+  spin_unlock_irqrestore(&priv->spinlock, flags);
+
  do
    {
      /* Wait until either the transfer is complete or the timeout expires */
@ -551,6 +558,8 @@ static inline int am335x_i2c_sem_waitdone(struct am335x_i2c_priv_s *priv)
        }
    }

+  flags = spin_lock_irqsave(&priv->spinlock);
+
  /* Loop until the interrupt level transfer is complete. */

  while (priv->intstate != INTSTATE_DONE);
@ -563,7 +572,7 @@ static inline int am335x_i2c_sem_waitdone(struct am335x_i2c_priv_s *priv)

  am335x_i2c_putreg(priv, AM335X_I2C_IRQ_EN_CLR_OFFSET, I2C_ICR_CLEARMASK);

-  leave_critical_section(flags);
+  spin_unlock_irqrestore(&priv->spinlock, flags);
  return ret;
 }
 #else
@ -992,7 +1001,7 @@ static int am335x_i2c_isr_process(struct am335x_i2c_priv_s *priv)
           */

 #ifdef CONFIG_I2C_POLLED
-          irqstate_t flags = enter_critical_section();
+          irqstate_t flags = spin_lock_irqsave(&priv->spinlock);
 #endif

          /* Transmit a byte */
@ -1001,7 +1010,7 @@ static int am335x_i2c_isr_process(struct am335x_i2c_priv_s *priv)
          priv->dcnt--;

 #ifdef CONFIG_I2C_POLLED
-          leave_critical_section(flags);
+          spin_unlock_irqrestore(&priv->spinlock, flags);
 #endif
          if ((priv->dcnt == 0) && ((priv->flags & I2C_M_NOSTOP) == 0))
            {
@ -1026,7 +1035,7 @@ static int am335x_i2c_isr_process(struct am335x_i2c_priv_s *priv)
           */

 #ifdef CONFIG_I2C_POLLED
-          irqstate_t flags = enter_critical_section();
+          irqstate_t flags = spin_lock_irqsave(&priv->spinlock);
 #endif

          /* Receive a byte */
@ -1036,7 +1045,7 @@ static int am335x_i2c_isr_process(struct am335x_i2c_priv_s *priv)
          priv->dcnt--;

 #ifdef CONFIG_I2C_POLLED
-          leave_critical_section(flags);
+          spin_unlock_irqrestore(&priv->spinlock, flags);
 #endif
          if ((priv->msgc <= 0) && (priv->dcnt == 0))
            {
@ -1100,7 +1109,7 @@ static int am335x_i2c_isr_process(struct am335x_i2c_priv_s *priv)
               */

 #ifdef CONFIG_I2C_POLLED
-              irqstate_t flags = enter_critical_section();
+              irqstate_t flags = spin_lock_irqsave(&priv->spinlock);
 #endif

              /* Transmit a byte */
@ -1109,7 +1118,7 @@ static int am335x_i2c_isr_process(struct am335x_i2c_priv_s *priv)
              priv->dcnt--;

 #ifdef CONFIG_I2C_POLLED
-              leave_critical_section(flags);
+              spin_unlock_irqrestore(&priv->spinlock, flags);
 #endif
              if ((priv->dcnt == 0) && ((priv->flags & I2C_M_NOSTOP) == 0))
                {
--- a/arch/arm/src/am335x/am335x_irq.c
+++ b/arch/arm/src/am335x/am335x_irq.c
@ -29,6 +29,7 @@
 #include <assert.h>

 #include <nuttx/arch.h>
+#include <nuttx/spinlock.h>

 #include "arm_internal.h"
 #include "sctlr.h"
@ -36,6 +37,13 @@
 #include "am335x_gpio.h"
 #include "am335x_irq.h"

+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+#ifdef CONFIG_ARCH_IRQPRIO
+static spinlock_t g_irq_lock = SP_UNLOCKED;
+#endif
+
 /****************************************************************************
 * Public Data
 ****************************************************************************/
@ -328,7 +336,7 @@ int up_prioritize_irq(int irq, int priority)
    {
      /* These operations must be atomic */

-      flags = enter_critical_section();
+      flags = spin_lock_irqsave(&g_irq_lock);

 #if 0 // TODO
      /* Set the new priority */
@ -340,7 +348,7 @@ int up_prioritize_irq(int irq, int priority)
      putreg32(regval, regaddr);
 #endif

-      leave_critical_section(flags);
+      spin_unlock_irqrestore(&g_irq_lock, flags);
      return OK;
    }

--- a/arch/arm/src/am335x/am335x_serial.c
+++ b/arch/arm/src/am335x/am335x_serial.c
@ -39,6 +39,7 @@
 #endif

 #include <nuttx/irq.h>
+#include <nuttx/spinlock.h>
 #include <nuttx/arch.h>
 #include <nuttx/fs/ioctl.h>
 #include <nuttx/serial/serial.h>
@ -76,13 +77,14 @@

 struct up_dev_s
 {
-  uint32_t uartbase;  /* Base address of UART registers */
-  uint32_t baud;      /* Configured baud */
-  uint32_t ier;       /* Saved IER value */
-  uint8_t  irq;       /* IRQ associated with this UART */
-  uint8_t  parity;    /* 0=none, 1=odd, 2=even */
-  uint8_t  bits;      /* Number of bits (7 or 8) */
-  bool     stopbits2; /* true: Configure with 2 stop bits instead of 1 */
+  uint32_t   uartbase;  /* Base address of UART registers */
+  uint32_t   baud;      /* Configured baud */
+  uint32_t   ier;       /* Saved IER value */
+  uint8_t    irq;       /* IRQ associated with this UART */
+  uint8_t    parity;    /* 0=none, 1=odd, 2=even */
+  uint8_t    bits;      /* Number of bits (7 or 8) */
+  bool       stopbits2; /* true: Configure with 2 stop bits instead of 1 */
+  spinlock_t spinlock;  /* Spinlock */
 };

 /****************************************************************************
@ -169,6 +171,7 @@ static struct up_dev_s g_uart0priv =
  .parity         = CONFIG_UART0_PARITY,
  .bits           = CONFIG_UART0_BITS,
  .stopbits2      = CONFIG_UART0_2STOP,
+  .spinlock       = SP_UNLOCKED,
 };

 static uart_dev_t g_uart0port =
@ -200,6 +203,7 @@ static struct up_dev_s g_uart1priv =
  .parity         = CONFIG_UART1_PARITY,
  .bits           = CONFIG_UART1_BITS,
  .stopbits2      = CONFIG_UART1_2STOP,
+  .spinlock       = SP_UNLOCKED,
 };

 static uart_dev_t g_uart1port =
@ -230,6 +234,7 @@ static struct up_dev_s g_uart2priv =
  .parity         = CONFIG_UART2_PARITY,
  .bits           = CONFIG_UART2_BITS,
  .stopbits2      = CONFIG_UART2_2STOP,
+  .spinlock       = SP_UNLOCKED,
 };

 static uart_dev_t g_uart2port =
@ -260,6 +265,7 @@ static struct up_dev_s g_uart3priv =
  .parity         = CONFIG_UART3_PARITY,
  .bits           = CONFIG_UART3_BITS,
  .stopbits2      = CONFIG_UART3_2STOP,
+  .spinlock       = SP_UNLOCKED,
 };

 static uart_dev_t g_uart3port =
@ -290,6 +296,7 @@ static struct up_dev_s g_uart4priv =
  .parity         = CONFIG_UART4_PARITY,
  .bits           = CONFIG_UART4_BITS,
  .stopbits2      = CONFIG_UART4_2STOP,
+  .spinlock       = SP_UNLOCKED,
 };

 static uart_dev_t g_uart4port =
@ -320,6 +327,7 @@ static struct up_dev_s g_uart5priv =
  .parity         = CONFIG_UART5_PARITY,
  .bits           = CONFIG_UART5_BITS,
  .stopbits2      = CONFIG_UART5_2STOP,
+  .spinlock       = SP_UNLOCKED,
 };

 static uart_dev_t g_uart5port =
@ -484,6 +492,10 @@ static uart_dev_t g_uart5port =
 #  define UART5_ASSIGNED      1
 #endif

+/* Spinlock */
+
+static spinlock_t g_gpio_lock = SP_UNLOCKED;
+
 /****************************************************************************
 * Inline Functions
 ****************************************************************************/
@ -567,7 +579,7 @@ static inline void am335x_uart0config(void)

  /* Step 1: Enable power to UART0 */

-  flags   = enter_critical_section();
+  flags = spin_lock_irqsave(&g_gpio_lock);
 #warning Missing logic

  /* Step 2: Enable clocking to UART0 */
@ -577,7 +589,7 @@ static inline void am335x_uart0config(void)

  am335x_gpio_config(GPIO_UART0_TXD);
  am335x_gpio_config(GPIO_UART0_RXD);
-  leave_critical_section(flags);
+  spin_unlock_irqrestore(&g_gpio_lock, flags);
 };
 #endif

@ -588,7 +600,7 @@ static inline void am335x_uart1config(void)

  /* Step 1: Enable power to UART1 */

-  flags   = enter_critical_section();
+  flags = spin_lock_irqsave(&g_gpio_lock);
 #warning Missing logic

  /* Step 2: Enable clocking to UART1 */
@ -598,7 +610,7 @@ static inline void am335x_uart1config(void)

  am335x_gpio_config(GPIO_UART1_TXD);
  am335x_gpio_config(GPIO_UART1_RXD);
-  leave_critical_section(flags);
+  spin_unlock_irqrestore(&g_gpio_lock, flags);
 };
 #endif

@ -609,7 +621,7 @@ static inline void am335x_uart2config(void)

  /* Step 1: Enable power to UART2 */

-  flags   = enter_critical_section();
+  flags = spin_lock_irqsave(&g_gpio_lock);
 #warning Missing logic

  /* Step 2: Enable clocking on UART2 */
@ -619,7 +631,7 @@ static inline void am335x_uart2config(void)

  am335x_gpio_config(GPIO_UART2_TXD);
  am335x_gpio_config(GPIO_UART2_RXD);
-  leave_critical_section(flags);
+  spin_unlock_irqrestore(&g_gpio_lock, flags);
 };
 #endif

@ -630,7 +642,7 @@ static inline void am335x_uart3config(void)

  /* Step 1: Enable power to UART3 */

-  flags   = enter_critical_section();
+  flags = spin_lock_irqsave(&g_gpio_lock);
 #warning Missing logic

  /* Step 2: Enable clocking to UART3 */
@ -640,7 +652,7 @@ static inline void am335x_uart3config(void)

  am335x_gpio_config(GPIO_UART3_TXD);
  am335x_gpio_config(GPIO_UART3_RXD);
-  leave_critical_section(flags);
+  spin_unlock_irqrestore(&g_gpio_lock, flags);
 };
 #endif

@ -651,7 +663,7 @@ static inline void am335x_uart4config(void)

  /* Step 1: Enable power to UART4 */

-  flags   = enter_critical_section();
+  flags = spin_lock_irqsave(&g_gpio_lock);
 #warning Missing logic

  /* Step 2: Enable clocking to UART4 */
@ -661,7 +673,7 @@ static inline void am335x_uart4config(void)

  am335x_gpio_config(GPIO_UART4_TXD);
  am335x_gpio_config(GPIO_UART4_RXD);
-  leave_critical_section(flags);
+  spin_unlock_irqrestore(&g_gpio_lock, flags);
 };
 #endif

@ -672,7 +684,7 @@ static inline void am335x_uart5config(void)

  /* Step 1: Enable power to UART5 */

-  flags   = enter_critical_section();
+  flags = spin_lock_irqsave(&g_gpio_lock);
 #warning Missing logic

  /* Step 2: Enable clocking to UART5 */
@ -682,7 +694,7 @@ static inline void am335x_uart5config(void)

  am335x_gpio_config(GPIO_UART5_TXD);
  am335x_gpio_config(GPIO_UART5_RXD);
-  leave_critical_section(flags);
+  spin_unlock_irqrestore(&g_gpio_lock, flags);
 };
 #endif

@ -1029,18 +1041,18 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)

    case TIOCSBRK:  /* BSD compatibility: Turn break on, unconditionally */
      {
-        irqstate_t flags = enter_critical_section();
+        irqstate_t flags = spin_lock_irqsave(&priv->spinlock);
        up_enablebreaks(priv, true);
-        leave_critical_section(flags);
+        spin_unlock_irqrestore(&priv->spinlock, flags);
      }
      break;

    case TIOCCBRK:  /* BSD compatibility: Turn break off, unconditionally */
      {
        irqstate_t flags;
-        flags = enter_critical_section();
+        flags = spin_lock_irqsave(&priv->spinlock);
        up_enablebreaks(priv, false);
-        leave_critical_section(flags);
+        spin_unlock_irqrestore(&priv->spinlock, flags);
      }
      break;

@ -1204,13 +1216,15 @@ static void up_txint(struct uart_dev_s *dev, bool enable)
  struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
  irqstate_t flags;

-  flags = enter_critical_section();
+  flags = spin_lock_irqsave(&priv->spinlock);
  if (enable)
    {
 #ifndef CONFIG_SUPPRESS_SERIAL_INTS
      priv->ier |= UART_IER_THR;
      up_serialout(priv, AM335X_UART_IER_OFFSET, priv->ier);

+      spin_unlock_irqrestore(&priv->spinlock, flags);
+
      /* Fake a TX interrupt here by just calling uart_xmitchars() with
       * interrupts disabled (note this may recurse).
       */
@ -1222,9 +1236,9 @@ static void up_txint(struct uart_dev_s *dev, bool enable)
    {
      priv->ier &= ~UART_IER_THR;
      up_serialout(priv, AM335X_UART_IER_OFFSET, priv->ier);
-    }

-  leave_critical_section(flags);
+      spin_unlock_irqrestore(&priv->spinlock, flags);
+    }
 }

 /****************************************************************************
--- a/arch/arm/src/arm/arm_schedulesigaction.c
+++ b/arch/arm/src/arm/arm_schedulesigaction.c
@ -35,6 +35,7 @@

 #include "arm.h"
 #include "sched/sched.h"
+#include "signal/signal.h"
 #include "arm_internal.h"

 /****************************************************************************
@ -90,8 +91,8 @@ void up_schedule_sigaction(struct tcb_s *tcb)
    {
      /* In this case just deliver the signal now. */

-      (tcb->sigdeliver)(tcb);
-      tcb->sigdeliver = NULL;
+      nxsig_deliver(tcb);
+      tcb->flags &= ~TCB_FLAG_SIGDELIVER;
    }

  /* Otherwise, we are (1) signaling a task is not running
--- a/arch/arm/src/arm/arm_sigdeliver.c
+++ b/arch/arm/src/arm/arm_sigdeliver.c
@ -37,6 +37,7 @@
 #include <arch/board/board.h>

 #include "sched/sched.h"
+#include "signal/signal.h"
 #include "arm_internal.h"

 /****************************************************************************
@ -59,9 +60,9 @@ void arm_sigdeliver(void)

  board_autoled_on(LED_SIGNAL);

-  sinfo("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
-        rtcb, rtcb->sigdeliver, rtcb->sigpendactionq.head);
-  DEBUGASSERT(rtcb->sigdeliver != NULL);
+  sinfo("rtcb=%p sigpendactionq.head=%p\n",
+        rtcb, rtcb->sigpendactionq.head);
+  DEBUGASSERT((rtcb->flags & TCB_FLAG_SIGDELIVER) != 0);

 #ifndef CONFIG_SUPPRESS_INTERRUPTS
  /* Then make sure that interrupts are enabled.  Signal handlers must always
@ -73,7 +74,7 @@ void arm_sigdeliver(void)

  /* Deliver the signal */

-  (rtcb->sigdeliver)(rtcb);
+  nxsig_deliver(rtcb);

  /* Output any debug messages BEFORE restoring errno (because they may
   * alter errno), then disable interrupts again and restore the original
@ -93,7 +94,9 @@ void arm_sigdeliver(void)
   * could be modified by a hostile program.
   */

-  rtcb->sigdeliver = NULL;  /* Allows next handler to be scheduled */
+  /* Allows next handler to be scheduled */
+
+  rtcb->flags &= ~TCB_FLAG_SIGDELIVER;

  /* Then restore the correct state for this thread of execution. */

--- a/arch/arm/src/armv6-m/arm_doirq.c
+++ b/arch/arm/src/armv6-m/arm_doirq.c
@ -34,6 +34,7 @@
 #include <nuttx/board.h>
 #include <arch/board/board.h>
 #include <sched/sched.h>
+#include <signal/signal.h>

 #include "arm_internal.h"
 #include "exc_return.h"
@ -86,7 +87,7 @@ uint32_t *arm_doirq(int irq, uint32_t *regs)

      irq_dispatch(irq, regs);
 #endif
-      if (tcb->sigdeliver)
+      if ((tcb->flags & TCB_FLAG_SIGDELIVER) != 0)
        {
          /* Pendsv able to access running tcb with no critical section */

--- a/arch/arm/src/armv6-m/arm_ramvec_attach.c
+++ b/arch/arm/src/armv6-m/arm_ramvec_attach.c
@ -31,11 +31,18 @@

 #include <nuttx/irq.h>
 #include <nuttx/arch.h>
+#include <nuttx/spinlock.h>

 #include "ram_vectors.h"

 #ifdef CONFIG_ARCH_RAMVECTORS

+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static spinlock_t g_ramvec_lock = SP_UNLOCKED;
+
 /****************************************************************************
 * Public Functions
 ****************************************************************************/
@ -68,7 +75,7 @@ int arm_ramvec_attach(int irq, up_vector_t vector)
       * common exception handler.
       */

-      flags = enter_critical_section();
+      flags = spin_lock_irqsave(&g_ramvec_lock);
      if (vector == NULL)
        {
          /* Disable the interrupt if we can before detaching it.  We might
@ -87,7 +94,7 @@ int arm_ramvec_attach(int irq, up_vector_t vector)
      /* Save the new vector in the vector table */

      g_ram_vectors[irq] = vector;
-      leave_critical_section(flags);
+      spin_unlock_irqrestore(&g_ramvec_lock, flags);
      ret = OK;
    }

--- a/arch/arm/src/armv6-m/arm_schedulesigaction.c
+++ b/arch/arm/src/armv6-m/arm_schedulesigaction.c
@ -37,6 +37,7 @@
 #include "psr.h"
 #include "exc_return.h"
 #include "sched/sched.h"
+#include "signal/signal.h"
 #include "arm_internal.h"
 #include "irq/irq.h"
 #include "nvic.h"
@ -96,8 +97,8 @@ void up_schedule_sigaction(struct tcb_s *tcb)
       * REVISIT:  Signal handle will run in a critical section!
       */

-      (tcb->sigdeliver)(tcb);
-      tcb->sigdeliver = NULL;
+      nxsig_deliver(tcb);
+      tcb->flags &= ~TCB_FLAG_SIGDELIVER;
    }
  else if (tcb == rtcb && ipsr != NVIC_IRQ_PENDSV)
    {
--- a/arch/arm/src/armv6-m/arm_sigdeliver.c
+++ b/arch/arm/src/armv6-m/arm_sigdeliver.c
@ -37,6 +37,7 @@
 #include <arch/board/board.h>

 #include "sched/sched.h"
+#include "signal/signal.h"
 #include "arm_internal.h"

 /****************************************************************************
@ -69,9 +70,9 @@ void arm_sigdeliver(void)

  board_autoled_on(LED_SIGNAL);

-  sinfo("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
-        rtcb, rtcb->sigdeliver, rtcb->sigpendactionq.head);
-  DEBUGASSERT(rtcb->sigdeliver != NULL);
+  sinfo("rtcb=%p sigpendactionq.head=%p\n",
+        rtcb, rtcb->sigpendactionq.head);
+  DEBUGASSERT((rtcb->flags & TCB_FLAG_SIGDELIVER) != 0);

 retry:
 #ifdef CONFIG_SMP
@ -103,7 +104,7 @@ retry:

  /* Deliver the signal */

-  (rtcb->sigdeliver)(rtcb);
+  nxsig_deliver(rtcb);

  /* Output any debug messages BEFORE restoring errno (because they may
   * alter errno), then disable interrupts again and restore the original
@ -150,7 +151,9 @@ retry:
   * could be modified by a hostile program.
   */

-  rtcb->sigdeliver = NULL;  /* Allows next handler to be scheduled */
+  /* Allows next handler to be scheduled */
+
+  rtcb->flags &= ~TCB_FLAG_SIGDELIVER;

  /* Then restore the correct state for this thread of
   * execution.
--- a/arch/arm/src/armv7-a/Toolchain.defs
+++ b/arch/arm/src/armv7-a/Toolchain.defs
@ -35,7 +35,7 @@ else ifeq ($(CONFIG_ARCH_CORTEXA9),y)
 endif

 ifeq ($(CONFIG_ARM_THUMB),y)
-  LLVM_ARCHTYPE := thumbv7
+  LLVM_ARCHTYPE := thumbv7a
 else
  LLVM_ARCHTYPE := armv7a
 endif
--- a/arch/arm/src/armv7-a/arm_l2cc_pl310.c
+++ b/arch/arm/src/armv7-a/arm_l2cc_pl310.c
@ -38,6 +38,7 @@
 #include <debug.h>

 #include <nuttx/irq.h>
+#include <nuttx/spinlock.h>

 #include "arm_internal.h"
 #include "barriers.h"
@ -225,6 +226,12 @@

 #define PL310_GULP_SIZE            4096

+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static spinlock_t g_l2cc_lock = SP_UNLOCKED;
+
 /****************************************************************************
 * Private Functions
 ****************************************************************************/
@ -262,6 +269,66 @@ static void pl310_flush_all(void)
  putreg32(0, L2CC_CSR);
 }

+/****************************************************************************
+ * Name: l2cc_disable_nolock
+ *
+ * Description:
+ *    Disable the L2CC-P310 L2 cache by clearing the Control Register (CR)
+ *
+ * Input Parameters:
+ *    None
+ *
+ * Returned Value:
+ *    None
+ *
+ ****************************************************************************/
+
+static void l2cc_disable_nolock(void)
+{
+  /* Flush all ways using the Clean Invalidate Way Register (CIWR). */
+
+  pl310_flush_all();
+
+  /* Disable the L2CC-P310 L2 cache by clearing the Control Register (CR) */
+
+  putreg32(0, L2CC_CR);
+  ARM_DSB();
+  ARM_ISB();
+}
+
+/****************************************************************************
+ * Name: l2cc_invalidate_all_nolock
+ *
+ * Description:
+ *   Invalidate all ways using the Invalidate Way Register (IWR).
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static void l2cc_invalidate_all_nolock(void)
+{
+  /* Invalidate all ways by writing the bit mask of ways to be invalidated
+   * the Invalidate Way Register (IWR).
+   */
+
+  putreg32(PL310_WAY_MASK, L2CC_IWR);
+
+  /* Wait for cache operation by way to complete */
+
+  while ((getreg32(L2CC_IWR) & PL310_WAY_MASK) != 0);
+
+  /* Drain the STB. Operation complete when all buffers, LRB, LFB, STB, and
+   * EB, are empty.
+   */
+
+  putreg32(0, L2CC_CSR);
+}
+
 /****************************************************************************
 * Public Functions
 ****************************************************************************/
@ -457,18 +524,18 @@ void l2cc_enable(void)

  /* Invalidate and enable the cache (must be disabled to do this!) */

-  flags = enter_critical_section();
+  flags = spin_lock_irqsave(&g_l2cc_lock);

  if ((getreg32(L2CC_CR) & L2CC_CR_L2CEN) != 0)
    {
-      l2cc_disable();
+      l2cc_disable_nolock();
    }

-  l2cc_invalidate_all();
+  l2cc_invalidate_all_nolock();
  putreg32(L2CC_CR_L2CEN, L2CC_CR);
  ARM_DSB();
  ARM_ISB();
-  leave_critical_section(flags);
+  spin_unlock_irqrestore(&g_l2cc_lock, flags);
 }

 /****************************************************************************
@ -489,17 +556,11 @@ void l2cc_disable(void)
 {
  irqstate_t flags;

-  /* Flush all ways using the Clean Invalidate Way Register (CIWR). */
+  flags = spin_lock_irqsave(&g_l2cc_lock);

-  flags = enter_critical_section();
-  pl310_flush_all();
+  l2cc_disable_nolock();

-  /* Disable the L2CC-P310 L2 cache by clearing the Control Register (CR) */
-
-  putreg32(0, L2CC_CR);
-  ARM_DSB();
-  ARM_ISB();
-  leave_critical_section(flags);
+  spin_unlock_irqrestore(&g_l2cc_lock, flags);
 }

 /****************************************************************************
@ -525,9 +586,9 @@ void l2cc_sync(void)
   * EB, are empty.
   */

-  flags = enter_critical_section();
+  flags = spin_lock_irqsave(&g_l2cc_lock);
  putreg32(0, L2CC_CSR);
-  leave_critical_section(flags);
+  spin_unlock_irqrestore(&g_l2cc_lock, flags);
 }

 /****************************************************************************
@ -548,27 +609,11 @@ void l2cc_invalidate_all(void)
 {
  irqstate_t flags;

-  /* Invalidate all ways */
+  flags = spin_lock_irqsave(&g_l2cc_lock);

-  flags = enter_critical_section();
+  l2cc_invalidate_all_nolock();

-  /* Invalidate all ways by writing the bit mask of ways to be invalidated
-   * the Invalidate Way Register (IWR).
-   */
-
-  putreg32(PL310_WAY_MASK, L2CC_IWR);
-
-  /* Wait for cache operation by way to complete */
-
-  while ((getreg32(L2CC_IWR) & PL310_WAY_MASK) != 0);
-
-  /* Drain the STB. Operation complete when all buffers, LRB, LFB, STB, and
-   * EB, are empty.
-   */
-
-  putreg32(0, L2CC_CSR);
-
-  leave_critical_section(flags);
+  spin_unlock_irqrestore(&g_l2cc_lock, flags);
 }

 /****************************************************************************
@ -595,7 +640,7 @@ void l2cc_invalidate(uintptr_t startaddr, uintptr_t endaddr)

  /* Check if the start address is aligned with a cacheline */

-  flags = enter_critical_section();
+  flags = spin_lock_irqsave(&g_l2cc_lock);
  if ((startaddr & PL310_CACHE_LINE_MASK) != 0)
    {
      /* No.. align down and flush the cache line by writing the address to
@ -622,7 +667,7 @@ void l2cc_invalidate(uintptr_t startaddr, uintptr_t endaddr)
      putreg32(endaddr, L2CC_CIPALR);
    }

-  leave_critical_section(flags);
+  spin_unlock_irqrestore(&g_l2cc_lock, flags);

  /* Loop, invalidated the address range by cache line.  Interrupts are re-
   * enabled momentarily every PL310_GULP_SIZE bytes.
@ -640,7 +685,7 @@ void l2cc_invalidate(uintptr_t startaddr, uintptr_t endaddr)

      /* Disable interrupts and invalidate the gulp */

-      flags = enter_critical_section();
+      flags = spin_lock_irqsave(&g_l2cc_lock);
      while (startaddr < gulpend)
        {
          /* Invalidate the cache line by writing the address to the
@ -656,16 +701,16 @@ void l2cc_invalidate(uintptr_t startaddr, uintptr_t endaddr)

      /* Enable interrupts momentarily */

-      leave_critical_section(flags);
+      spin_unlock_irqrestore(&g_l2cc_lock, flags);
    }

  /* Drain the STB. Operation complete when all buffers, LRB, LFB, STB, and
   * EB, are empty.
   */

-  flags = enter_critical_section();
+  flags = spin_lock_irqsave(&g_l2cc_lock);
  putreg32(0, L2CC_CSR);
-  leave_critical_section(flags);
+  spin_unlock_irqrestore(&g_l2cc_lock, flags);
 }

 /****************************************************************************
@ -690,7 +735,7 @@ void l2cc_clean_all(void)
   * Ways Register (CWR).
   */

-  flags = enter_critical_section();
+  flags = spin_lock_irqsave(&g_l2cc_lock);
  putreg32(PL310_WAY_MASK, L2CC_CWR);

  /* Wait for cache operation by way to complete */
@ -702,7 +747,7 @@ void l2cc_clean_all(void)
   */

  putreg32(0, L2CC_CSR);
-  leave_critical_section(flags);
+  spin_unlock_irqrestore(&g_l2cc_lock, flags);
 }

 /****************************************************************************
@ -758,7 +803,7 @@ void l2cc_clean(uintptr_t startaddr, uintptr_t endaddr)

      /* Disable interrupts and clean the gulp */

-      flags = enter_critical_section();
+      flags = spin_lock_irqsave(&g_l2cc_lock);
      while (startaddr < gulpend)
        {
          /* Clean the cache line by writing the address to the Clean
@ -774,16 +819,16 @@ void l2cc_clean(uintptr_t startaddr, uintptr_t endaddr)

      /* Enable interrupts momentarily */

-      leave_critical_section(flags);
+      spin_unlock_irqrestore(&g_l2cc_lock, flags);
    }

  /* Drain the STB. Operation complete when all buffers, LRB, LFB, STB, and
   * EB, are empty.
   */

-  flags = enter_critical_section();
+  flags = spin_lock_irqsave(&g_l2cc_lock);
  putreg32(0, L2CC_CSR);
-  leave_critical_section(flags);
+  spin_unlock_irqrestore(&g_l2cc_lock, flags);
 }

 /****************************************************************************
@ -806,9 +851,9 @@ void l2cc_flush_all(void)

  /* Flush all ways using the Clean Invalidate Way Register (CIWR). */

-  flags = enter_critical_section();
+  flags = spin_lock_irqsave(&g_l2cc_lock);
  pl310_flush_all();
-  leave_critical_section(flags);
+  spin_unlock_irqrestore(&g_l2cc_lock, flags);
 }

 /****************************************************************************
@ -864,7 +909,7 @@ void l2cc_flush(uint32_t startaddr, uint32_t endaddr)

      /* Disable interrupts and flush the gulp */

-      flags = enter_critical_section();
+      flags = spin_lock_irqsave(&g_l2cc_lock);
      while (startaddr < gulpend)
        {
          /* Flush the cache line by writing the address to the Clean
@ -880,16 +925,16 @@ void l2cc_flush(uint32_t startaddr, uint32_t endaddr)

      /* Enable interrupts momentarily */

-      leave_critical_section(flags);
+      spin_unlock_irqrestore(&g_l2cc_lock, flags);
    }

  /* Drain the STB. Operation complete when all buffers, LRB, LFB, STB, and
   * EB, are empty.
   */

-  flags = enter_critical_section();
+  flags = spin_lock_irqsave(&g_l2cc_lock);
  putreg32(0, L2CC_CSR);
-  leave_critical_section(flags);
+  spin_unlock_irqrestore(&g_l2cc_lock, flags);
 }

 #endif /* CONFIG_ARMV7A_L2CC_PL310 */
--- a/arch/arm/src/armv7-a/arm_schedulesigaction.c
+++ b/arch/arm/src/armv7-a/arm_schedulesigaction.c
@ -36,6 +36,7 @@

 #include "arm.h"
 #include "sched/sched.h"
+#include "signal/signal.h"
 #include "arm_internal.h"
 #include "irq/irq.h"

@ -94,8 +95,8 @@ void up_schedule_sigaction(struct tcb_s *tcb)
       * REVISIT:  Signal handler will run in a critical section!
       */

-      (tcb->sigdeliver)(tcb);
-      tcb->sigdeliver = NULL;
+      nxsig_deliver(tcb);
+      tcb->flags &= ~TCB_FLAG_SIGDELIVER;
    }
  else
    {
--- a/arch/arm/src/armv7-a/arm_sigdeliver.c
+++ b/arch/arm/src/armv7-a/arm_sigdeliver.c
@ -37,6 +37,7 @@
 #include <arch/board/board.h>

 #include "sched/sched.h"
+#include "signal/signal.h"
 #include "arm_internal.h"

 /****************************************************************************
@ -69,9 +70,9 @@ void arm_sigdeliver(void)

  board_autoled_on(LED_SIGNAL);

-  sinfo("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
-        rtcb, rtcb->sigdeliver, rtcb->sigpendactionq.head);
-  DEBUGASSERT(rtcb->sigdeliver != NULL);
+  sinfo("rtcb=%p sigpendactionq.head=%p\n",
+        rtcb, rtcb->sigpendactionq.head);
+  DEBUGASSERT((rtcb->flags & TCB_FLAG_SIGDELIVER) != 0);

 retry:
 #ifdef CONFIG_SMP
@ -103,7 +104,7 @@ retry:

  /* Deliver the signal */

-  (rtcb->sigdeliver)(rtcb);
+  nxsig_deliver(rtcb);

  /* Output any debug messages BEFORE restoring errno (because they may
   * alter errno), then disable interrupts again and restore the original
@ -150,7 +151,9 @@ retry:
   * could be modified by a hostile program.
   */

-  rtcb->sigdeliver = NULL;  /* Allows next handler to be scheduled */
+  /* Allows next handler to be scheduled */
+
+  rtcb->flags &= ~TCB_FLAG_SIGDELIVER;

  /* Then restore the correct state for this thread of execution. */

--- a/arch/arm/src/armv7-a/arm_syscall.c
+++ b/arch/arm/src/armv7-a/arm_syscall.c
@ -410,7 +410,7 @@ uint32_t *arm_syscall(uint32_t *regs)

              /* Copy "info" into user stack */

-              if (rtcb->sigdeliver)
+              if ((rtcb->flags & TCB_FLAG_SIGDELIVER) != 0)
                {
                  usp = rtcb->xcp.saved_regs[REG_SP];
                }
--- a/arch/arm/src/armv7-m/arm_doirq.c
+++ b/arch/arm/src/armv7-m/arm_doirq.c
@ -34,6 +34,7 @@
 #include <nuttx/board.h>
 #include <arch/board/board.h>
 #include <sched/sched.h>
+#include <signal/signal.h>

 #include "arm_internal.h"
 #include "exc_return.h"
@ -86,7 +87,7 @@ uint32_t *arm_doirq(int irq, uint32_t *regs)

      irq_dispatch(irq, regs);
 #endif
-      if (tcb->sigdeliver)
+      if ((tcb->flags & TCB_FLAG_SIGDELIVER) != 0)
        {
          /* Pendsv able to access running tcb with no critical section */

--- a/arch/arm/src/armv7-m/arm_ramvec_attach.c
+++ b/arch/arm/src/armv7-m/arm_ramvec_attach.c
@ -31,11 +31,18 @@

 #include <nuttx/irq.h>
 #include <nuttx/arch.h>
+#include <nuttx/spinlock.h>

 #include "ram_vectors.h"

 #ifdef CONFIG_ARCH_RAMVECTORS

+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static spinlock_t g_ramvec_lock = SP_UNLOCKED;
+
 /****************************************************************************
 * Public Functions
 ****************************************************************************/
@ -68,7 +75,7 @@ int arm_ramvec_attach(int irq, up_vector_t vector)
       * common exception handler.
       */

-      flags = enter_critical_section();
+      flags = spin_lock_irqsave(&g_ramvec_lock);
      if (vector == NULL)
        {
          /* Disable the interrupt if we can before detaching it.  We might
@ -87,7 +94,7 @@ int arm_ramvec_attach(int irq, up_vector_t vector)
      /* Save the new vector in the vector table */

      g_ram_vectors[irq] = vector;
-      leave_critical_section(flags);
+      spin_unlock_irqrestore(&g_ramvec_lock, flags);
      ret = OK;
    }

--- a/arch/arm/src/armv7-m/arm_schedulesigaction.c
+++ b/arch/arm/src/armv7-m/arm_schedulesigaction.c
@ -38,6 +38,7 @@
 #include "psr.h"
 #include "exc_return.h"
 #include "sched/sched.h"
+#include "signal/signal.h"
 #include "arm_internal.h"
 #include "irq/irq.h"
 #include "nvic.h"
@ -97,8 +98,8 @@ void up_schedule_sigaction(struct tcb_s *tcb)
       * REVISIT:  Signal handle will run in a critical section!
       */

-      (tcb->sigdeliver)(tcb);
-      tcb->sigdeliver = NULL;
+      nxsig_deliver(tcb);
+      tcb->flags &= ~TCB_FLAG_SIGDELIVER;
    }
  else if (tcb == rtcb && ipsr != NVIC_IRQ_PENDSV)
    {
--- a/arch/arm/src/armv7-m/arm_sigdeliver.c
+++ b/arch/arm/src/armv7-m/arm_sigdeliver.c
@ -37,6 +37,7 @@
 #include <arch/board/board.h>

 #include "sched/sched.h"
+#include "signal/signal.h"
 #include "arm_internal.h"

 /****************************************************************************
@ -69,9 +70,9 @@ void arm_sigdeliver(void)

  board_autoled_on(LED_SIGNAL);

-  sinfo("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
-        rtcb, rtcb->sigdeliver, rtcb->sigpendactionq.head);
-  DEBUGASSERT(rtcb->sigdeliver != NULL);
+  sinfo("rtcb=%p sigpendactionq.head=%p\n",
+        rtcb, rtcb->sigpendactionq.head);
+  DEBUGASSERT((rtcb->flags & TCB_FLAG_SIGDELIVER) != 0);

 retry:
 #ifdef CONFIG_SMP
@ -103,7 +104,7 @@ retry:

  /* Deliver the signal */

-  (rtcb->sigdeliver)(rtcb);
+  nxsig_deliver(rtcb);

  /* Output any debug messages BEFORE restoring errno (because they may
   * alter errno), then disable interrupts again and restore the original
@ -150,7 +151,9 @@ retry:
   * could be modified by a hostile program.
   */

-  rtcb->sigdeliver = NULL;  /* Allows next handler to be scheduled */
+  /* Allows next handler to be scheduled */
+
+  rtcb->flags &= ~TCB_FLAG_SIGDELIVER;

  /* Then restore the correct state for this thread of
   * execution.
--- a/arch/arm/src/armv7-r/arm_l2cc_pl310.c
+++ b/arch/arm/src/armv7-r/arm_l2cc_pl310.c
@ -38,6 +38,7 @@
 #include <debug.h>

 #include <nuttx/irq.h>
+#include <nuttx/spinlock.h>

 #include "arm_internal.h"
 #include "barriers.h"
@ -225,6 +226,12 @@

 #define PL310_GULP_SIZE            4096

+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static volatile spinlock_t g_l2cc_lock = SP_UNLOCKED;
+
 /****************************************************************************
 * Private Functions
 ****************************************************************************/
@ -262,6 +269,66 @@ static void pl310_flush_all(void)
  putreg32(0, L2CC_CSR);
 }

+/****************************************************************************
+ * Name: l2cc_disable_nolock
+ *
+ * Description:
+ *    Disable the L2CC-P310 L2 cache by clearing the Control Register (CR)
+ *
+ * Input Parameters:
+ *    None
+ *
+ * Returned Value:
+ *    None
+ *
+ ****************************************************************************/
+
+static void l2cc_disable_nolock(void)
+{
+  /* Flush all ways using the Clean Invalidate Way Register (CIWR). */
+
+  pl310_flush_all();
+
+  /* Disable the L2CC-P310 L2 cache by clearing the Control Register (CR) */
+
+  putreg32(0, L2CC_CR);
+  ARM_DSB();
+  ARM_ISB();
+}
+
+/****************************************************************************
+ * Name: l2cc_invalidate_all_nolock
+ *
+ * Description:
+ *   Invalidate all ways using the Invalidate Way Register (IWR).
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static void l2cc_invalidate_all_nolock(void)
+{
+  /* Invalidate all ways by writing the bit mask of ways to be invalidated
+   * the Invalidate Way Register (IWR).
+   */
+
+  putreg32(PL310_WAY_MASK, L2CC_IWR);
+
+  /* Wait for cache operation by way to complete */
+
+  while ((getreg32(L2CC_IWR) & PL310_WAY_MASK) != 0);
+
+  /* Drain the STB. Operation complete when all buffers, LRB, LFB, STB, and
+   * EB, are empty.
+   */
+
+  putreg32(0, L2CC_CSR);
+}
+
 /****************************************************************************
 * Public Functions
 ****************************************************************************/
@ -457,18 +524,18 @@ void l2cc_enable(void)

  /* Invalidate and enable the cache (must be disabled to do this!) */

-  flags = enter_critical_section();
+  flags = spin_lock_irqsave(&g_l2cc_lock);

  if ((getreg32(L2CC_CR) & L2CC_CR_L2CEN) != 0)
    {
-      l2cc_disable();
+      l2cc_disable_nolock();
    }

-  l2cc_invalidate_all();
+  l2cc_invalidate_all_nolock();
  putreg32(L2CC_CR_L2CEN, L2CC_CR);
  ARM_DSB();
  ARM_ISB();
-  leave_critical_section(flags);
+  spin_unlock_irqrestore(&g_l2cc_lock, flags);
 }

 /****************************************************************************
@ -489,17 +556,11 @@ void l2cc_disable(void)
 {
  irqstate_t flags;

-  /* Flush all ways using the Clean Invalidate Way Register (CIWR). */
+  flags = spin_lock_irqsave(&g_l2cc_lock);

-  flags = enter_critical_section();
-  pl310_flush_all();
+  l2cc_disable_nolock();

-  /* Disable the L2CC-P310 L2 cache by clearing the Control Register (CR) */
-
-  putreg32(0, L2CC_CR);
-  ARM_DSB();
-  ARM_ISB();
-  leave_critical_section(flags);
+  spin_unlock_irqrestore(&g_l2cc_lock, flags);
 }

 /****************************************************************************
@ -525,9 +586,9 @@ void l2cc_sync(void)
   * EB, are empty.
   */

-  flags = enter_critical_section();
+  flags = spin_lock_irqsave(&g_l2cc_lock);
  putreg32(0, L2CC_CSR);
-  leave_critical_section(flags);
+  spin_unlock_irqrestore(&g_l2cc_lock, flags);
 }

 /****************************************************************************
@ -548,27 +609,11 @@ void l2cc_invalidate_all(void)
 {
  irqstate_t flags;

-  /* Invalidate all ways */
+  flags = spin_lock_irqsave(&g_l2cc_lock);

-  flags = enter_critical_section();
+  l2cc_invalidate_all_nolock();

-  /* Invalidate all ways by writing the bit mask of ways to be invalidated
-   * the Invalidate Way Register (IWR).
-   */
-
-  putreg32(PL310_WAY_MASK, L2CC_IWR);
-
-  /* Wait for cache operation by way to complete */
-
-  while ((getreg32(L2CC_IWR) & PL310_WAY_MASK) != 0);
-
-  /* Drain the STB. Operation complete when all buffers, LRB, LFB, STB, and
-   * EB, are empty.
-   */
-
-  putreg32(0, L2CC_CSR);
-
-  leave_critical_section(flags);
+  spin_unlock_irqrestore(&g_l2cc_lock, flags);
 }

 /****************************************************************************
@ -595,7 +640,7 @@ void l2cc_invalidate(uintptr_t startaddr, uintptr_t endaddr)

  /* Check if the start address is aligned with a cacheline */

-  flags = enter_critical_section();
+  flags = spin_lock_irqsave(&g_l2cc_lock);
  if ((startaddr & PL310_CACHE_LINE_MASK) != 0)
    {
      /* No.. align down and flush the cache line by writing the address to
@ -622,7 +667,7 @@ void l2cc_invalidate(uintptr_t startaddr, uintptr_t endaddr)
      putreg32(endaddr, L2CC_CIPALR);
    }

-  leave_critical_section(flags);
+  spin_unlock_irqrestore(&g_l2cc_lock, flags);

  /* Loop, invalidated the address range by cache line.  Interrupts are re-
   * enabled momentarily every PL310_GULP_SIZE bytes.
@ -640,7 +685,7 @@ void l2cc_invalidate(uintptr_t startaddr, uintptr_t endaddr)

      /* Disable interrupts and invalidate the gulp */

-      flags = enter_critical_section();
+      flags = spin_lock_irqsave(&g_l2cc_lock);
      while (startaddr < gulpend)
        {
          /* Invalidate the cache line by writing the address to the
@ -656,16 +701,16 @@ void l2cc_invalidate(uintptr_t startaddr, uintptr_t endaddr)

      /* Enable interrupts momentarily */

-      leave_critical_section(flags);
+      spin_unlock_irqrestore(&g_l2cc_lock, flags);
    }

  /* Drain the STB. Operation complete when all buffers, LRB, LFB, STB, and
   * EB, are empty.
   */

-  flags = enter_critical_section();
+  flags = spin_lock_irqsave(&g_l2cc_lock);
  putreg32(0, L2CC_CSR);
-  leave_critical_section(flags);
+  spin_unlock_irqrestore(&g_l2cc_lock, flags);
 }

 /****************************************************************************
@ -690,7 +735,7 @@ void l2cc_clean_all(void)
   * Ways Register (CWR).
   */

-  flags = enter_critical_section();
+  flags = spin_lock_irqsave(&g_l2cc_lock);
  putreg32(PL310_WAY_MASK, L2CC_CWR);

  /* Wait for cache operation by way to complete */
@ -702,7 +747,7 @@ void l2cc_clean_all(void)
   */

  putreg32(0, L2CC_CSR);
-  leave_critical_section(flags);
+  spin_unlock_irqrestore(&g_l2cc_lock, flags);
 }

 /****************************************************************************
@ -758,7 +803,7 @@ void l2cc_clean(uintptr_t startaddr, uintptr_t endaddr)

      /* Disable interrupts and clean the gulp */

-      flags = enter_critical_section();
+      flags = spin_lock_irqsave(&g_l2cc_lock);
      while (startaddr < gulpend)
        {
          /* Clean the cache line by writing the address to the Clean
@ -774,16 +819,16 @@ void l2cc_clean(uintptr_t startaddr, uintptr_t endaddr)

      /* Enable interrupts momentarily */

-      leave_critical_section(flags);
+      spin_unlock_irqrestore(&g_l2cc_lock, flags);
    }

  /* Drain the STB. Operation complete when all buffers, LRB, LFB, STB, and
   * EB, are empty.
   */

-  flags = enter_critical_section();
+  flags = spin_lock_irqsave(&g_l2cc_lock);
  putreg32(0, L2CC_CSR);
-  leave_critical_section(flags);
+  spin_unlock_irqrestore(&g_l2cc_lock, flags);
 }

 /****************************************************************************
@ -806,9 +851,9 @@ void l2cc_flush_all(void)

  /* Flush all ways using the Clean Invalidate Way Register (CIWR). */

-  flags = enter_critical_section();
+  flags = spin_lock_irqsave(&g_l2cc_lock);
  pl310_flush_all();
-  leave_critical_section(flags);
+  spin_unlock_irqrestore(&g_l2cc_lock, flags);
 }

 /****************************************************************************
@ -864,7 +909,7 @@ void l2cc_flush(uint32_t startaddr, uint32_t endaddr)

      /* Disable interrupts and flush the gulp */

-      flags = enter_critical_section();
+      flags = spin_lock_irqsave(&g_l2cc_lock);
      while (startaddr < gulpend)
        {
          /* Flush the cache line by writing the address to the Clean
@ -880,16 +925,16 @@ void l2cc_flush(uint32_t startaddr, uint32_t endaddr)

      /* Enable interrupts momentarily */

-      leave_critical_section(flags);
+      spin_unlock_irqrestore(&g_l2cc_lock, flags);
    }

  /* Drain the STB. Operation complete when all buffers, LRB, LFB, STB, and
   * EB, are empty.
   */

-  flags = enter_critical_section();
+  flags = spin_lock_irqsave(&g_l2cc_lock);
  putreg32(0, L2CC_CSR);
-  leave_critical_section(flags);
+  spin_unlock_irqrestore(&g_l2cc_lock, flags);
 }

 #endif /* CONFIG_ARMV7R_L2CC_PL310 */
--- a/arch/arm/src/armv7-r/arm_schedulesigaction.c
+++ b/arch/arm/src/armv7-r/arm_schedulesigaction.c
@ -35,6 +35,7 @@

 #include "arm.h"
 #include "sched/sched.h"
+#include "signal/signal.h"
 #include "arm_internal.h"

 /****************************************************************************
@ -92,8 +93,8 @@ void up_schedule_sigaction(struct tcb_s *tcb)
       * REVISIT:  Signal handler will run in a critical section!
       */

-      (tcb->sigdeliver)(tcb);
-      tcb->sigdeliver = NULL;
+      nxsig_deliver(tcb);
+      tcb->flags &= ~TCB_FLAG_SIGDELIVER;
    }
  else
    {
--- a/arch/arm/src/armv7-r/arm_sigdeliver.c
+++ b/arch/arm/src/armv7-r/arm_sigdeliver.c
@ -37,6 +37,7 @@
 #include <arch/board/board.h>

 #include "sched/sched.h"
+#include "signal/signal.h"
 #include "arm_internal.h"

 /****************************************************************************
@ -69,9 +70,9 @@ void arm_sigdeliver(void)

  board_autoled_on(LED_SIGNAL);

-  sinfo("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
-        rtcb, rtcb->sigdeliver, rtcb->sigpendactionq.head);
-  DEBUGASSERT(rtcb->sigdeliver != NULL);
+  sinfo("rtcb=%p sigpendactionq.head=%p\n",
+        rtcb, rtcb->sigpendactionq.head);
+  DEBUGASSERT((rtcb->flags & TCB_FLAG_SIGDELIVER) != 0);

 retry:
 #ifdef CONFIG_SMP
@ -103,7 +104,7 @@ retry:

  /* Deliver the signal */

-  (rtcb->sigdeliver)(rtcb);
+  nxsig_deliver(rtcb);

  /* Output any debug messages BEFORE restoring errno (because they may
   * alter errno), then disable interrupts again and restore the original
@ -147,7 +148,9 @@ retry:
   * could be modified by a hostile program.
   */

-  rtcb->sigdeliver = NULL;  /* Allows next handler to be scheduled */
+  /* Allows next handler to be scheduled */
+
+  rtcb->flags &= ~TCB_FLAG_SIGDELIVER;

  /* Then restore the correct state for this thread of execution. */

--- a/arch/arm/src/armv7-r/arm_syscall.c
+++ b/arch/arm/src/armv7-r/arm_syscall.c
@ -407,7 +407,7 @@ uint32_t *arm_syscall(uint32_t *regs)

              /* Copy "info" into user stack */

-              if (rtcb->sigdeliver)
+              if ((rtcb->flags & TCB_FLAG_SIGDELIVER) != 0)
                {
                  usp = rtcb->xcp.saved_regs[REG_SP];
                }
--- a/arch/arm/src/armv8-m/arm_doirq.c
+++ b/arch/arm/src/armv8-m/arm_doirq.c
@ -97,7 +97,7 @@ uint32_t *arm_doirq(int irq, uint32_t *regs)

      irq_dispatch(irq, regs);
 #endif
-      if (tcb->sigdeliver)
+      if ((tcb->flags & TCB_FLAG_SIGDELIVER) != 0)
        {
          /* Pendsv able to access running tcb with no critical section */

--- a/arch/arm/src/armv8-m/arm_ramvec_attach.c
+++ b/arch/arm/src/armv8-m/arm_ramvec_attach.c
@ -31,11 +31,18 @@

 #include <nuttx/irq.h>
 #include <nuttx/arch.h>
+#include <nuttx/spinlock.h>

 #include "ram_vectors.h"

 #ifdef CONFIG_ARCH_RAMVECTORS

+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static spinlock_t g_ramvec_lock = SP_UNLOCKED;
+
 /****************************************************************************
 * Public Functions
 ****************************************************************************/
@ -68,7 +75,7 @@ int arm_ramvec_attach(int irq, up_vector_t vector)
       * common exception handler.
       */

-      flags = enter_critical_section();
+      flags = spin_lock_irqsave(&g_ramvec_lock);
      if (vector == NULL)
        {
          /* Disable the interrupt if we can before detaching it.  We might
@ -87,7 +94,7 @@ int arm_ramvec_attach(int irq, up_vector_t vector)
      /* Save the new vector in the vector table */

      g_ram_vectors[irq] = vector;
-      leave_critical_section(flags);
+      spin_unlock_irqrestore(&g_ramvec_lock, flags);
      ret = OK;
    }

--- a/arch/arm/src/armv8-m/arm_schedulesigaction.c
+++ b/arch/arm/src/armv8-m/arm_schedulesigaction.c
@ -38,6 +38,7 @@
 #include "psr.h"
 #include "exc_return.h"
 #include "sched/sched.h"
+#include "signal/signal.h"
 #include "arm_internal.h"
 #include "irq/irq.h"
 #include "nvic.h"
@ -97,8 +98,8 @@ void up_schedule_sigaction(struct tcb_s *tcb)
       * REVISIT:  Signal handle will run in a critical section!
       */

-      (tcb->sigdeliver)(tcb);
-      tcb->sigdeliver = NULL;
+      nxsig_deliver(tcb);
+      tcb->flags &= ~TCB_FLAG_SIGDELIVER;
    }
  else if (tcb == rtcb && ipsr != NVIC_IRQ_PENDSV)
    {
--- a/arch/arm/src/armv8-m/arm_sigdeliver.c
+++ b/arch/arm/src/armv8-m/arm_sigdeliver.c
@ -37,6 +37,7 @@
 #include <arch/board/board.h>

 #include "sched/sched.h"
+#include "signal/signal.h"
 #include "arm_internal.h"

 /****************************************************************************
@ -69,9 +70,9 @@ void arm_sigdeliver(void)

  board_autoled_on(LED_SIGNAL);

-  sinfo("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
-        rtcb, rtcb->sigdeliver, rtcb->sigpendactionq.head);
-  DEBUGASSERT(rtcb->sigdeliver != NULL);
+  sinfo("rtcb=%p sigpendactionq.head=%p\n",
+        rtcb, rtcb->sigpendactionq.head);
+  DEBUGASSERT((rtcb->flags & TCB_FLAG_SIGDELIVER) != 0);

 retry:
 #ifdef CONFIG_SMP
@ -103,7 +104,7 @@ retry:

  /* Deliver the signal */

-  (rtcb->sigdeliver)(rtcb);
+  nxsig_deliver(rtcb);

  /* Output any debug messages BEFORE restoring errno (because they may
   * alter errno), then disable interrupts again and restore the original
@ -150,7 +151,9 @@ retry:
   * could be modified by a hostile program.
   */

-  rtcb->sigdeliver = NULL;  /* Allows next handler to be scheduled */
+  /* Allows next handler to be scheduled */
+
+  rtcb->flags &= ~TCB_FLAG_SIGDELIVER;

  /* Then restore the correct state for this thread of
   * execution.
--- a/arch/arm/src/armv8-r/arm_l2cc_pl310.c
+++ b/arch/arm/src/armv8-r/arm_l2cc_pl310.c
@ -38,6 +38,7 @@
 #include <debug.h>

 #include <nuttx/irq.h>
+#include <nuttx/spinlock.h>

 #include "arm_internal.h"
 #include "barriers.h"
@ -225,6 +226,12 @@

 #define PL310_GULP_SIZE            4096

+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static volatile spinlock_t g_l2cc_lock = SP_UNLOCKED;
+
 /****************************************************************************
 * Private Functions
 ****************************************************************************/
@ -262,6 +269,66 @@ static void pl310_flush_all(void)
  putreg32(0, L2CC_CSR);
 }

+/****************************************************************************
+ * Name: l2cc_disable_nolock
+ *
+ * Description:
+ *    Disable the L2CC-P310 L2 cache by clearing the Control Register (CR)
+ *
+ * Input Parameters:
+ *    None
+ *
+ * Returned Value:
+ *    None
+ *
+ ****************************************************************************/
+
+static void l2cc_disable_nolock(void)
+{
+  /* Flush all ways using the Clean Invalidate Way Register (CIWR). */
+
+  pl310_flush_all();
+
+  /* Disable the L2CC-P310 L2 cache by clearing the Control Register (CR) */
+
+  putreg32(0, L2CC_CR);
+  ARM_DSB();
+  ARM_ISB();
+}
+
+/****************************************************************************
+ * Name: l2cc_invalidate_all_nolock
+ *
+ * Description:
+ *   Invalidate all ways using the Invalidate Way Register (IWR).
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static void l2cc_invalidate_all_nolock(void)
+{
+  /* Invalidate all ways by writing the bit mask of ways to be invalidated
+   * the Invalidate Way Register (IWR).
+   */
+
+  putreg32(PL310_WAY_MASK, L2CC_IWR);
+
+  /* Wait for cache operation by way to complete */
+
+  while ((getreg32(L2CC_IWR) & PL310_WAY_MASK) != 0);
+
+  /* Drain the STB. Operation complete when all buffers, LRB, LFB, STB, and
+   * EB, are empty.
+   */
+
+  putreg32(0, L2CC_CSR);
+}
+
 /****************************************************************************
 * Public Functions
 ****************************************************************************/
@ -457,18 +524,18 @@ void l2cc_enable(void)

  /* Invalidate and enable the cache (must be disabled to do this!) */

-  flags = enter_critical_section();
+  flags = spin_lock_irqsave(&g_l2cc_lock);

  if ((getreg32(L2CC_CR) & L2CC_CR_L2CEN) != 0)
    {
-      l2cc_disable();
+      l2cc_disable_nolock();
    }

-  l2cc_invalidate_all();
+  l2cc_invalidate_all_nolock();
  putreg32(L2CC_CR_L2CEN, L2CC_CR);
  ARM_DSB();
  ARM_ISB();
-  leave_critical_section(flags);
+  spin_unlock_irqrestore(&g_l2cc_lock, flags);
 }

 /****************************************************************************
@ -489,17 +556,11 @@ void l2cc_disable(void)
 {
  irqstate_t flags;

-  /* Flush all ways using the Clean Invalidate Way Register (CIWR). */
+  flags = spin_lock_irqsave(&g_l2cc_lock);

-  flags = enter_critical_section();
-  pl310_flush_all();
+  l2cc_disable_nolock();

-  /* Disable the L2CC-P310 L2 cache by clearing the Control Register (CR) */
-
-  putreg32(0, L2CC_CR);
-  ARM_DSB();
-  ARM_ISB();
-  leave_critical_section(flags);
+  spin_unlock_irqrestore(&g_l2cc_lock, flags);
 }

 /****************************************************************************
@ -525,9 +586,9 @@ void l2cc_sync(void)
   * EB, are empty.
   */

-  flags = enter_critical_section();
+  flags = spin_lock_irqsave(&g_l2cc_lock);
  putreg32(0, L2CC_CSR);
-  leave_critical_section(flags);
+  spin_unlock_irqrestore(&g_l2cc_lock, flags);
 }

 /****************************************************************************
@ -548,27 +609,11 @@ void l2cc_invalidate_all(void)
 {
  irqstate_t flags;

-  /* Invalidate all ways */
+  flags = spin_lock_irqsave(&g_l2cc_lock);

-  flags = enter_critical_section();
+  l2cc_invalidate_all_nolock();

-  /* Invalidate all ways by writing the bit mask of ways to be invalidated
-   * the Invalidate Way Register (IWR).
-   */
-
-  putreg32(PL310_WAY_MASK, L2CC_IWR);
-
-  /* Wait for cache operation by way to complete */
-
-  while ((getreg32(L2CC_IWR) & PL310_WAY_MASK) != 0);
-
-  /* Drain the STB. Operation complete when all buffers, LRB, LFB, STB, and
-   * EB, are empty.
-   */
-
-  putreg32(0, L2CC_CSR);
-
-  leave_critical_section(flags);
+  spin_unlock_irqrestore(&g_l2cc_lock, flags);
 }

 /****************************************************************************
@ -595,7 +640,7 @@ void l2cc_invalidate(uintptr_t startaddr, uintptr_t endaddr)

  /* Check if the start address is aligned with a cacheline */

-  flags = enter_critical_section();
+  flags = spin_lock_irqsave(&g_l2cc_lock);
  if ((startaddr & PL310_CACHE_LINE_MASK) != 0)
    {
      /* No.. align down and flush the cache line by writing the address to
@ -622,7 +667,7 @@ void l2cc_invalidate(uintptr_t startaddr, uintptr_t endaddr)
      putreg32(endaddr, L2CC_CIPALR);
    }

-  leave_critical_section(flags);
+  spin_unlock_irqrestore(&g_l2cc_lock, flags);

  /* Loop, invalidated the address range by cache line.  Interrupts are re-
   * enabled momentarily every PL310_GULP_SIZE bytes.
@ -640,7 +685,7 @@ void l2cc_invalidate(uintptr_t startaddr, uintptr_t endaddr)

      /* Disable interrupts and invalidate the gulp */

-      flags = enter_critical_section();
+      flags = spin_lock_irqsave(&g_l2cc_lock);
      while (startaddr < gulpend)
        {
          /* Invalidate the cache line by writing the address to the
@ -656,16 +701,16 @@ void l2cc_invalidate(uintptr_t startaddr, uintptr_t endaddr)

      /* Enable interrupts momentarily */

-      leave_critical_section(flags);
+      spin_unlock_irqrestore(&g_l2cc_lock, flags);
    }

  /* Drain the STB. Operation complete when all buffers, LRB, LFB, STB, and
   * EB, are empty.
   */

-  flags = enter_critical_section();
+  flags = spin_lock_irqsave(&g_l2cc_lock);
  putreg32(0, L2CC_CSR);
-  leave_critical_section(flags);
+  spin_unlock_irqrestore(&g_l2cc_lock, flags);
 }

 /****************************************************************************
@ -690,7 +735,7 @@ void l2cc_clean_all(void)
   * Ways Register (CWR).
   */

-  flags = enter_critical_section();
+  flags = spin_lock_irqsave(&g_l2cc_lock);
  putreg32(PL310_WAY_MASK, L2CC_CWR);

  /* Wait for cache operation by way to complete */
@ -702,7 +747,7 @@ void l2cc_clean_all(void)
   */

  putreg32(0, L2CC_CSR);
-  leave_critical_section(flags);
+  spin_unlock_irqrestore(&g_l2cc_lock, flags);
 }

 /****************************************************************************
@ -758,7 +803,7 @@ void l2cc_clean(uintptr_t startaddr, uintptr_t endaddr)

      /* Disable interrupts and clean the gulp */

-      flags = enter_critical_section();
+      flags = spin_lock_irqsave(&g_l2cc_lock);
      while (startaddr < gulpend)
        {
          /* Clean the cache line by writing the address to the Clean
@ -774,16 +819,16 @@ void l2cc_clean(uintptr_t startaddr, uintptr_t endaddr)

      /* Enable interrupts momentarily */

-      leave_critical_section(flags);
+      spin_unlock_irqrestore(&g_l2cc_lock, flags);
    }

  /* Drain the STB. Operation complete when all buffers, LRB, LFB, STB, and
   * EB, are empty.
   */

-  flags = enter_critical_section();
+  flags = spin_lock_irqsave(&g_l2cc_lock);
  putreg32(0, L2CC_CSR);
-  leave_critical_section(flags);
+  spin_unlock_irqrestore(&g_l2cc_lock, flags);
 }

 /****************************************************************************
@ -806,9 +851,9 @@ void l2cc_flush_all(void)

  /* Flush all ways using the Clean Invalidate Way Register (CIWR). */

-  flags = enter_critical_section();
+  flags = spin_lock_irqsave(&g_l2cc_lock);
  pl310_flush_all();
-  leave_critical_section(flags);
+  spin_unlock_irqrestore(&g_l2cc_lock, flags);
 }

 /****************************************************************************
@ -864,7 +909,7 @@ void l2cc_flush(uint32_t startaddr, uint32_t endaddr)

      /* Disable interrupts and flush the gulp */

-      flags = enter_critical_section();
+      flags = spin_lock_irqsave(&g_l2cc_lock);
      while (startaddr < gulpend)
        {
          /* Flush the cache line by writing the address to the Clean
@ -880,16 +925,16 @@ void l2cc_flush(uint32_t startaddr, uint32_t endaddr)

      /* Enable interrupts momentarily */

-      leave_critical_section(flags);
+      spin_unlock_irqrestore(&g_l2cc_lock, flags);
    }

  /* Drain the STB. Operation complete when all buffers, LRB, LFB, STB, and
   * EB, are empty.
   */

-  flags = enter_critical_section();
+  flags = spin_lock_irqsave(&g_l2cc_lock);
  putreg32(0, L2CC_CSR);
-  leave_critical_section(flags);
+  spin_unlock_irqrestore(&g_l2cc_lock, flags);
 }

 #endif /* CONFIG_ARMV8R_L2CC_PL310 */
--- a/arch/arm/src/armv8-r/arm_schedulesigaction.c
+++ b/arch/arm/src/armv8-r/arm_schedulesigaction.c
@ -35,6 +35,7 @@

 #include "arm.h"
 #include "sched/sched.h"
+#include "signal/signal.h"
 #include "arm_internal.h"

 /****************************************************************************
@ -92,8 +93,8 @@ void up_schedule_sigaction(struct tcb_s *tcb)
       * REVISIT:  Signal handler will run in a critical section!
       */

-      (tcb->sigdeliver)(tcb);
-      tcb->sigdeliver = NULL;
+      nxsig_deliver(tcb);
+      tcb->flags &= ~TCB_FLAG_SIGDELIVER;
    }
  else
    {
--- a/arch/arm/src/armv8-r/arm_sigdeliver.c
+++ b/arch/arm/src/armv8-r/arm_sigdeliver.c
@ -37,6 +37,7 @@
 #include <arch/board/board.h>

 #include "sched/sched.h"
+#include "signal/signal.h"
 #include "arm_internal.h"

 /****************************************************************************
@ -69,9 +70,9 @@ void arm_sigdeliver(void)

  board_autoled_on(LED_SIGNAL);

-  sinfo("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
-        rtcb, rtcb->sigdeliver, rtcb->sigpendactionq.head);
-  DEBUGASSERT(rtcb->sigdeliver != NULL);
+  sinfo("rtcb=%p sigpendactionq.head=%p\n",
+        rtcb, rtcb->sigpendactionq.head);
+  DEBUGASSERT((rtcb->flags & TCB_FLAG_SIGDELIVER) != 0);

 retry:
 #ifdef CONFIG_SMP
@ -103,7 +104,7 @@ retry:

  /* Deliver the signal */

-  (rtcb->sigdeliver)(rtcb);
+  nxsig_deliver(rtcb);

  /* Output any debug messages BEFORE restoring errno (because they may
   * alter errno), then disable interrupts again and restore the original
@ -147,7 +148,9 @@ retry:
   * could be modified by a hostile program.
   */

-  rtcb->sigdeliver = NULL;  /* Allows next handler to be scheduled */
+  /* Allows next handler to be scheduled */
+
+  rtcb->flags &= ~TCB_FLAG_SIGDELIVER;

  /* Then restore the correct state for this thread of execution. */

--- a/arch/arm/src/armv8-r/arm_syscall.c
+++ b/arch/arm/src/armv8-r/arm_syscall.c
@ -407,7 +407,7 @@ uint32_t *arm_syscall(uint32_t *regs)

              /* Copy "info" into user stack */

-              if (rtcb->sigdeliver)
+              if ((rtcb->flags & TCB_FLAG_SIGDELIVER) != 0)
                {
                  usp = rtcb->xcp.saved_regs[REG_SP];
                }
--- a/arch/arm/src/at32/at32_adc.c
+++ b/arch/arm/src/at32/at32_adc.c
@ -36,7 +36,6 @@
 #include <errno.h>
 #include <assert.h>
 #include <debug.h>
-#include <unistd.h>

 #include <arch/board/board.h>
 #include <nuttx/irq.h>
--- a/arch/arm/src/at32/at32_eth.c
+++ b/arch/arm/src/at32/at32_eth.c
@ -34,7 +34,6 @@
 #include <string.h>
 #include <assert.h>
 #include <debug.h>
-#include <assert.h>
 #include <errno.h>

 #include <arpa/inet.h>
--- a/arch/arm/src/cmake/armv6-m.cmake
+++ b/arch/arm/src/cmake/armv6-m.cmake
@ -21,3 +21,8 @@
 # ##############################################################################

 add_compile_options(-mcpu=cortex-m0 -mthumb -mfloat-abi=soft)
+
+# LLVM Configuration
+set(LLVM_ARCHTYPE thumbv6m)
+set(LLVM_ABITYPE eabi)
+set(LLVM_CPUTYPE cortex-m0)
--- a/arch/arm/src/cmake/armv7-a.cmake
+++ b/arch/arm/src/cmake/armv7-a.cmake
@ -24,24 +24,43 @@ set(PLATFORM_FLAGS)

 if(CONFIG_ARCH_CORTEXA5)
  list(APPEND PLATFORM_FLAGS -mcpu=cortex-a5)
+  set(LLVM_CPUTYPE cortex-a5)
 elseif(CONFIG_ARCH_CORTEXA7)
  list(APPEND PLATFORM_FLAGS -mcpu=cortex-a7)
+  set(LLVM_CPUTYPE cortex-a7)
 elseif(CONFIG_ARCH_CORTEXA8)
  list(APPEND PLATFORM_FLAGS -mcpu=cortex-a8)
+  set(LLVM_CPUTYPE cortex-a8)
 elseif(CONFIG_ARCH_CORTEXA9)
  list(APPEND PLATFORM_FLAGS -mcpu=cortex-a9)
+  set(LLVM_CPUTYPE cortex-a9)
+endif()
+
+if(CONFIG_ARM_THUMB)
+  set(LLVM_ARCHTYPE thumbv7a)
+else()
+  set(LLVM_ARCHTYPE armv7-a)
+endif()
+
+if(CONFIG_ARCH_FPU)
+  set(LLVM_ABITYPE eabihf)
+else()
+  set(LLVM_ABITYPE eabi)
 endif()

 if(NOT CONFIG_ARM_DPFPU32)
  set(ARCHFPUD16 -d16)
 endif()

-# Cortex-A5  | -mfpu=vfpv4-fp16 | -mfpu=vfpv4-d16-fp16 | -mfpu=neon-fp16
-# Cortex-A7  | -mfpu=vfpv4      | -mfpu=vfpv4-d16      | -mfpu=neon-vfpv4
-# Cortex-A8  | -mfpu=vfpv3      |                      | -mfpu=neon (alias for
-# neon-vfpv3) Cortex-A9  | -mfpu=vfpv3-fp16 | -mfpu=vfpv3-d16-fp16 |
-# -mfpu=neon-fp16 Cortex-A15 | -mfpu=vfpv4      |                      |
-# -mfpu=neon-vfpv4
+# ~~~
+# | Cortex | FPU Option 1       | FPU Option 2           | FPU Option 3          |
+# |--------|--------------------|------------------------|-----------------------|
+# | A5     | -mfpu=vfpv4-fp16   | -mfpu=vfpv4-d16-fp16   | -mfpu=neon-fp16       |
+# | A7     | -mfpu=vfpv4        | -mfpu=vfpv4-d16        | -mfpu=neon-vfpv4      |
+# | A8     | -mfpu=vfpv3        |                        | -mfpu=neon (alias for neon-vfpv3) |
+# | A9     | -mfpu=vfpv3-fp16   | -mfpu=vfpv3-d16-fp16   | -mfpu=neon-fp16       |
+# | A15    | -mfpu=vfpv4        |                        | -mfpu=neon-vfpv4      |
+# ~~~

 if(CONFIG_ARCH_FPU)
  if(CONFIG_ARM_FPU_ABI_SOFT)
--- a/arch/arm/src/cmake/armv7-m.cmake
+++ b/arch/arm/src/cmake/armv7-m.cmake
@ -38,4 +38,23 @@ else() # gcc
  set(TOOLCHAIN_ARCH_FILE armv7-m_gcc)
 endif()

+# LLVM Configuration
+if(CONFIG_ARCH_CORTEXM3)
+  set(LLVM_ARCHTYPE thumbv7m)
+  set(LLVM_CPUTYPE cortex-m3)
+else()
+  set(LLVM_ARCHTYPE thumbv7em)
+  if(CONFIG_ARCH_CORTEXM4)
+    set(LLVM_CPUTYPE cortex-m4)
+  elseif(CONFIG_ARCH_CORTEXM7)
+    set(LLVM_CPUTYPE cortex-m7)
+  endif()
+endif()
+
+if(CONFIG_ARCH_FPU)
+  set(LLVM_ABITYPE eabihf)
+else()
+  set(LLVM_ABITYPE eabi)
+endif()
+
 include(${TOOLCHAIN_ARCH_FILE})
--- a/arch/arm/src/cmake/armv8-m.cmake
+++ b/arch/arm/src/cmake/armv8-m.cmake
@ -22,6 +22,31 @@

 set(PLATFORM_FLAGS)

+# LLVM Configuration
+if(CONFIG_ARCH_CORTEXM23)
+  set(LLVM_ARCHTYPE thumbv8m.base)
+  set(LLVM_CPUTYPE cortex-m23)
+elseif(CONFIG_ARCH_CORTEXM33)
+  set(LLVM_ARCHTYPE thumbv8m.main)
+  set(LLVM_CPUTYPE cortex-m33)
+elseif(CONFIG_ARCH_CORTEXM35P)
+  set(LLVM_ARCHTYPE thumbv8m.main)
+  set(LLVM_CPUTYPE cortex-m35p)
+elseif(CONFIG_ARCH_CORTEXM55)
+  set(LLVM_ARCHTYPE thumbv8.1m.main)
+  set(LLVM_CPUTYPE cortex-m55)
+elseif(CONFIG_ARCH_CORTEXM85)
+  set(LLVM_ARCHTYPE thumbv8.1m.main)
+  set(LLVM_CPUTYPE cortex-m85)
+endif()
+
+# Set ABI type based on FPU configuration
+if(CONFIG_ARCH_FPU)
+  set(LLVM_ABITYPE eabihf)
+else()
+  set(LLVM_ABITYPE eabi)
+endif()
+
 if(CONFIG_ARM_DSP)
  set(EXTCPUFLAGS +dsp)
 endif()
--- a/arch/arm/src/common/Toolchain.defs
+++ b/arch/arm/src/common/Toolchain.defs
@ -546,7 +546,9 @@ ifeq ($(CONFIG_PIC),y)
  # Generate an executable elf, need to ignore undefined symbols
  LDELFFLAGS += --unresolved-symbols=ignore-in-object-files --emit-relocs
 else
-  LDELFFLAGS += -r
+  ifneq ($(CONFIG_BINFMT_ELF_EXECUTABLE),y)
+    LDELFFLAGS += -r
+  endif
 endif

 LDELFFLAGS +=  -e main -T $(call CONVERT_PATH,$(TOPDIR)$(DELIM)libs$(DELIM)libc$(DELIM)modlib$(DELIM)gnu-elf.ld)
--- a/arch/arm/src/common/arm_registerdump.c
+++ b/arch/arm/src/common/arm_registerdump.c
@ -43,16 +43,6 @@
 * Public Functions
 ****************************************************************************/

-/****************************************************************************
- * Name: up_getusrsp
- ****************************************************************************/
-
-uintptr_t up_getusrsp(void *regs)
-{
-  uint32_t *ptr = regs;
-  return ptr[REG_SP];
-}
-
 /****************************************************************************
 * Name: up_dump_register
 ****************************************************************************/
--- a/arch/arm/src/cxd56xx/cxd56_charger.c
+++ b/arch/arm/src/cxd56xx/cxd56_charger.c
@ -29,7 +29,6 @@

 #include <nuttx/config.h>
 #include <assert.h>
-#include <debug.h>

 #include <sys/types.h>
 #include <stdio.h>
--- a/arch/arm/src/cxd56xx/cxd56_gauge.c
+++ b/arch/arm/src/cxd56xx/cxd56_gauge.c
@ -27,7 +27,6 @@
 ****************************************************************************/

 #include <nuttx/config.h>
-#include <debug.h>

 #include <sys/types.h>
 #include <stdio.h>
--- a/arch/arm/src/cxd56xx/cxd56_rtc.c
+++ b/arch/arm/src/cxd56xx/cxd56_rtc.c
@ -399,10 +399,14 @@ time_t up_rtc_time(void)
 #ifdef CONFIG_RTC_HIRES
 int up_rtc_gettime(struct timespec *tp)
 {
+  irqstate_t flags;
  uint64_t count;

-  count = cxd56_rtc_count();
+  flags = spin_lock_irqsave(&g_rtc_lock);
+
+  count = cxd56_rtc_count_nolock();
  count += g_rtc_save->offset;
+  spin_unlock_irqrestore(&g_rtc_lock, flags);

  /* Then we can save the time in seconds and fractional seconds. */

@ -477,21 +481,28 @@ int up_rtc_settime(const struct timespec *tp)
 *
 ****************************************************************************/

-uint64_t cxd56_rtc_count(void)
+uint64_t cxd56_rtc_count_nolock(void)
 {
  uint64_t val;
-  irqstate_t flags;

  /* The pre register is latched with reading the post rtcounter register,
   * so these registers always have to been read in the below order,
   * 1st post -> 2nd pre, and should be operated in atomic.
   */

-  flags = spin_lock_irqsave(&g_rtc_lock);
-
  val = (uint64_t)getreg32(CXD56_RTC0_RTPOSTCNT) << 15;
  val |= getreg32(CXD56_RTC0_RTPRECNT);

+  return val;
+}
+
+uint64_t cxd56_rtc_count(void)
+{
+  uint64_t val;
+  irqstate_t flags;
+
+  flags = spin_lock_irqsave(&g_rtc_lock);
+  val = cxd56_rtc_count_nolock();
  spin_unlock_irqrestore(&g_rtc_lock, flags);

  return val;
--- a/arch/arm/src/cxd56xx/cxd56_rtc.h
+++ b/arch/arm/src/cxd56xx/cxd56_rtc.h
@ -92,6 +92,7 @@ extern "C"
 ****************************************************************************/

 uint64_t cxd56_rtc_count(void);
+uint64_t cxd56_rtc_count_nolock(void);

 /****************************************************************************
 * Name: cxd56_rtc_almcount
--- a/arch/arm/src/efm32/efm32_adc.c
+++ b/arch/arm/src/efm32/efm32_adc.c
@ -35,7 +35,6 @@
 #include <errno.h>
 #include <assert.h>
 #include <debug.h>
-#include <unistd.h>

 #include <arch/board/board.h>
 #include <nuttx/irq.h>
--- a/arch/arm/src/efm32/efm32_irq.c
+++ b/arch/arm/src/efm32/efm32_irq.c
@ -33,7 +33,6 @@

 #include <nuttx/irq.h>
 #include <nuttx/arch.h>
-#include <nuttx/irq.h>
 #include <arch/armv7-m/nvicpri.h>

 #include "nvic.h"
--- a/arch/arm/src/eoss3/eoss3_irq.c
+++ b/arch/arm/src/eoss3/eoss3_irq.c
@ -33,7 +33,6 @@

 #include <nuttx/irq.h>
 #include <nuttx/arch.h>
-#include <nuttx/irq.h>
 #include <arch/armv7-m/nvicpri.h>

 #include "nvic.h"
--- a/arch/arm/src/imx9/imx9_lowputc.c
+++ b/arch/arm/src/imx9/imx9_lowputc.c
@ -41,7 +41,6 @@
 #include "imx9_clockconfig.h"
 #include "imx9_iomuxc.h"
 #include "hardware/imx9_clock.h"
-#include "hardware/imx9_pinmux.h"

 #include <arch/board/board.h> /* Include last:  has dependencies */

--- a/arch/arm/src/imx9/imx9_lpi2c.c
+++ b/arch/arm/src/imx9/imx9_lpi2c.c
@ -1103,7 +1103,7 @@ static void imx9_lpi2c_setclock(struct imx9_lpi2c_priv_s *priv,
                                            &src_freq);

          /* LPI2C output frequency = (Source Clock (Hz)/ 2^prescale) /
-           *   (CLKLO + 1 + CLKHI + 1 + ROUNDDOWN((2 + FILTSCL) / 2^prescale)
+           *   (CLKLO + 1 + CLKHI + 1 + ALIGN_DOWN((2 + FILTSCL)/2^prescale)
           *
           * Assume  CLKLO = 2 * CLKHI, SETHOLD = CLKHI, DATAVD = CLKHI / 2
           */
--- a/arch/arm/src/imxrt/imxrt_iomuxc_ver1.c
+++ b/arch/arm/src/imxrt/imxrt_iomuxc_ver1.c
@ -24,13 +24,11 @@
 * Included Files
 ****************************************************************************/

+#include <nuttx/config.h>
+
 #include <sys/types.h>
 #include <stdint.h>
 #include <stdbool.h>
-
-#include <nuttx/config.h>
-
-#include <stdint.h>
 #include <assert.h>
 #include <errno.h>

--- a/arch/arm/src/imxrt/imxrt_iomuxc_ver2.c
+++ b/arch/arm/src/imxrt/imxrt_iomuxc_ver2.c
@ -24,13 +24,11 @@
 * Included Files
 ****************************************************************************/

+#include <nuttx/config.h>
+
 #include <sys/types.h>
 #include <stdint.h>
 #include <stdbool.h>
-
-#include <nuttx/config.h>
-
-#include <stdint.h>
 #include <assert.h>
 #include <errno.h>

--- a/arch/arm/src/imxrt/imxrt_lpi2c.c
+++ b/arch/arm/src/imxrt/imxrt_lpi2c.c
@ -49,7 +49,6 @@
 #include "imxrt_lpi2c.h"
 #include "imxrt_edma.h"
 #include "imxrt_gpio.h"
-#include "imxrt_lpi2c.h"

 #include "hardware/imxrt_dmamux.h"
 #include "hardware/imxrt_pinmux.h"
@ -1162,7 +1161,7 @@ static void imxrt_lpi2c_setclock(struct imxrt_lpi2c_priv_s *priv,
 #endif

          /* LPI2C output frequency = (Source Clock (Hz)/ 2^prescale) /
-           *   (CLKLO + 1 + CLKHI + 1 + ROUNDDOWN((2 + FILTSCL) / 2^prescale)
+           *   (CLKLO + 1 + CLKHI + 1 + ALIGN_DOWN((2 + FILTSCL)/2^prescale)
           *
           * Assume  CLKLO = 2 * CLKHI, SETHOLD = CLKHI, DATAVD = CLKHI / 2
           */
--- a/arch/arm/src/kinetis/kinetis_pindma.c
+++ b/arch/arm/src/kinetis/kinetis_pindma.c
@ -34,7 +34,6 @@

 #include <arch/board/board.h>

-#include <nuttx/arch.h>
 #include <nuttx/arch.h>
 #include "arm_internal.h"
 #include "kinetis_config.h"
--- a/arch/arm/src/kinetis/kinetis_rtc.c
+++ b/arch/arm/src/kinetis/kinetis_rtc.c
@ -28,6 +28,7 @@
 #include <nuttx/arch.h>
 #include <nuttx/irq.h>
 #include <nuttx/timers/rtc.h>
+#include <nuttx/spinlock.h>
 #include <arch/board/board.h>

 #include <stdlib.h>
@ -62,6 +63,10 @@
 * Private Data
 ****************************************************************************/

+#ifdef CONFIG_RTC_HIRES
+static spinlock_t g_rtc_lock = SP_UNLOCKED;
+#endif
+
 #ifdef CONFIG_RTC_ALARM
 static alarmcb_t g_alarmcb;
 static bool rtc_irq_state = false;
@ -436,7 +441,7 @@ int up_rtc_gettime(struct timespec *tp)
   * wrapped-around.
   */

-  flags = enter_critical_section();
+  flags = spin_lock_irqsave(&g_rtc_lock);
  do
    {
      prescaler = getreg32(KINETIS_RTC_TPR);
@ -445,7 +450,7 @@ int up_rtc_gettime(struct timespec *tp)
    }
  while (prescaler > prescaler2);

-  leave_critical_section(flags);
+  spin_unlock_irqrestore(&g_rtc_lock, flags);

  /* Build seconds + nanoseconds from seconds and prescaler register */

@ -479,7 +484,7 @@ int up_rtc_settime(const struct timespec *tp)
  seconds = tp->tv_sec;
  prescaler = tp->tv_nsec / (1000000000 / CONFIG_RTC_FREQUENCY);

-  flags = enter_critical_section();
+  flags = spin_lock_irqsave(&g_rtc_lock);

  putreg32(0, KINETIS_RTC_SR);  /* Disable counter */

@ -488,7 +493,7 @@ int up_rtc_settime(const struct timespec *tp)

  putreg32(RTC_SR_TCE, KINETIS_RTC_SR); /* Re-enable counter */

-  leave_critical_section(flags);
+  spin_unlock_irqrestore(&g_rtc_lock, flags);

  return OK;
 }
--- a/arch/arm/src/kl/kl_lowputc.c
+++ b/arch/arm/src/kl/kl_lowputc.c
@ -40,7 +40,6 @@
 #include "hardware/kl_uart.h"
 #include "hardware/kl_sim.h"
 #include "hardware/kl_port.h"
-#include "hardware/kl_uart.h"
 #include "hardware/kl_pinmux.h"

 /****************************************************************************
--- a/arch/arm/src/lc823450/lc823450_adc.c
+++ b/arch/arm/src/lc823450/lc823450_adc.c
@ -36,7 +36,6 @@
 #include <errno.h>
 #include <assert.h>
 #include <debug.h>
-#include <unistd.h>

 #include <arch/board/board.h>

--- a/arch/arm/src/lc823450/lc823450_sddrv_dep.c
+++ b/arch/arm/src/lc823450/lc823450_sddrv_dep.c
@ -59,7 +59,6 @@
 #include "arm_internal.h"
 #include "lc823450_sddrv_type.h"
 #include "lc823450_sddrv_if.h"
-#include "lc823450_dma.h"
 #include "lc823450_gpio.h"
 #include "lc823450_syscontrol.h"
 #include "lc823450_timer.h"
--- a/arch/arm/src/lpc17xx_40xx/lpc17_40_i2c.c
+++ b/arch/arm/src/lpc17xx_40xx/lpc17_40_i2c.c
@ -65,7 +65,6 @@

 #include "chip.h"
 #include "arm_internal.h"
-#include "chip.h"
 #include "hardware/lpc17_40_syscon.h"
 #include "lpc17_40_gpio.h"
 #include "lpc17_40_i2c.h"
--- a/arch/arm/src/max326xx/hardware/max326_gcr.h
+++ b/arch/arm/src/max326xx/hardware/max326_gcr.h
@ -23,12 +23,6 @@
 #ifndef __ARCH_ARM_SRC_MAX326XX_HARDWARE_MAX326_GCR_H
 #define __ARCH_ARM_SRC_MAX326XX_HARDWARE_MAX326_GCR_H

-/****************************************************************************
- * Included Files
- ****************************************************************************/
-
-#include <nuttx/config.h>
-
 /****************************************************************************
 * Included Files
 ****************************************************************************/
--- a/arch/arm/src/max326xx/max32660/max32660_rtc.c
+++ b/arch/arm/src/max326xx/max32660/max32660_rtc.c
@ -403,11 +403,14 @@ time_t up_rtc_time(void)
 #ifdef CONFIG_RTC_HIRES
 int up_rtc_gettime(struct timespec *tp)
 {
+  irqstate_t flags;
  uint64_t tmp;
  uint32_t sec;
  uint32_t ssec;
  uint32_t verify;

+  flags = spin_lock_irqsave(&g_rtc_lock);
+
  /* Read the time handling rollover to full seconds */

  do
@ -418,6 +421,8 @@ int up_rtc_gettime(struct timespec *tp)
    }
  while (verify != sec);

+  spin_unlock_irqrestore(&g_rtc_lock, flags);
+
  /* Format as a tm */

  tmp = ((uint64_t)ssec * NSEC_PER_SEC) / 256;
--- a/arch/arm/src/max326xx/max32660/max32660_serial.c
+++ b/arch/arm/src/max326xx/max32660/max32660_serial.c
@ -50,8 +50,6 @@
 #include "max326_lowputc.h"
 #include "max326_serial.h"

-#include <arch/board/board.h>
-
 /****************************************************************************
 * Pre-processor Definitions
 ****************************************************************************/
--- a/arch/arm/src/mps/mps_start.c
+++ b/arch/arm/src/mps/mps_start.c
@ -25,7 +25,6 @@
 ****************************************************************************/

 #include <nuttx/config.h>
-#include <nuttx/init.h>

 #include <nuttx/cache.h>
 #include <nuttx/init.h>
--- a/arch/arm/src/nrf52/nrf52_flash.c
+++ b/arch/arm/src/nrf52/nrf52_flash.c
@ -45,7 +45,6 @@
 #include <errno.h>
 #include <debug.h>

-#include <nuttx/config.h>
 #include <nuttx/progmem.h>

 #include "chip.h"
--- a/arch/arm/src/nrf52/nrf52_usbd.h
+++ b/arch/arm/src/nrf52/nrf52_usbd.h
@ -30,7 +30,6 @@
 #include <nuttx/config.h>
 #include <stdbool.h>

-#include <nuttx/config.h>
 #include <nuttx/usb/usbdev.h>
 #include <stdint.h>

--- a/arch/arm/src/nrf53/nrf53_usbd.h
+++ b/arch/arm/src/nrf53/nrf53_usbd.h
@ -28,9 +28,8 @@
 ****************************************************************************/

 #include <nuttx/config.h>
-#include <stdbool.h>

-#include <nuttx/config.h>
+#include <stdbool.h>
 #include <nuttx/usb/usbdev.h>
 #include <stdint.h>

--- a/arch/arm/src/phy62xx/phyplus_stub.c
+++ b/arch/arm/src/phy62xx/phyplus_stub.c
@ -42,7 +42,6 @@
 #include "phyplus_tim.h"
 #include "timer.h"
 #include "mcu_phy_bumbee.h"
-#include "phyplus_gpio.h"

 /****************************************************************************
 * Pre-processor Definitions
--- a/arch/arm/src/qemu/CMakeLists.txt
+++ b/arch/arm/src/qemu/CMakeLists.txt
@ -30,4 +30,8 @@ if(CONFIG_ARCH_IDLE_CUSTOM)
  list(APPEND SRCS qemu_idle.c)
 endif()

+if(CONFIG_BUILD_KERNEL)
+  list(APPEND SRCS qemu_pgalloc.c)
+endif()
+
 target_sources(arch PRIVATE ${SRCS})
--- a/arch/arm/src/qemu/Kconfig
+++ b/arch/arm/src/qemu/Kconfig
@ -15,6 +15,7 @@ config ARCH_CHIP_QEMU_CORTEXA7
 	bool "Qemu virtual Processor (cortex-a7)"
 	select ARCH_CORTEXA7
 	select ARCH_HAVE_ADDRENV
+	select ARCH_HAVE_ELF_EXECUTABLE
 	select ARCH_HAVE_LOWVECTORS
 	select ARCH_HAVE_MULTICPU
 	select ARCH_NEED_ADDRENV_MAPPING
--- a/arch/arm/src/rp2040/rp2040_adc.c
+++ b/arch/arm/src/rp2040/rp2040_adc.c
@ -63,7 +63,6 @@

 #include <stdlib.h>
 #include <fcntl.h>
-#include <stdlib.h>
 #include <string.h>
 #include <errno.h>

--- a/arch/arm/src/rp2040/rp2040_pio.c
+++ b/arch/arm/src/rp2040/rp2040_pio.c
@ -59,8 +59,8 @@
 #define hw_claim_lock()         spin_lock_irqsave(&pio_lock)
 #define hw_claim_unlock(save)   spin_unlock_irqrestore(&pio_lock, save)
 #else
-#define hw_claim_lock()         spin_lock_irqsave(NULL)
-#define hw_claim_unlock(save)   spin_unlock_irqrestore(NULL, save)
+#define hw_claim_lock()         up_irq_save()
+#define hw_claim_unlock(save)   up_irq_restore(save)
 #endif

 /****************************************************************************
--- a/arch/arm/src/rp2040/rp2040_ws2812.c
+++ b/arch/arm/src/rp2040/rp2040_ws2812.c
@ -28,7 +28,6 @@

 #include <stdlib.h>
 #include <fcntl.h>
-#include <stdlib.h>
 #include <string.h>

 #include <nuttx/kmalloc.h>
--- a/arch/arm/src/rp23xx/rp23xx_adc.c
+++ b/arch/arm/src/rp23xx/rp23xx_adc.c
@ -63,7 +63,6 @@

 #include <stdlib.h>
 #include <fcntl.h>
-#include <stdlib.h>
 #include <string.h>
 #include <errno.h>

--- a/arch/arm/src/rp23xx/rp23xx_pio.c
+++ b/arch/arm/src/rp23xx/rp23xx_pio.c
@ -46,8 +46,8 @@
 #define hw_claim_lock()         spin_lock_irqsave(&pio_lock)
 #define hw_claim_unlock(save)   spin_unlock_irqrestore(&pio_lock, save)
 #else
-#define hw_claim_lock()         spin_lock_irqsave(NULL)
-#define hw_claim_unlock(save)   spin_unlock_irqrestore(NULL, save)
+#define hw_claim_lock()         up_irq_save()
+#define hw_claim_unlock(save)   up_irq_restore(save)
 #endif

 /****************************************************************************
--- a/arch/arm/src/rp23xx/rp23xx_ws2812.c
+++ b/arch/arm/src/rp23xx/rp23xx_ws2812.c
@ -28,7 +28,6 @@

 #include <stdlib.h>
 #include <fcntl.h>
-#include <stdlib.h>
 #include <string.h>

 #include <nuttx/kmalloc.h>
--- a/arch/arm/src/s32k1xx/s32k1xx_flexio_i2c.c
+++ b/arch/arm/src/s32k1xx/s32k1xx_flexio_i2c.c
@ -47,7 +47,6 @@

 #include "arm_internal.h"
 #include "s32k1xx_edma.h"
-#include "s32k1xx_pin.h"
 #include "hardware/s32k1xx_dmamux.h"
 #include "hardware/s32k1xx_pinmux.h"
 #include "s32k1xx_flexio_i2c.h"
--- a/arch/arm/src/s32k1xx/s32k1xx_lpi2c.c
+++ b/arch/arm/src/s32k1xx/s32k1xx_lpi2c.c
@ -1010,7 +1010,7 @@ static void s32k1xx_lpi2c_setclock(struct s32k1xx_lpi2c_priv_s *priv,
          DEBUGASSERT(src_freq != 0);

          /* LPI2C output frequency = (Source Clock (Hz)/ 2^prescale) /
-           *   (CLKLO + 1 + CLKHI + 1 + ROUNDDOWN((2 + FILTSCL) / 2^prescale)
+           *   (CLKLO + 1 + CLKHI + 1 + ALIGN_DOWN((2 + FILTSCL)/2^prescale)
           *
           * Assume  CLKLO = 2 * CLKHI, SETHOLD = CLKHI, DATAVD = CLKHI / 2
           */
--- a/arch/arm/src/s32k1xx/s32k1xx_pindma.c
+++ b/arch/arm/src/s32k1xx/s32k1xx_pindma.c
@ -32,7 +32,6 @@
 #include <errno.h>
 #include <debug.h>

-#include <nuttx/arch.h>
 #include <nuttx/arch.h>
 #include "arm_internal.h"
 #include "s32k1xx_pin.h"
--- a/arch/arm/src/s32k1xx/s32k1xx_rtc.c
+++ b/arch/arm/src/s32k1xx/s32k1xx_rtc.c
@ -37,6 +37,7 @@
 #include <nuttx/arch.h>
 #include <nuttx/irq.h>
 #include <nuttx/timers/rtc.h>
+#include <nuttx/spinlock.h>

 #include <arch/board/board.h>

@ -60,6 +61,12 @@

 volatile bool g_rtc_enabled = false;

+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static spinlock_t g_rtc_lock = SP_UNLOCKED;
+
 /****************************************************************************
 * Private Functions
 ****************************************************************************/
@ -247,7 +254,7 @@ int up_rtc_gettime(struct timespec *tp)
   * wrapped-around.
   */

-  flags = enter_critical_section();
+  flags = spin_lock_irqsave(&g_rtc_lock);
  do
    {
      prescaler = getreg32(S32K1XX_RTC_TPR);
@ -256,7 +263,7 @@ int up_rtc_gettime(struct timespec *tp)
    }
  while (prescaler > prescaler2);

-  leave_critical_section(flags);
+  spin_unlock_irqrestore(&g_rtc_lock, flags);

  /* Build seconds + nanoseconds from seconds and prescaler register */

@ -296,7 +303,7 @@ int up_rtc_settime(const struct timespec *ts)
  prescaler = 0;
 #endif

-  flags = enter_critical_section();
+  flags = spin_lock_irqsave(&g_rtc_lock);

  s32k1xx_rtc_disable();

@ -305,7 +312,7 @@ int up_rtc_settime(const struct timespec *ts)

  s32k1xx_rtc_enable();

-  leave_critical_section(flags);
+  spin_unlock_irqrestore(&g_rtc_lock, flags);

  return OK;
 }
--- a/arch/arm/src/s32k3xx/s32k3xx_lpi2c.c
+++ b/arch/arm/src/s32k3xx/s32k3xx_lpi2c.c
@ -990,7 +990,7 @@ static void s32k3xx_lpi2c_setclock(struct s32k3xx_lpi2c_priv_s *priv,
          DEBUGASSERT(src_freq != 0);

          /* LPI2C output frequency = (Source Clock (Hz)/ 2^prescale) /
-           *   (CLKLO + 1 + CLKHI + 1 + ROUNDDOWN((2 + FILTSCL) / 2^prescale)
+           *   (CLKLO + 1 + CLKHI + 1 + ALIGN_DOWN((2 + FILTSCL)/2^prescale)
           *
           * Assume  CLKLO = 2 * CLKHI, SETHOLD = CLKHI, DATAVD = CLKHI / 2
           */
--- a/arch/arm/src/sam34/sam_rtc.c
+++ b/arch/arm/src/sam34/sam_rtc.c
@ -34,6 +34,7 @@
 #include <nuttx/arch.h>
 #include <nuttx/irq.h>
 #include <nuttx/wqueue.h>
+#include <nuttx/spinlock.h>

 #include <arch/board/board.h>

@ -72,6 +73,8 @@
 * Private Data
 ****************************************************************************/

+static spinlock_t g_rtc_lock = SP_UNLOCKED;
+
 /* Callback to use when the alarm expires */

 #ifdef CONFIG_RTC_ALARM
@ -654,7 +657,8 @@ int sam_rtc_setalarm(const struct timespec *tp, alarmcb_t callback)

  /* Is there already something waiting on the ALARM? */

-  flags = enter_critical_section();
+  flags = spin_lock_irqsave(&g_rtc_lock);
+  sched_lock();
  if (g_alarmcb == NULL)
    {
      /* No.. Save the callback function pointer */
@ -732,7 +736,8 @@ int sam_rtc_setalarm(const struct timespec *tp, alarmcb_t callback)
      ret = OK;
    }

-  leave_critical_section(flags);
+  spin_unlock_irqrestore(&g_rtc_lock, flags);
+  sched_unlock();
  return ret;
 }
 #endif
@ -759,11 +764,13 @@ int up_rtc_gettime(struct timespec *tp)
 {
  /* This is a hack to emulate a high resolution rtc using the rtt */

+  irqstate_t flags;
  uint32_t rtc_cal;
  uint32_t rtc_tim;
  uint32_t rtt_val;
  struct tm t;

+  flags = spin_lock_irqsave(&g_rtc_lock);
  do
    {
      rtc_cal = getreg32(SAM_RTC_CALR);
@ -774,6 +781,7 @@ int up_rtc_gettime(struct timespec *tp)
         rtc_tim != getreg32(SAM_RTC_TIMR) ||
         rtt_val != getreg32(SAM_RTT_VR));

+  spin_unlock_irqrestore(&g_rtc_lock, flags);
  t.tm_sec  = rtc_bcd2bin((rtc_tim & RTC_TIMR_SEC_MASK)   >>
                           RTC_TIMR_SEC_SHIFT);
  t.tm_min  = rtc_bcd2bin((rtc_tim & RTC_TIMR_MIN_MASK)   >>
--- a/arch/arm/src/sama5/sam_rtc.c
+++ b/arch/arm/src/sama5/sam_rtc.c
@ -28,16 +28,13 @@

 #include <nuttx/arch.h>
 #include <nuttx/irq.h>
+#include <nuttx/wqueue.h>

 #include <time.h>
 #include <assert.h>
 #include <errno.h>
 #include <debug.h>

-#include <nuttx/arch.h>
-#include <nuttx/irq.h>
-#include <nuttx/wqueue.h>
-
 #include <arch/board/board.h>

 #include "arm_internal.h"
--- a/arch/arm/src/stm32/hardware/stm32g4xxxx_rcc.h
+++ b/arch/arm/src/stm32/hardware/stm32g4xxxx_rcc.h
@ -670,11 +670,20 @@
 #define STM32_RCC_APB1ENR_OFFSET       STM32_RCC_APB1ENR1_OFFSET
 #define STM32_RCC_APB1ENR              STM32_RCC_APB1ENR1

+#define STM32_RCC_APB1RSTR_OFFSET      STM32_RCC_APB1RSTR1_OFFSET
+#define STM32_RCC_APB1RSTR             STM32_RCC_APB1RSTR1
+
 #define RCC_APB1ENR_USART2EN           RCC_APB1ENR1_USART2EN
 #define RCC_APB1ENR_USART3EN           RCC_APB1ENR1_USART3EN
 #define RCC_APB1ENR_UART4EN            RCC_APB1ENR1_UART4EN
 #define RCC_APB1ENR_UART5EN            RCC_APB1ENR1_UART5EN

+#define RCC_APB1ENR_I2C1EN             RCC_APB1ENR1_I2C1EN
+#define RCC_APB1ENR_I2C2EN             RCC_APB1ENR1_I2C2EN
+
+#define RCC_APB1RSTR_I2C1RST           RCC_APB1RSTR1_I2C1RST
+#define RCC_APB1RSTR_I2C2RST           RCC_APB1RSTR1_I2C2RST
+
 #define RCC_APB1ENR_TIM2EN             RCC_APB1ENR1_TIM2EN
 #define RCC_APB1ENR_TIM3EN             RCC_APB1ENR1_TIM3EN
 #define RCC_APB1ENR_TIM4EN             RCC_APB1ENR1_TIM4EN
--- a/arch/arm/src/stm32/stm32_eth.c
+++ b/arch/arm/src/stm32/stm32_eth.c
@ -48,6 +48,7 @@
 #include <nuttx/net/mii.h>
 #include <nuttx/net/ip.h>
 #include <nuttx/net/netdev.h>
+#include <nuttx/spinlock.h>

 #if defined(CONFIG_NET_PKT)
 #  include <nuttx/net/pkt.h>
@ -651,6 +652,7 @@ static uint8_t g_alloc[STM32_ETH_NFREEBUFFERS *
 static struct stm32_ethmac_s g_stm32ethmac[STM32_NETHERNET];

 #ifdef CONFIG_STM32_ETH_PTP_RTC_HIRES
+static spinlock_t g_rtc_lock = SP_UNLOCKED;
 volatile bool g_rtc_enabled;
 static struct timespec g_stm32_eth_ptp_basetime;
 #endif
@ -3778,10 +3780,10 @@ static void stm32_eth_ptp_convert_rxtime(struct stm32_ethmac_s *priv)

      /* Sample PTP and CLOCK_REALTIME close to each other */

-      flags = enter_critical_section();
      clock_gettime(CLOCK_REALTIME, &realtime);
+      flags = spin_lock_irqsave(&g_rtc_lock);
      ptptime = stm32_eth_ptp_gettime();
-      leave_critical_section(flags);
+      spin_unlock_irqrestore(&g_rtc_lock, flags);

      /* Compute how much time has elapsed since packet reception
       * and add that to current time.
@ -4308,7 +4310,10 @@ int up_rtc_initialize(void)

 int up_rtc_gettime(struct timespec *tp)
 {
+  irqstate_t flags;
  uint64_t timestamp;
+
+  flags = spin_lock_irqsave(&g_rtc_lock);
  timestamp = stm32_eth_ptp_gettime();

  if (timestamp == 0)
@ -4317,12 +4322,14 @@ int up_rtc_gettime(struct timespec *tp)
       * Normally we shouldn't end up here because g_rtc_enabled is false.
       */

+      spin_unlock_irqrestore(&g_rtc_lock, flags);
      DEBUGASSERT(!g_rtc_enabled);
      return -EBUSY;
    }

  ptp_to_timespec(timestamp, tp);
  clock_timespec_add(tp, &g_stm32_eth_ptp_basetime, tp);
+  spin_unlock_irqrestore(&g_rtc_lock, flags);

  return OK;
 }
@ -4346,6 +4353,9 @@ int up_rtc_settime(const struct timespec *tp)
 {
  struct timespec ptptime;
  uint64_t timestamp;
+  irqstate_t flags;
+
+  flags = spin_lock_irqsave(&g_rtc_lock);
  timestamp = stm32_eth_ptp_gettime();

  if (timestamp == 0)
@ -4354,6 +4364,7 @@ int up_rtc_settime(const struct timespec *tp)
       * Normally we shouldn't end up here because g_rtc_enabled is false.
       */

+      spin_unlock_irqrestore(&g_rtc_lock, flags);
      DEBUGASSERT(!g_rtc_enabled);
      return -EBUSY;
    }
@ -4365,6 +4376,7 @@ int up_rtc_settime(const struct timespec *tp)

  ptp_to_timespec(timestamp, &ptptime);
  clock_timespec_subtract(tp, &ptptime, &g_stm32_eth_ptp_basetime);
+  spin_unlock_irqrestore(&g_rtc_lock, flags);

  return OK;
 }
--- a/Show more
+++ b/Show more