Commit graph

23259 commits

Author SHA1 Message Date
p-szafonimateusz
cfaeb74dd3 arch/intel64: allow to attach handlers to ISR
arch/intel64: allow to attach handlers to ISR

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2025-01-02 23:10:14 +08:00
liwenxiang1
1fad0f1654 arch/x86_64: this_task is stored in the CPU private data
By default in SMP, obtaining this_task requires disabling interrupts, obtaining the current CPU index, accessing a global variable, and re-enabling interrupts. Storing this_task in percpu makes retrieval faster.

Signed-off-by: liwenxiang1 <liwenxiang1@xiaomi.com>
2025-01-02 15:19:25 +08:00
Bowen Wang
6485093277 rpproxy_virtio/rpserver_virtio: fix the compile error
Some checks failed
Build Documentation / build-html (push) Has been cancelled
1. Change the CONFIG_RPMSG_VIRTIO to CONFIG_RPMSG_VIRTIO_LITE
2. fix the error when modify the sim_rpmsg_virtio to port to
rpsmg_virtio_lite;

Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-12-31 18:01:47 +08:00
Huang Qi
6eb2f33278 arch/risc-v: inline up_cpu_index if RISCV_PERCPU_SCRATCH is not enabled
Inline the short function to provide better performance.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2024-12-31 04:02:22 -03:00
liwenxiang1
c748047e25 arch/x86_64: The interrupt context flag is stored in the CPU private data
Signed-off-by: liwenxiang1 <liwenxiang1@xiaomi.com>
2024-12-31 13:43:38 +08:00
liwenxiang1
4612185cd6 arch/x86_64:g_current_regs is only used to determine if we are in irq,
with other functionalities removed.

Signed-off-by: liwenxiang1 <liwenxiang1@xiaomi.com>
2024-12-30 22:59:15 +08:00
ce920f9e93 arm/gd32f4: Remove extra lock from gd32f4xx_serial
An extra `lock` appears in gd32f4xx_serial due to 2 conflicting PRs:
- https://github.com/apache/nuttx/pull/7011
- https://github.com/apache/nuttx/pull/15352

This PR removes the extra `lock` in gd32f4xx_serial.
2024-12-30 22:57:10 +08:00
9b9869158a arm/imxrt: Remove extra lock from imxrt_edma
An extra `lock` appears in imxrt_edma due to 2 conflicting PRs:
- https://github.com/apache/nuttx/pull/15352
- https://github.com/apache/nuttx/pull/15353

This PR removes the extra `lock` in imxrt_edma.
2024-12-30 22:56:51 +08:00
Gao Feng
da845163a3 xtensa/esp32: add lock for async operation work
g_work as singleton can be changed by context switching,
but previous one async operation have not finished yet.

adapt based on: 10a1d17a85
2024-12-30 18:14:32 +08:00
Bowen Wang
f0a3c43a54 rpmsg/rpmsg_virtio_lite: rename rpmsg_virtio to rpmsg_virtio_lite
Because rpmsg_virtio_lite is a better name to inform user that the
rpmsg virtio (original name) is a lite implementation of rpmsg virtio.

Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-12-28 22:43:20 -03:00
Kyle Wilson
1cfab89e65 Added incomplete octospi hardware defintions.
Some checks failed
Build Documentation / build-html (push) Has been cancelled
Register addresses are defined. Bit defintions are still needed.

Bitmaps for OCTOSPI peripheral register

Incremental updates to qspi files

Redefined QSPI/OCTOSPI registers for STM32H5

Fixed register definitions for the STM32H5. However, more work still needs to be done. Some bits that shared registers on the STM32H7 have different register locations on the H5. This still needs to be accounted for.

Fixed more differences vs STM32H7 qspi

Added ifdef for including stm32_dma.h in stm32_qspi.c. Added stm32_qspi.c to Make.defs.

Register fixes. SPI activity but not able to format device yet.

Fixed DCYC mask

Set HCLK frequency to correct value. Undid ccrconfig debug.

Tested Interrupt Mode (single SPI). Added alternate bytes to meminfo and cmdinfo structures. Updated Kconfig variables for STM32H5.

Fixed base register in hardware/stm32_qspi.h. Updated qspi_dumpregs.

The base register was previously set to STM32_QUADSPI_BASE, changed to the correctly named STM32_OCTOSPI1_BASE. However, these defines for the OCTOSPI registers are not even used. Instead qspi_putreg and qspi_getreg utilize the priv->base value to access OCTOSPI registers.

Removed altbytes code, left as before. Moved QSPI clock selection to stm32h5xx_rcc.c

Changed STM32H5_QUADSPI to STM32H5_QSPI1

Added hook to define QSPI_CLK_FREQUENCY as STM32_QSPI_FREQUENCY from board.h

Removed changes to nuttx qspi.h

style fixes
2024-12-28 11:46:49 +08:00
hujun5
4627a087f0 fix compile error
chip/efm32_leserial.c: In function 'efm32_restoreuartint':
Error: chip/efm32_leserial.c:329:37: error: 'len' undeclared (first use in this function); did you mean 'ien'?
  329 |   efm32_restoreuartint_nolock(priv, len);
      |                                     ^~~
      |                                     ien

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-28 11:42:59 +08:00
Kyle Wilson
96fa400c3d Fixed errors in CI build tests for pull request #15351
There were two simple errors when running ci tests on pull #15351. These errors were unrelated to that pull. After investigating I found two simple errors. 1. The len variable was likely a typo that should have been the function argument, ien. 2. The spinlock_t lock was defined in a section dependent on CONFIG_SERIAL_TERMIOS. However, the spinlock_t lock was used in code that did not require the SERIAL_TERMIOS config. Therefore errors resulted.

imxrt_edma_s missing lock variable

CI build tests noted that the variable g_edma was referencing a lock variable that did not exist in the structure. This change adds that missing lock as a spinlock_t type.

Remove unused flags variable from imxrt_dmach_stop

Removed extra =
2024-12-28 11:14:42 +08:00
chenxiaoyi
ad8902a33e esp32[|s2|s3]: adapt to new syscall implementation
Signed-off-by: chenxiaoyi <chenxiaoyi@xiaomi.com>
2024-12-27 00:25:55 +08:00
chenxiaoyi
aa426d1edb xtensa: change write intset register to syscall instruction
Signed-off-by: chenxiaoyi <chenxiaoyi@xiaomi.com>
2024-12-27 00:25:55 +08:00
chenxiaoyi
1757ecc5c1 xtensa: add backtrace link from syscall exception
Signed-off-by: chenxiaoyi <chenxiaoyi@xiaomi.com>
2024-12-27 00:25:55 +08:00
Peter van der Perk
430c79ff89 imxrt: FlexSPI allow RWW 2024-12-27 00:16:47 +08:00
hujun5
2886fddc0f arm64: fix tpidr maybe null
Before the MPU initialization, the up_update_task(this_cpu()) function is called at a time when hardware cache coherency is not yet enabled.
In certain critical scenarios, Core 1 reads a zero value for tcb from the global variable g_assignedtask and stores this zero value into the tpidr
register. This results in subsequent interrupt handlers reading a zero tcb, causing an exception.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-27 00:16:35 +08:00
hujun5
c0f7dd979e fix compile error
CC:  pthread/pthread_exit.c common/espressif/esp_lowputc.c: In function 'esp_lowputc_disable_all_uart_int':
common/espressif/esp_lowputc.c:215:29: error: passing argument 1 of 'spin_lock_irqsave' discards 'const' qualifier from pointer target type [-Werror=discarded-qualifiers]
  215 |   flags = spin_lock_irqsave(&priv->lock);
      |                             ^~~~~~~~~~~
In file included from common/espressif/esp_lowputc.c:40:
/home/hujun5/下载/vela_sim/nuttx/include/nuttx/spinlock.h:511:55: note: expected 'volatile spinlock_t *' {aka 'volatile unsigned int *'} but argument is of type 'const spinlock_t *' {aka 'const unsigned int *'}
  511 | irqstate_t spin_lock_irqsave(FAR volatile spinlock_t *lock)
      |                                  ~~~~~~~~~~~~~~~~~~~~~^~~~
common/espressif/esp_lowputc.c:232:26: error: passing argument 1 of 'spin_unlock_irqrestore' discards 'const' qualifier from pointer target type [-Werror=discarded-qualifiers]
  232 |   spin_unlock_irqrestore(&priv->lock, flags);
      |                          ^~~~~~~~~~~
/home/hujun5/下载/vela_sim/nuttx/include/nuttx/spinlock.h:674:54: note: expected 'volatile spinlock_t *' {aka 'volatile unsigned int *'} but argument is of type 'const spinlock_t *' {aka 'const unsigned int *'}
  674 | void spin_unlock_irqrestore(FAR volatile spinlock_t *lock,

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-26 23:43:49 +08:00
yangsen5
15c1c9d42e sim_alsa: set paused to false when executing close
Signed-off-by: yangsen5 <yangsen5@xiaomi.com>
2024-12-26 23:31:55 +08:00
yangsen5
94c0f71db9 v4l2m2m: modify return value of g_bufsize to uint32_t
CID 1578530: (#1 of 1): INTEGER_OVERFLOW

Signed-off-by: yangsen5 <yangsen5@xiaomi.com>
2024-12-25 17:06:48 +08:00
Henry Rovner
923dc37a3b risc-v/bl808: Add I2C driver
This change implements a driver with support for all four I2C blocks on the BL808.
2024-12-25 11:03:26 +08:00
hujun5
50fd02c789 use small lock in following files:
arch/arm/src/kinetis/kinetis_serial.c
arch/arm/src/kl/kl_serial.c
arch/arm/src/lc823450/lc823450_irq.c
arch/arm/src/lc823450/lc823450_syscontrol.c
arch/arm/src/lpc54xx/lpc54_serial.c
arch/arm/src/max326xx/max32660/max32660_dma.c
arch/arm/src/max326xx/max32660/max32660_gpio.c
arch/arm/src/max326xx/max32660/max32660_lowputc.c
arch/arm/src/max326xx/max32660/max32660_serial.c
arch/arm/src/mx8mp/mx8mp_serial.c
arch/arm/src/nrf52/nrf52_gpio.c
arch/arm/src/nrf53/nrf53_gpio.c
arch/arm/src/nrf91/nrf91_gpio.c
arch/arm/src/rp2040/rp2040_uart.c

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-23 23:02:26 +08:00
hujun5
9aa5eda649 use small lock in following file
arch/arm/src/efm32/efm32_leserial.c
arch/arm/src/efm32/efm32_serial.c
arch/arm/src/gd32f4/gd32f4xx_serial.c
arch/arm/src/imx9/imx9_edma.c
arch/arm/src/imxrt/imxrt_edma.c
arch/arm/src/imxrt/imxrt_hprtc.c
arch/arm/src/kinetis/kinetis_lpserial.c
arch/arm/src/lc823450/lc823450_gpio.c
arch/arm/src/s32k1xx/s32k1xx_edma.c
arch/arm/src/s32k3xx/s32k3xx_edma.c
arch/arm64/src/imx9/imx9_edma.c

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-23 23:01:01 +08:00
hujun5
b66c1b94ce use small lock in following files:
arch/arm/src/rp2040/rp2040_usbdev.c
arch/arm/src/rp23xx/rp23xx_uart.c
arch/arm/src/s32k1xx/s32k1xx_enet.c
arch/arm/src/sam34/sam_lowputc.c
arch/arm/src/sama5/sam_lowputc.c
arch/arm/src/samd2l2/sam_serial.c
arch/arm/src/samd5e5/sam_serial.c
arch/arm/src/samv7/sam_lowputc.c
arch/arm/src/stm32/stm32_hciuart.c
arch/arm/src/stm32/stm32_qencoder.c
arch/arm/src/stm32/stm32_serial.c
arch/arm/src/stm32f0l0g0/stm32_serial_v1.c

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-23 22:56:43 +08:00
hujun5
c96b8cdfdd use small lock in following files:
arch/arm/src/stm32f0l0g0/stm32_serial_v2.c
arch/arm/src/stm32f7/stm32_qencoder.c
arch/arm/src/stm32f7/stm32_serial.c
arch/arm/src/stm32h5/stm32_serial.c
arch/arm/src/stm32h7/stm32_qencoder.c
arch/arm/src/stm32h7/stm32_serial.c
arch/arm/src/stm32l4/stm32l4_qencoder.c
arch/arm/src/stm32l4/stm32l4_serial.c
arch/arm/src/stm32l5/stm32l5_serial.c
arch/arm/src/stm32u5/stm32_serial.c
arch/arm/src/stm32wb/stm32wb_serial.c
arch/arm/src/stm32wl5/stm32wl5_serial.c
arch/arm/src/tiva/cc13xx/cc13xx_enablepwr.c
arch/risc-v/src/rv32m1/rv32m1_serial.c

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-23 22:53:19 +08:00
hujun5
798695a4f7 use small lock in following files:
arch/arm/src/tiva/common/tiva_hciuart.c
arch/arm/src/tms570/tms570_lowputc.c
arch/arm/src/xmc4/xmc4_serial.c
arch/arm64/src/a64/a64_serial.c
arch/mips/src/pic32mx/pic32mx_serial.c
arch/mips/src/pic32mz/pic32mz_serial.c
arch/risc-v/src/c906/c906_serial.c
arch/risc-v/src/fe310/fe310_serial.c
arch/risc-v/src/hpm6750/hpm6750_serial.c
arch/risc-v/src/k210/k210_serial.c
arch/sparc/src/bm3803/bm3803-serial.c
arch/sparc/src/bm3823/bm3823-serial.c

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-23 22:48:35 +08:00
hujun5
46c2d46a6b use small lock in:
arch/arm/src/imxrt/imxrt_wdog.c
arch/arm/src/kinetis/kinetis_edma.c
arch/arm/src/lc823450/lc823450_dvfs2.c
arch/arm/src/lc823450/lc823450_timer.c
arch/arm/src/lpc54xx/lpc54_lowputc.c

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-23 15:01:08 +08:00
hujun5
eb587d72e0 fix compile error
Configuration/Tool: esp32s2-kaluga-1/audio
Error: chip/esp32s2_lowputc.c:102:22: error: expected '}' before ';' token
  102 |   .lock = SP_UNLOCKED;
      |                      ^
chip/esp32s2_lowputc.c:62:1: note: to match this '{'
   62 | {

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-23 14:48:35 +08:00
hujun5
97eef351dc use small lock in following file
arch/or1k/src/mor1kx/mor1kx_serial.c
arch/risc-v/src/bl602/bl602_serial.c
arch/risc-v/src/common/espressif/esp_lowputc.c
arch/risc-v/src/common/espressif/esp_lowputc.h
arch/risc-v/src/common/espressif/esp_tickless.c
arch/risc-v/src/esp32c3-legacy/esp32c3_idle.c
arch/risc-v/src/esp32c3-legacy/esp32c3_lowputc.c
arch/risc-v/src/esp32c3-legacy/esp32c3_lowputc.h
arch/risc-v/src/esp32c3-legacy/esp32c3_rtc_lowerhalf.c
arch/risc-v/src/fe310/fe310_gpio.c

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-22 18:59:44 +08:00
Kyle Wilson
d59b8f25b8 Added hardware defines for stm32h5_qspi driver and octospi GPIOs (used by stm32h5_qspi driver).
Fixed comments and indent

Add commit log to OCTOSPI HW PR

Summary

hardware/stm32_qspi.h - Defines for the STM32H5 QSPI driver. The peripheral on the STM32H5 is actually an OCTOSPI peripheral, however it was decided to use it as a QSPI peripheral for the following reasons:

    There is currently support for QSPI within Nuttx.
    The STM32H7 QSPI register set is very similar to the STM32H5 OCTOSPI register set and the STM32H7 series has an existing QSPI driver.
    OCTOSPI devices are rare as of now and are not part of our use case.

hardware/stm32h56xxx_pinmap.h - Added pin mappings for OCTOSPI GPIOs.
Impact

This change will not impact any architectures outside of the STM32H5 series. Even for the STM32H5 series, these changes will only have an impact if they are utilized.
Testing

No testing yet for these files other than ensuring that we can still build Nuttx. Further testing will be documented in a future pull request when the STM32H5 QSPI driver is added.
2024-12-22 18:54:18 +08:00
hujun5
f25e3d2324 use small lock in following files
arch/risc-v/src/litex/litex_emac.c
arch/risc-v/src/mpfs/mpfs_coremmc.c
arch/risc-v/src/mpfs/mpfs_usb.c
arch/xtensa/src/esp32/esp32_idle.c
arch/xtensa/src/esp32/esp32_rtc_lowerhalf.c
arch/xtensa/src/esp32s2/esp32s2_idle.c
arch/xtensa/src/esp32s2/esp32s2_lowputc.c
arch/xtensa/src/esp32s2/esp32s2_lowputc.h
arch/xtensa/src/esp32s2/esp32s2_rtc_lowerhalf.c
arch/xtensa/src/esp32s3/esp32s3_idle.c

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-22 18:53:15 +08:00
hujun5
8411a97b85 use small lock in following files
arch/xtensa/src/esp32s3/esp32s3_rtc_lowerhalf.c
arch/z16/src/z16f/z16f_serial.c
arch/z80/src/z8/z8_serial.c
boards/arm/max326xx/max32660-evsys/src/max326_button.c
boards/arm/stm32/stm32f4discovery/src/stm32_gs2200m.c
drivers/i2c/i2c_bitbang.c
drivers/power/supply/act8945a.c
drivers/serial/uart_pci_16550.c
drivers/serial/uart_pl011.c
drivers/wireless/bluetooth/bt_uart_shim.c

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-22 18:43:26 +08:00
Jorge Guzman
e55966d3dc arm/stm32h753bi: Add support to lvgl
Signed-off-by: Jorge Guzman <jorge.gzm@gmail.com>
2024-12-22 05:44:14 -03:00
Tiago Medicci Serrano
7548db1980 arch/xtensa: Support __thread and thread_local keywords
Enable architecture-specific support for those keywords. This is a
"gcc-based" thread local storage implementation.
2024-12-21 20:49:07 +08:00
Kyle Wilson
e039fa039d Added comma to fix undefined bits struct member 2024-12-20 23:08:09 -05:00
yaojingwei
bbd6931d61 nuttx/audio: add fake audio driver.
Some checks are pending
Build Documentation / build-html (push) Waiting to run
The fake audio driver aims to easily simulate the functions of audio driver through reading and writing files.
With it, you can conveniently customize and define various capture or playback audio drivers for debugging or automated testing.

Signed-off-by: yaojingwei <yaojingwei@xiaomi.com>
2024-12-20 11:47:08 -03:00
hujun5
67b95d0142 use small lock in following files
arch/arm/src/armv7-a/arm_gicv2.c
arch/arm/src/imx6/imx_serial.c
arch/arm/src/imxrt/imxrt_flexcan.c
arch/xtensa/src/esp32/esp32_himem.c
arch/xtensa/src/esp32s3/esp32s3_himem.c

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-20 20:58:43 +08:00
chao an
d36ddb5790 arm/modifyreg: Use common lock to protect the modify address to ensure consistency
Signed-off-by: chao an <anchao@lixiang.com>
2024-12-20 19:54:07 +08:00
hujun5
59a849a7cc esp_rtc: use small lock in arch/risc-v/src/common/espressif/esp_rtc.c
reason:
We would like to replace the big lock with a small lock.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-20 14:10:56 +08:00
hujun5
2b762267f3 imx9_flexcan: use small lock in arch/arm/src/imx9/imx9_flexcan.c
reason:
We would like to replace the big lock with a small lock.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-20 14:09:34 +08:00
hujun5
a8353eef51 imx9_lpuart: use small lock in arch/arm(64)/src/imx9/imx9_lpuart.c
reason:
We would like to replace the big lock with a small lock.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-20 11:53:02 +08:00
Filipe Cavalcanti
97c0b43d86 arch/risc-v/espressif: add missing spinlock to wlan_recvframe 2024-12-19 18:16:50 -03:00
bazooka Joe
a7869bb28b stm32_i2c: fix sending large data over i2c
To trigger TC interrupt NBYTES needs to be set before RELOAD is disabled
similar to previous commitdone on stm32h7 510b6221ca
2024-12-19 22:06:04 +08:00
hujun5
ecdff659d1 modifyreg[8|32]: use small lock in modifyreg[8|32]
reason:
We would like to replace the big lock with a small lock.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-19 21:55:21 +08:00
YAMAMOTO Takashi
b4e5c74319 arch/sim/src/nuttx-names.in: Add pipe2
This breaks the libuv build without CONFIG_PIPES
as expected:

```
LD:  nuttx
/usr/bin/ld: nuttx.rel: in function `uv_pipe':
/src/apps/system/libuv/libuv/src/unix/pipe.c:516: undefined reference to `NXpipe2'
collect2: error: ld returned 1 exit status
make[1]: *** [Makefile:427: nuttx] Error 1
make: *** [tools/Unix.mk:551: nuttx] Error 2
```

That is, this correctly exposes https://github.com/apache/nuttx/issues/14773
on linux.
2024-12-19 14:46:59 +08:00
hujun5
5d68ab635c remove big lock in arch_phy_irq
reason:
We would like to replace the big lock with a small lock.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-18 23:28:18 +08:00
hujun5
c1b665c5d5 at32_serial: use small lock in arch/arm/src/at32/at32_serial.c
reason:
We would like to replace the big lock with a small lock.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-18 23:07:58 +08:00
hujun5
75ddce6e3a modifyreg16: use small lock in modifyreg16
reason:
We would like to replace the big lock with a small lock.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-18 20:28:26 +08:00
hujun5
f367ba2842 cxd: use small lock
reason:
We would like to replace the big lock with a small lock.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-18 20:21:58 +08:00
hujun5
826aa4f732 imx_gpio: use small lock in arch/arm/src/imx6/imx_gpio.c
reason:
We would like to replace the big lock with a small lock.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-18 20:10:45 +08:00
Andre Heinemans
16babb08c9 imx9: iomuxc: add assert on scmi pinconfig result 2024-12-18 20:09:12 +08:00
Andre Heinemans
01e05c2660 imx9: add config for waking WFI at systick 2024-12-18 20:09:12 +08:00
chao an
c7ccc0f9ec arm64/cache: add i/dcache check to avoid build break
arch/arm64/src/common/arm64_cache.c:344:35: error: macro "up_get_icache_linesize" passed 1 arguments, but takes just 0
  344 | size_t up_get_icache_linesize(void)
      |                                   ^

Feishu-Id: 4956395133

Signed-off-by: chao an <anchao@lixiang.com>
2024-12-18 20:07:59 +08:00
Alin Jerpelea
658e4ffae2 arch/x86_64: migrate to SPDX identifier
Most tools used for compliance and SBOM generation use SPDX identifiers
This change brings us a step closer to an easy SBOM generation.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2024-12-18 17:51:57 +08:00
Alin Jerpelea
559b533863 arch/xtensa: migrate to SPDX identifier
Most tools used for compliance and SBOM generation use SPDX identifiers
This change brings us a step closer to an easy SBOM generation.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2024-12-18 17:51:57 +08:00
Alin Jerpelea
438fcfb13a arch/arm: migrate to SPDX identifier
Most tools used for compliance and SBOM generation use SPDX identifiers
This change brings us a step closer to an easy SBOM generation.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2024-12-18 17:51:57 +08:00
hujun5
e3717b3086 esp32_rtc: use small lock in arch/xtensa/src/esp32[s2]/esp32s2_rtc.c
reason:
We would like to replace the big lock with a small lock.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-18 11:53:15 +08:00
Eren Terzioglu
c3d03f02fb esp32[c3|c6|h2]: Fix ledc clk issue 2024-12-17 13:35:42 -03:00
Eren Terzioglu
767c5f16f0 esp32[s2|s3]: Add pulse counter support 2024-12-17 13:35:42 -03:00
Eren Terzioglu
e48d092778 esp32[c6|h2]: Add pulse counter support 2024-12-17 13:35:42 -03:00
Filipe Cavalcanti
ecf683b13e arch/risc-v/esp32c6: fix memcpy on AP password 2024-12-17 11:27:02 -03:00
Filipe Cavalcanti
ac56285bf8 arch/xtensa: fix memcpy on AP password 2024-12-17 11:27:02 -03:00
Peter van der Perk
ffdbbdeef3 imx95: Fix eDMA compilation
Also clarifise that the imx95 uses eDMA5 instead of eDMA4 (imx93 has
eDMA4)
2024-12-17 21:49:28 +08:00
hujun5
a9fc0a4346 fix compile error
Create version.h
CC:  chip/tm4c/tm4c_gpio.c chip/tm4c/tm4c_gpio.c: In function 'tiva_configgpio':
chip/tm4c/tm4c_gpio.c:793:11: warning: implicit declaration of function 'spin_lock_irqsave' [-Wimplicit-function-declaration]
  793 |   flags = spin_lock_irqsave(&g_configgpio_lock);
      |           ^~~~~~~~~~~~~~~~~
CC:  nsh_parse.c chip/tm4c/tm4c_gpio.c:844:3: warning: implicit declaration of function 'spin_unlock_irqrestore' [-Wimplicit-function-declaration]
  844 |   spin_unlock_irqrestore(&g_configgpio_lock, flags);

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-17 21:02:39 +08:00
chao an
4793407b67 net/icmp: fix typo timout -> timeout
Signed-off-by: chao an <anchao@lixiang.com>
2024-12-17 20:48:07 +08:00
chao an
33d717d3a0 tools/parsetrace.py: fix typo lenght -> length
Signed-off-by: chao an <anchao@lixiang.com>
2024-12-17 20:48:07 +08:00
chao an
a59f59b9f5 libc/gnu: fix typo adress -> address
fix typo adress -> address

Signed-off-by: chao an <anchao@lixiang.com>
2024-12-17 20:48:07 +08:00
chao an
60636c4666 drivers/pci: fix typo addres -> address
fix typo addres -> address

Signed-off-by: chao an <anchao@lixiang.com>
2024-12-17 20:48:07 +08:00
hujun5
74ba2d2219 some replacements were omitted.
fix regression from https://github.com/apache/nuttx/pull/15219

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-17 17:14:06 +08:00
anjiahao
84a3639774 arm-m armv7a riscv32 :use cfi in irq asm function, make a debug frame
test code hello_main

int main(int argc, FAR char *argv[])
{
  uint32_t *p = 0xdeedbeff;
  *p = 0xffffff;

  printf("%p\n %x\n", p, *p);
  return 0;
}

qemu mps3-an547 hello_main :
Triggering an exception, and gdb backtrace is:

before:
(gdb) bt
/#0  0x0001168a in systick_getstatus (lower_=0x100010c <g_systick_lower>, status=0x1000a30 <g_intstackalloc+1600>)
    at /home/ajh/work/vela_system/nuttx/arch/arm/src/armv8-m/arm_systick.c:142
/#1  0x000122f4 in current_usec () at /home/ajh/work/vela_system/nuttx/drivers/timers/arch_timer.c:105
/#2  0x0001234c in udelay_accurate (microseconds=250000) at /home/ajh/work/vela_system/nuttx/drivers/timers/arch_timer.c:115
/#3  0x000124bc in up_udelay (microseconds=250000) at /home/ajh/work/vela_system/nuttx/drivers/timers/arch_timer.c:463
/#4  0x0001249e in up_mdelay (milliseconds=250) at /home/ajh/work/vela_system/nuttx/drivers/timers/arch_timer.c:446
/#5  0x0000920c in reset_board () at /home/ajh/work/vela_system/nuttx/sched/misc/assert.c:830
/#6  0x0000937c in _assert (filename=0x393f8 "/arch/arm/src/armv8-m/arm_busfault.c", linenum=113, msg=0x393f0 "panic", regs=0x1008500)
    at /home/ajh/work/vela_system/nuttx/sched/misc/assert.c:940
/#7  0x00000e2c in arm_busfault (irq=3, context=0x1008500, arg=0x0 <up_ndelay>) at /home/ajh/work/vela_system/nuttx/arch/arm/src/armv8-m/arm_busfault.c:113
/#8  0x000012d2 in arm_hardfault (irq=3, context=0x1008500, arg=0x0 <up_ndelay>)
    at /home/ajh/work/vela_system/nuttx/arch/arm/src/armv8-m/arm_hardfault.c:142
/#9  0x00008b20 in irq_dispatch (irq=3, context=0x1008500) at /home/ajh/work/vela_system/nuttx/sched/irq/irq_dispatch.c:145
/#10 0x0000041a in arm_doirq (irq=3, regs=0x1008500) at /home/ajh/work/vela_system/nuttx/arch/arm/src/armv8-m/arm_doirq.c:103
/#11 0x0000034e in exception_common () at /home/ajh/work/vela_system/nuttx/arch/arm/src/armv8-m/arm_exception.S:224

after:
(gdb) bt
/#0  systick_is_running () at /home/ajh/work/vela_system/nuttx/arch/arm/src/armv8-m/arm_systick.c:106
/#1  0x000125c0 in systick_getstatus (lower_=0x1000114 <g_systick_lower>, status=0x1007a20)
    at /home/ajh/work/vela_system/nuttx/arch/arm/src/armv8-m/arm_systick.c:141
/#2  0x0001323c in current_usec () at /home/ajh/work/vela_system/nuttx/drivers/timers/arch_timer.c:105
/#3  0x00013294 in udelay_accurate (microseconds=250000) at /home/ajh/work/vela_system/nuttx/drivers/timers/arch_timer.c:115
/#4  0x00013404 in up_udelay (microseconds=250000) at /home/ajh/work/vela_system/nuttx/drivers/timers/arch_timer.c:463
/#5  0x000133e6 in up_mdelay (milliseconds=250) at /home/ajh/work/vela_system/nuttx/drivers/timers/arch_timer.c:446
/#6  0x00008c5c in reset_board () at /home/ajh/work/vela_system/nuttx/sched/misc/assert.c:816
/#7  0x00008e88 in _assert (filename=0x39408 "/arch/arm/src/armv8-m/arm_busfault.c", linenum=113, msg=0x39400 "panic", regs=0x1007cf0)
    at /home/ajh/work/vela_system/nuttx/sched/misc/assert.c:915
/#8  0x00000ce4 in arm_busfault (irq=3, context=0x1007cf0, arg=0x0 <up_ndelay>)
    at /home/ajh/work/vela_system/nuttx/arch/arm/src/armv8-m/arm_busfault.c:113
/#9  0x0000118a in arm_hardfault (irq=3, context=0x1007cf0, arg=0x0 <up_ndelay>)
    at /home/ajh/work/vela_system/nuttx/arch/arm/src/armv8-m/arm_hardfault.c:142
/#10 0x000086cc in irq_dispatch (irq=3, context=0x1007cf0) at /home/ajh/work/vela_system/nuttx/sched/irq/irq_dispatch.c:145
/#11 0x0000041e in arm_doirq (irq=3, regs=0x1007cf0) at /home/ajh/work/vela_system/nuttx/arch/arm/src/armv8-m/arm_doirq.c:99
/#12 0x00000360 in exception_common () at /home/ajh/work/vela_system/nuttx/arch/arm/src/armv8-m/arm_exception.S:230
/#13 0x00027a8c in hello_main (argc=1, argv=0x1006e20) at /home/ajh/work/vela_system/apps/examples/hello/hello_main.c:39
/#14 0x00014968 in nxtask_startup (entrypt=0x27a7d <hello_main>, argc=1, argv=0x1006e20)
    at /home/ajh/work/vela_system/nuttx/libs/libc/sched/task_startup.c:72
/#15 0x0000f450 in nxtask_start () at /home/ajh/work/vela_system/nuttx/sched/task/task_start.c:116
/#16 0x00000000 in ?? ()
(gdb)

qemu armv7a nsh, hello_main:

before:
(gdb) bt
/#0  udelay_coarse (microseconds=156000) at /home/ajh/work/vela_system/nuttx/drivers/timers/arch_alarm.c:67
/#1  up_ndelay (nanoseconds=nanoseconds@entry=250000000) at /home/ajh/work/vela_system/nuttx/drivers/timers/arch_alarm.c:431
/#2  0x0060c630 in up_udelay (microseconds=microseconds@entry=250000) at /home/ajh/work/vela_system/nuttx/drivers/timers/arch_alarm.c:416
/#3  0x0060c644 in up_mdelay (milliseconds=milliseconds@entry=250) at /home/ajh/work/vela_system/nuttx/drivers/timers/arch_alarm.c:401
/#4  0x006056bc in reset_board () at /home/ajh/work/vela_system/nuttx/sched/misc/assert.c:816
/#5  _assert (filename=filename@entry=0x63047f "/arch/arm/src/armv7-a/arm_dataabort.c", linenum=linenum@entry=157, msg=msg@entry=0x62f56d "panic",
    regs=<optimized out>, regs@entry=0x4020af10) at /home/ajh/work/vela_system/nuttx/sched/misc/assert.c:915
/#6  0x0060bd74 in arm_dataabort (regs=0x4020af10, dfar=<optimized out>, dfsr=<optimized out>)
    at /home/ajh/work/vela_system/nuttx/arch/arm/src/armv7-a/arm_dataabort.c:157
/#7  0x0060bc04 in arm_vectordata () at /home/ajh/work/vela_system/nuttx/arch/arm/src/armv7-a/arm_vectors.S:438
Backtrace stopped: previous frame identical to this frame (corrupt stack?)
(gdb)

after:
(gdb) bt
/#0  udelay_coarse (microseconds=192000) at /home/ajh/work/vela_system/nuttx/drivers/timers/arch_alarm.c:67
/#1  up_ndelay (nanoseconds=nanoseconds@entry=250000000) at /home/ajh/work/vela_system/nuttx/drivers/timers/arch_alarm.c:431
/#2  0x0060c650 in up_udelay (microseconds=microseconds@entry=250000) at /home/ajh/work/vela_system/nuttx/drivers/timers/arch_alarm.c:416
/#3  0x0060c664 in up_mdelay (milliseconds=milliseconds@entry=250) at /home/ajh/work/vela_system/nuttx/drivers/timers/arch_alarm.c:401
/#4  0x006056bc in reset_board () at /home/ajh/work/vela_system/nuttx/sched/misc/assert.c:816
/#5  _assert (filename=filename@entry=0x63047f "/arch/arm/src/armv7-a/arm_dataabort.c", linenum=linenum@entry=157, msg=msg@entry=0x62f56d "panic",
    regs=<optimized out>, regs@entry=0x4020af10) at /home/ajh/work/vela_system/nuttx/sched/misc/assert.c:915
/#6  0x0060bd94 in arm_dataabort (regs=0x4020af10, dfar=<optimized out>, dfsr=<optimized out>)
    at /home/ajh/work/vela_system/nuttx/arch/arm/src/armv7-a/arm_dataabort.c:157
/#7  0x0060bc08 in arm_vectordata () at /home/ajh/work/vela_system/nuttx/arch/arm/src/armv7-a/arm_vectors.S:453
/#8  0x00620cd4 in hello_main (argc=4999, argv=0x0) at /home/ajh/work/vela_system/apps/examples/hello/hello_main.c:41
/#9  0x0060d320 in nxtask_startup (entrypt=0x620cc4 <hello_main>, argc=1, argv=0x4020a088)
    at /home/ajh/work/vela_system/nuttx/libs/libc/sched/task_startup.c:72
/#10 0x00609b50 in nxtask_start () at /home/ajh/work/vela_system/nuttx/sched/task/task_start.c:116
/#11 0x00000000 in ?? ()

qemu risc-v nsh

before:

(gdb) bt
/#0  udelay_coarse (microseconds=228000, microseconds@entry=891896832) at timers/arch_alarm.c:67
/#1  up_ndelay (nanoseconds=nanoseconds@entry=250000000) at timers/arch_alarm.c:431
/#2  0x8000397e in up_udelay (microseconds=microseconds@entry=250000) at timers/arch_alarm.c:416
/#3  0x80003988 in up_mdelay (milliseconds=milliseconds@entry=250) at timers/arch_alarm.c:401
/#4  0x80011f1c in reset_board () at misc/assert.c:813
/#5  0x80011f7a in _assert (filename=filename@entry=0x0, linenum=linenum@entry=0, msg=msg@entry=0x8002114c "panic", regs=<optimized out>,
    regs@entry=0x80030704) at misc/assert.c:915
/#6  0x80006ad6 in riscv_exception (mcause=<optimized out>, regs=0x80030704, args=<optimized out>) at common/riscv_exception.c:129
/#7  0x80000d9e in riscv_doirq (irq=7, regs=<optimized out>) at common/riscv_doirq.c:99
/#8  0x80000164 in exception_common () at common/riscv_exception_common.S:210
Backtrace stopped: frame did not save the PC
(gdb)

after

(gdb) bt
/#0  0x80003922 in udelay_coarse (microseconds=90000, microseconds@entry=891896832) at timers/arch_alarm.c:67
/#1  up_ndelay (nanoseconds=nanoseconds@entry=250000000) at timers/arch_alarm.c:431
/#2  0x8000397e in up_udelay (microseconds=microseconds@entry=250000) at timers/arch_alarm.c:416
/#3  0x80003988 in up_mdelay (milliseconds=milliseconds@entry=250) at timers/arch_alarm.c:401
/#4  0x80011f2a in reset_board () at misc/assert.c:816
/#5  0x80011f7a in _assert (filename=filename@entry=0x0, linenum=linenum@entry=0, msg=msg@entry=0x8002114c "panic", regs=<optimized out>,
    regs@entry=0x80030704) at misc/assert.c:915
/#6  0x80006ad6 in riscv_exception (mcause=<optimized out>, regs=0x80030704, args=<optimized out>) at common/riscv_exception.c:129
/#7  0x80000d9e in riscv_doirq (irq=7, regs=<optimized out>) at common/riscv_doirq.c:99
/#8  0x80000166 in exception_common () at common/riscv_exception_common.S:215
/#9  0x8001792a in hello_main (argc=<optimized out>, argv=<optimized out>) at hello_main.c:41
/#10 0x80004b52 in nxtask_startup (entrypt=0x80030704, argc=1, argv=0x800300e8) at sched/task_startup.c:72
/#11 0x80001e72 in nxtask_start () at task/task_start.c:116
/#12 0x00000000 in ?? ()
Backtrace stopped: frame did not save the PC
(gdb)

Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2024-12-17 16:43:42 +08:00
Matteo Golin
e96fb6b118 arch/bcm2711, boards/raspberry-pi-4b: Add preliminary support for the BCM2711 and Raspberry Pi 4B.
Includes a Mini-UART NSH console for the 4B, tested on the 4GB RAM
model. Part of an I2C driver which can only read, boiler-plate for a SPI
driver, and a GPIO driver with limited pins. Some tools are present for
automatically fetching the boot files and creating the `config.txt` file
based on selected Kconfig options.
2024-12-17 16:43:17 +08:00
hujun5
188a7ce990 gpio: use small lock to protect configgpio
reason:
We would like to replace the critical section with a small lock.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-17 16:37:59 +08:00
hujun5
63f947941a esp32s3_rtc: use small lock in arch/xtensa/src/esp32s3/esp32s3_rtc.c
reason:
We would like to replace the big lock with a small lock.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-17 16:20:05 +08:00
hujun5
99b594d4ae max32660_rtc: change spinlock name g_lock -> g_rtc_lock
Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-17 16:14:37 +08:00
hujun5
a4da0791c5 esp32c3_rtc: use small lock in arch/risc-v/src/esp32c3-legacy/esp32c3_rtc.c
reason:
We would like to replace the big lock with a small lock.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-17 14:00:17 +08:00
hujun5
25d5dcf7ef lc823450_rtc: use small lock in arch/arm/src/lc823450/lc823450_rtc.c
reason:
We would like to replace the big lock with a small lock.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-12-17 13:59:07 +08:00
Eren Terzioglu
35ace4196f esp32[c3|c6|h2]: Add efuse simulation support 2024-12-17 01:04:39 +08:00
Eren Terzioglu
970d1a1f7c esp32[c3|c6|h2]: Add efuse support 2024-12-17 01:04:39 +08:00
Alin Jerpelea
10793d1756 arch/esp32c3-legacy/hardware: migrate license to ASF
the author has submitted the CLA and the license can be migrated to ASF
    Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2024-12-17 00:14:12 +08:00
Alin Jerpelea
ee9d5d4345 arch/esp32c3-legacy/hardware: migrate license to ASF
both co-authors have submitted the CLA and the license can be migrated to ASF
 Co-authored-by: Dong Heng <dongheng@espressif.com>
 Co-authored-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2024-12-17 00:14:12 +08:00
Andre Heinemans
a84257c885 arch/arm: add support for imx95 m7 core
- Add support for i.MX95 M7 core
- Interprocessor communication by RPMSG and SCMI
- Drivers available for UART, SPI, I2C, CAN, IO and timers
2024-12-17 00:06:56 +08:00
Alin Jerpelea
5f5350c05b arch/esp32c3-legacy/esp32c3_ice40: migrate to SPDX identifier
Most tools used for compliance and SBOM generation use SPDX identifiers
This change brings us a step closer to an easy SBOM generation.

Copyright and Author information is missing from the License and was filled with
commit authorship
    Signed-off-by: Jakub Janousek <janouja9@fel.cvut.cz>

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2024-12-16 14:18:35 +08:00
Alin Jerpelea
aa422c95ca arch/arm/xmc4: migrate to SPDX identifier
Most tools used for compliance and SBOM generation use SPDX identifiers
This change brings us a step closer to an easy SBOM generation.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2024-12-16 14:18:35 +08:00
Andre Heinemans
cfd79b89ab lpuart: fix build errors for SINGLEWIRE and INVERT without SERIAL_TERMIOS 2024-12-13 16:04:15 -03:00
Andre Heinemans
2c93e79e94 arm64/imx9: tpm: fix TPM_FILTER_CHXFVAL_MASK macro 2024-12-13 23:27:01 +08:00
Huang Qi
de5151c64b riscv_percpu: Replace critical section with irqsave/irqrestore
Since the SCRATCH register is used to store the percpu pointer,
which should not be accessed by other CPUs, we can replace the
critical section with irqsave/irqrestore.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2024-12-13 23:03:48 +08:00
Gao Feng
9e8e7ace09 xtensa: support coredump by register set alignment 2024-12-13 18:21:37 +08:00
SPRESENSE
0df0a105d1 arch: cxd56xx: Fix not restart after TX error
Fix a bug that I2C driver can not transfer after TX abort error.
It caused by remaining NO_STOP flag status.
2024-12-13 10:51:17 +08:00
Huang Qi
4e9702c7fb risc-v: Move CSR register manipulation macros to csr.h
This patch allow public arch level code use them, make it possible to access system register in common code, such as percpu.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2024-12-13 01:29:26 +08:00
simbit18
e4705e7f62 Fix Kconfig style
Remove spaces from Kconfig files
Add TABs
2024-12-12 02:18:23 +08:00
Jukka Laitinen
fd3f0b7dd9 arch/risc-v/src/mpfs/mpfs_corespi.c: Add support for multiple bit widths
The corespi fpga block supports just one frame length, which is defined when
the block is instantiated on the FPGA.

This adds support for emulating different frame lengths if they are multiples
of 8-bit. That is, with 8-bit corespi one can do 8,16 and 24-bit transfers.

This is implemented by simply writing several 8-bit frames for a single word
when needed.

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2024-12-12 02:05:16 +08:00
Tero Salminen
186b11c941 mpfs_corespi: fix semaphore race condition
SPI TX_DONE interrupt can be received after a semaphore timeout,
but before interrupts are disabled. This will leave the semaphore
to the signaled state.

After a timeout the semaphore is always reset to non-signaled state
to fix this race condition.

Signed-off-by: Tero Salminen <tero.salminen@unikie.com>
2024-12-12 02:05:16 +08:00
chao an
4eeb6546ec esp/mcpwm: fix unpaired spin lock
N/A

Signed-off-by: chao an <anchao@lixiang.com>
2024-12-11 21:36:51 +08:00
Tiago Medicci Serrano
f3ec1bd60c xtensa/esp32s3: Update the reserved size for struct __lock
After https://github.com/apache/nuttx/pull/15075, the static
assertion at `nuttx/arch/xtensa/src/esp32s3/esp32s3_libc_stubs.c`
was being triggered when building any of the ESP32-S3's defconfigs.
This commit updates the reserved size to reflect the changes
introduced by the related PR.
2024-12-11 21:36:20 +08:00
Jouni Ukkonen
8a7f96e7f4 arch/arm64/imx9: Fix usdhc dma receive
Invalidate cache when dma transfer is ready

Signed-off-by: Jouni Ukkonen <jouni.ukkonen@unikie.com>
2024-12-11 21:35:41 +08:00
Gao Feng
10a1d17a85 xtensa/esp32s3: add lock for async operation work
g_work as singleton can be changed by context switching,
but previous one async operation have not finished yet.
2024-12-10 22:01:43 +08:00
Gao Feng
1c7d81881c xtensa/esp32: encrypted MTD for partition offset
Non-encrypted mtd can not be used for encrypted device.

Even without SPI Flash encryption,
encrypted MTD also can be used to read no-encrypted data.
2024-12-10 18:15:47 +08:00
chao an
4a9a43771b arm/cxd56xx: Add g_ prefix to rtc spin lock
continue work of a68b00206b

| commit a68b00206b
| Author: hujun5 <hujun5@xiaomi.com>
| Date:   Mon Dec 9 20:48:09 2024 +0800
|
|     cxd56_rtc.c: use small lock in arch/arm/src/cxd56xx/cxd56_rtc.c
|
|     reason:
|     We hope to remove all instances of spin_lock_irqsave(NULL).
|
|     Signed-off-by: hujun5 <hujun5@xiaomi.com>

Signed-off-by: chao an <anchao@lixiang.com>
2024-12-10 16:25:02 +08:00
Kyle Wilson
9b99493e14 Initial STM32H5 SPI Commit
Used STM32H7 spi driver as a base. The register set is nearly identical. All registers are named the same with the same offset. There are some bits within the registers that are different but are not referenced in stm32_spi.c. Therfore this driver may just work as is. I did modify the clock source selection for each SPI peripheral, but not much else. Differences in the registers were applied in hardware/stm32h5xxx_spi.h.

Added functionality to SPI to configure the SPI RCC clock.

Added SPI info to Kconfig, updated stm32_spi.c to select and set the RCC clock, and other minor updates.

Updated Pin Map for SPI, added CFG1_BPASS support

Fixed redefinition of GPIO_SPI6_SCK_2

Added SPI_MAX_KER_CK definition.

This definition was needed because the H50 chips allow a kernel clock of 250 MHz. However the datasheets for all other chips (H52, H53, H56, H57) have a max of 125 MHz.

Changed SPI Clock Source Configuration

Moved setting of SPIx clock sources to stm32h5xx_rcc.c. STM32_SPIx_FREQUENCY and STM32_RCC_CCIPR3_SPIxSEL are now defined in board.h. Added error checking in stm32_spi.c to make sure STM32_SPIx_FREQUENCY and STM32_RCC_CCIPR3_SPIxSEL are actually defined.

Style updates

Removed SPI Clock selection from Kconfig

Update arch/arm/src/stm32h5/stm32_spi.h

Co-authored-by: hartmannathan <59230071+hartmannathan@users.noreply.github.com>

Update arch/arm/src/stm32h5/Kconfig

Co-authored-by: hartmannathan <59230071+hartmannathan@users.noreply.github.com>

Update arch/arm/src/stm32h5/stm32_spi.h

Co-authored-by: hartmannathan <59230071+hartmannathan@users.noreply.github.com>
2024-12-10 09:32:10 +08:00