This patch allow public arch level code use them, make it possible to access system register in common code, such as percpu.
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
I think the guy who wants to port NuttX is expected to understand NuttX kernel code and related configurations,
but the getting enough knowledge needs to read the kernel codes deeply.
To reduce the time for NuttX beginner who wants to port,
I tried to make the guide (how to port) based on my porting journey.
POSIX requires that the shm objects are zero-initialized. This has been broken
in some earlier commits (starting from 9af5fc5d09)
Also fix the flat build memory allocation to allocate both object data and payload
in the same chunk (as the comment also suggests). This saves allocations and memory
in a system with lots of shm objects.
Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
In some areas with high security requirements such as vehicle control, in order to meet functional safety requirements, the timeout and feeding interval of the watchdog need to be configured in milliseconds
Signed-off-by: yaojiaqi <yaojiaqi@lixiang.com>
Most of developers will not have the scenarios of open/close file descriptors in multi-threads,
The default option will incur additional code size overhead for such devices.
this PR will preserve the behavior before PR#13296 was introduced, and ensure that the default code size is not affected.
Note that this option will ensure the safety of access to the file
system from multi-tasks (Task A blocking rw(fd), then Task B close(fd)),
the disadvantage is that it will increase the amount of code-size,
there is no need to enable this option if the application could ensure
he file operations are safe.
Signed-off-by: chao an <anchao@lixiang.com>
After tcb is destroyed, it is very dangerous to back reference tcb through file.
This commit will perform file operations while ensuring the validity of tcb during
fsync, with will avoid tcb check in each subsystem.
Signed-off-by: chao an <anchao@lixiang.com>
The corespi fpga block supports just one frame length, which is defined when
the block is instantiated on the FPGA.
This adds support for emulating different frame lengths if they are multiples
of 8-bit. That is, with 8-bit corespi one can do 8,16 and 24-bit transfers.
This is implemented by simply writing several 8-bit frames for a single word
when needed.
Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
SPI TX_DONE interrupt can be received after a semaphore timeout,
but before interrupts are disabled. This will leave the semaphore
to the signaled state.
After a timeout the semaphore is always reset to non-signaled state
to fix this race condition.
Signed-off-by: Tero Salminen <tero.salminen@unikie.com>
After https://github.com/apache/nuttx/pull/15075, the static
assertion at `nuttx/arch/xtensa/src/esp32s3/esp32s3_libc_stubs.c`
was being triggered when building any of the ESP32-S3's defconfigs.
This commit updates the reserved size to reflect the changes
introduced by the related PR.
This is a follow-up to 366c8a5d94 (PR-15102).
* Documentation/guides/zerolatencyinterrupts.rst
(Title): Make title case consistent.
(Getting Back into the Game, Maskable Nested Interrupts): Clarify discussion
about priorities.
(Cortex-M3/4 Implementation): The first half of a sentence was deleted in
366c8a5d9 because the Kconfig that was described there no longer exists:
CONFIG_ARMV7M_USEBASEPRI. Write a new beginning for this sentence that
matches current implementation.
(Disabling the High Priority Interrupt): Change "cannot" to "must not be
allowed to" to improve clarity.
(Configuring High Priority Interrupts): Change "to NVIC" to "in NVIC" to
improve clarity.
This PR will still allow basic shell operations such as cd/ls/pwd to be used even when the environment is disabled.
Signed-off-by: chao an <anchao@lixiang.com>
when tcp retransmission only double conn->timer in Karn(tcp_timer.c L602), after retransmission in Jacobson
M is is now rtt test will become a negative value.
```
signed char m;
m = conn->rto - conn->timer; // M is now rtt test
/* This is taken directly from VJs original code in his paper */
m = m - (conn->sa >> 3);
conn->sa += m; //conn->sa is a negative value
if (m < 0)
{
m = -m;
}
m = m - (conn->sv >> 2);
conn->sv += m;
conn->rto = (conn->sa >> 3) + conn->sv; //rto
```
For example,we lost one ack packet, we will set conn->timer = 6 by backoff，conn->rto still 3.
After retransmission we will Do RTT estimation, then will get
```
conn->sa = 253
conn->rto = 46
```
Then if any packets lost it will wait for a long time before triggering a retransmission.
Test method.
We can reproduce this issue by adding drop ACK packets in tcp_input, and debug conn->rto after Jacobson.
Signed-off-by: meijian <meijian@xiaomi.com>
Add sem_wait fast operations, use atomic to ensure
atomicity of semcount operations, and do not depend
on critical section.
Test with robot:
before modify:
nxmutex_lock cost: 78 ns
nxmutex_unlock cost: 82 ns
after modify:
nxmutex_lock cost: 28 ns
nxmutex_unlock cost: 14 ns
Signed-off-by: zhangyuan29 <zhangyuan29@xiaomi.com>
If the current platform does not require a large PATH_MAX size support and toolchain supports alloca(),
we could turn off this option to improve performance.
Signed-off-by: chao an <anchao@lixiang.com>
continue work of a68b00206b
| commit a68b00206b
| Author: hujun5 <hujun5@xiaomi.com>
| Date: Mon Dec 9 20:48:09 2024 +0800
|
| cxd56_rtc.c: use small lock in arch/arm/src/cxd56xx/cxd56_rtc.c
|
| reason:
| We hope to remove all instances of spin_lock_irqsave(NULL).
|
| Signed-off-by: hujun5 <hujun5@xiaomi.com>
Signed-off-by: chao an <anchao@lixiang.com>
Used STM32H7 spi driver as a base. The register set is nearly identical. All registers are named the same with the same offset. There are some bits within the registers that are different but are not referenced in stm32_spi.c. Therfore this driver may just work as is. I did modify the clock source selection for each SPI peripheral, but not much else. Differences in the registers were applied in hardware/stm32h5xxx_spi.h.
Added functionality to SPI to configure the SPI RCC clock.
Added SPI info to Kconfig, updated stm32_spi.c to select and set the RCC clock, and other minor updates.
Updated Pin Map for SPI, added CFG1_BPASS support
Fixed redefinition of GPIO_SPI6_SCK_2
Added SPI_MAX_KER_CK definition.
This definition was needed because the H50 chips allow a kernel clock of 250 MHz. However the datasheets for all other chips (H52, H53, H56, H57) have a max of 125 MHz.
Changed SPI Clock Source Configuration
Moved setting of SPIx clock sources to stm32h5xx_rcc.c. STM32_SPIx_FREQUENCY and STM32_RCC_CCIPR3_SPIxSEL are now defined in board.h. Added error checking in stm32_spi.c to make sure STM32_SPIx_FREQUENCY and STM32_RCC_CCIPR3_SPIxSEL are actually defined.
Style updates
Removed SPI Clock selection from Kconfig
Update arch/arm/src/stm32h5/stm32_spi.h
Co-authored-by: hartmannathan <59230071+hartmannathan@users.noreply.github.com>
Update arch/arm/src/stm32h5/Kconfig
Co-authored-by: hartmannathan <59230071+hartmannathan@users.noreply.github.com>
Update arch/arm/src/stm32h5/stm32_spi.h
Co-authored-by: hartmannathan <59230071+hartmannathan@users.noreply.github.com>
