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Author SHA1 Message Date
hujun5
fe2af95222 add spinlock_type.h 
reason:
Due to incomplete handling of spinlock_t in arch/spinlock.h,
it should not be used directly by external code.
Furthermore, because pthread.h and nuttx/spinlock.h have a circular
dependency, pthread.h cannot successfully include nuttx/spinlock.h.
Therefore, we have split spinlock_type.h from spinlock.h.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
 2024-11-30 03:25:17 +08:00
wangjianyu3
f1a57f4265 drivers/sensors/gnss: Add suffix to macro of geofence index 
Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
 2024-11-30 03:16:25 +08:00
hujun5
ab0fb80e2b arm64: change some format 
fix the comment in https://github.com/apache/nuttx/pull/14980

Signed-off-by: hujun5 <hujun5@xiaomi.com>
 2024-11-30 03:15:54 +08:00
hujun5
74dfcdfbd6 cxd56xx: use small lock in arch/arm/src/cxd56xx/cxd56_clock.c 
Signed-off-by: hujun5 <hujun5@xiaomi.com>
 2024-11-30 03:15:02 +08:00
Eero Nurkkala
53f4216977 risc-v/mpfs: clear IPIs at boot 
Inter-processor interrupts (IPIs) are not cleared via mie/mip registers but
rather, at the MPFS_CLINT_BASE + mhartid * 4 (a word or 4-byte offset for
each hart).

If there's an IPI waiting, the system will continue to boot altough it's
expected to stay at the wfi loop waiting for the IPI.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
 2024-11-30 03:14:10 +08:00
Eero Nurkkala
e111c9a256 risc-v/mpfs: introduce CONFIG_MPFS_CLKINIT flag 
This CONFIG_MPFS_CLKINIT is set with bootloaders by default. However,
this gives an option to have it unset. In some cases, the clocks
may be already set so it becomes unnecessary to re-initialize them.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
 2024-11-30 03:14:10 +08:00
buxiasen
7a4fac0df6 coredump: add BOARD_CRASHDUMP_CUSTOM support 
For only board specific crashdump and no syslog/blk/mtd coredump

Signed-off-by: buxiasen <buxiasen@xiaomi.com>
 2024-11-30 03:08:35 +08:00
buxiasen
ddf428d66c coredump: support mtdoutstream 
Signed-off-by: buxiasen <buxiasen@xiaomi.com>
 2024-11-30 03:08:35 +08:00
wanggang26
3add14714e coredump: fit sostream, mtdoutstream use alloc, info use stack 
Signed-off-by: wanggang26 <wanggang26@xiaomi.com>
Signed-off-by: buxiasen <buxiasen@xiaomi.com>
 2024-11-30 03:08:35 +08:00
buxiasen
88aaba29ba coredump: update coredump method to choice, default NONE 
Signed-off-by: buxiasen <buxiasen@xiaomi.com>
 2024-11-30 03:08:35 +08:00
buxiasen
eca83c4a73 blk/mtdoutstream: use lib_sostream_s to support seek 
Signed-off-by: buxiasen <buxiasen@xiaomi.com>
 2024-11-30 03:08:35 +08:00
hujun5
321419491e missing update running_task 
This commit fixes the regression from https://github.com/apache/nuttx/pull/14865

Signed-off-by: hujun5 <hujun5@xiaomi.com>
 2024-11-30 02:48:58 +08:00
hujun5
635da96bae xtensa: remove up_set_current_regs/up_current_regs 
reason:
up_set_current_regs initially had two functions:

1: To mark the entry into an interrupt state.
2: To record the context before an interrupt/exception. If we switch to a new task, we need to store the upcoming context regs by calling up_set_current_regs(regs).

Currently, we record the context in other ways, so the second function is obsolete. Therefore, we need to rename up_set_current_regs to better reflect its actual meaning, which is solely to mark an interrupt.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
 2024-11-30 02:48:58 +08:00
wangmingrong1
137ca05249 arm64/toolchain: Cmake alignment makefile writing 
They should be a relationship of choice:
ifeq ($(CONFIG_ARCH_CORTEX_A53),y)
  ARCHCPUFLAGS += -mcpu=cortex-a53
else ifeq ($(CONFIG_ARCH_CORTEX_A55),y)
  ARCHCPUFLAGS += -mcpu=cortex-a55
else ifeq ($(CONFIG_ARCH_CORTEX_A57),y)
  ARCHCPUFLAGS += -mcpu=cortex-a57
else ifeq ($(CONFIG_ARCH_CORTEX_A72),y)
  ARCHCPUFLAGS += -mcpu=cortex-a72
else ifeq ($(CONFIG_ARCH_CORTEX_R82),y)
  ARCHCPUFLAGS += -mcpu=cortex-r82
else ifeq ($(CONFIG_ARCH_ARMV8A),y)
  ARCHCPUFLAGS += -march=armv8-a
else ifeq ($(CONFIG_ARCH_ARMV8R),y)
  ARCHCPUFLAGS += -march=armv8-r
endif

Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com>
 2024-11-29 18:37:21 +08:00
chao an
8257b11944 arm/isr: move up_set_interrupt_context() to chip define 
up_set_interrupt_context() is chip specific implement, move this function to correct place

Signed-off-by: chao an <anchao@lixiang.com>
 2024-11-29 18:37:08 +08:00
chao an
2961ecab9f sim/tflm: add tflite-micro demo into ci build 
$ cmake -B build -DBOARD_CONFIG=sim/tflm -GNinja
$ cmake --build build
$ ./build/nuttx

NuttShell (NSH) NuttX-10.4.0
nsh> tflm -h

Utility to use tflite micro on nuttx.
[ -C       ] Compile tflite model into c++ codes.
[ -E       ] Do once evaluation (for profiling).
[ -i <str> ] Readable model file path.
[ -o <str> ] Writable c++ file path.
[ -p <str> ] Prefix of compiled code.
[ -a <int> ] Arena size (mempool).
[ -h       ] Print this message.

nsh> tflm -E -i /data/MobileNet-v3-Small.tflite -o /data/MbileNet-v3-Small.out
0 (id=0): size=602112, offset=0, first_used=0 last_used=1
1 (id=1): size=602112, offset=602112, first_used=1 last_used=2
2 (id=2): size=602112, offset=0, first_used=2 last_used=3
3 (id=3): size=607504, offset=802816, first_used=3 last_used=4
...
* (id=114): size=4096, offset=0, first_used=114 last_used=115
* (id=115): size=4000, offset=4096, first_used=115 last_used=115
 0: 00000000000000000000000000...................................................... (588k)
 1: 0000000000000000000000000011111111111111111111111111............................ (1176k)
 2: 2222222222222222222222222211111111111111111111111111............................ (1176k)
 3: 22222222222222222222222222........333333333333333333333333333................... (1182k)
...
"Event","Tag","Ticks"
0,SUB,0
1,MUL,0
2,PAD,0
3,CONV_2D,1
4,HARD_SWISH,0
5,PAD,0
...
110,MEAN,0
111,FULLY_CONNECTED,0
112,FULLY_CONNECTED,0
113,MUL,0
114,FULLY_CONNECTED,0
"Unique Tag","Total ticks across all events with that tag."
SUB, 0
MUL, 0
PAD, 0
CONV_2D, 3
...
"total number of ticks", 3
nxai done!

Signed-off-by: chao an <anchao@lixiang.com>
 2024-11-29 18:34:10 +08:00
anjiahao
68ac081bd1 mps3-an547:update Documentation 
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
 2024-11-29 18:33:18 +08:00
Michal Lenc
a8d4ed910d st7789: add configuration option to set default background color 
ST7789 fills the display with 0xffff color during its initialization.
This color may or may not be overwritten by a higher layer (framebuffer
or lcd driver for example). The color remains on the display until
application UI is started if not overwritten by the higher layer before.

This commit adds configuration option LCD_ST7789_DEFAULT_COLOR that
allows to set the default background color. This may avoid shining
display with, for example, white color for an extensive amount of time.
The default value is set to 0xffff previously hard-coded in the driver,
therefore current implementations will not notice the change.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
 2024-11-29 18:32:22 +08:00
chao an
fcd8236e24 sim/nsh: enable SIM_HOSTFS by default 
hostfs will allow developers to access the current execution directory.

nsh> ls
/:
 bin/
 data/
 dev/
 etc/
 proc/
 tmp/
nsh> cd /data
nsh> ls
/data:
 README.md
 fs/
 pass1/
 cmake/
 arch/

Signed-off-by: chao an <anchao@lixiang.com>
 2024-11-29 10:15:25 +01:00
hujun5
d89f22eb98 arm64: remove g_running_tasks[this_cpu()] = NULL 
reason:
We hope to keep g_running_tasks valid forever.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
 2024-11-29 10:04:50 +01:00
Jouni Ukkonen
1bfe8bcf71 arch/arm64/imx9: Boot, move mmu init to correct place 
MMU init must be after ddrinit.

Signed-off-by: Jouni Ukkonen <jouni.ukkonen@unikie.com>
 2024-11-29 10:03:28 +01:00
lipengfei28
f589d5a4c7 pci: pci res have pci addr and cpu addr, ecam use map translation pci 
addr to cpuaddr

Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
 2024-11-29 11:12:54 +08:00
lipengfei28
b44fb53b61 pci:map bar should not be zaro len 
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
 2024-11-29 11:12:54 +08:00
lipengfei28
c2cd503f66 pci: add /dev/pci,used for pciutils 
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
 2024-11-29 11:12:54 +08:00
simbit18
9c9b945876 fix nxstyle 
Removed extra spaces from .h and .c files
 2024-11-28 20:40:13 +08:00
yangao1
968bb179fe nuttxgdb/rpmsg.py:dump rpmsg_service message 
(gdb)rpmsg_service
g_rpmsg_cb:
rpmsg_cb_s at        ns_match                                 ns_bind
-------------        --------                                 -------
0xf4e00ac0           0x44708225 <rpmsg_rtc_server_ns_match>   0x4470874c <rpmsg_rtc_server_ns_bind>
0xf4e27b20           0x440c8fd6 <syslog_rpmsg_ns_match>       0x440c966a <syslog_rpmsg_ns_bind>
0xf4e27af0           0x0                                      0x0
g_rpmsg:
Endpoint at          Name                 local Addr   dest Addr    cb                                       ns_bound_cb                              ns_unbind_cb
-----------          ----                 ----------   ---------    --                                       -----------                              ------------
0xf2302ac0           NS                   53           53           0x44699520 <rpmsg_virtio_ns_callback>    0x0                                      0x0
0xf3c0f920           rpmsg-ttysensor      1025         1028         0x44704457 <uart_rpmsg_ept_cb>           0x0                                      0x0
0xf301d058           rpmsg-sensor         1026         1029         0x440c1680 <sensor_rpmsg_ept_cb>         0x440c1871 <sensor_rpmsg_device_ns_bound> 0x44693a18 <rpmsg_destroy_ept>
0xf2302a6c           rpmsg-ping           1027         1036         0x440a10d2 <rpmsg_ping_ept_cb>           0x0                                      0x0

List update: rpmsg dump contains none initialized list, need to take care of it in
NxList.

Signed-off-by: yangao1 <yangao1@xiaomi.com>
 2024-11-28 20:40:04 +08:00
wangmingrong1
07493f1c8e gcov: Add gcov gcc implementation and toolchain to ci compilation 
When running qemu/nsh_smp or sim/nsh configuration, run gcov -d /tmp/xxx
to save all gcov generated data and export them to the host. Use
./tools/gcov.sh to parse and generate reports. For details, see:
Documentation/applications/system/gcov/index.rst

Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com>
 2024-11-28 19:35:34 +08:00
YAMAMOTO Takashi
388ab6c2db esp32s3: don't clear pending interrupts on eg. up_putc 
Fixes https://github.com/apache/nuttx/issues/14872
 2024-11-28 19:00:21 +08:00
hujun5
0bba53ce12 remove redundant scheduling records 
reason:
Since the scheduling records have already been moved to the interrupt exit in this submission,
we need to delete the original records' locations.
This commit fixes the regression from https://github.com/apache/nuttx/pull/13651

Signed-off-by: hujun5 <hujun5@xiaomi.com>
 2024-11-28 18:56:13 +08:00
guoshichao
a2fcd9862c nuttx/arch: remove the custom board check in up_testset implementation 
the up_testset implementation is common code, should not add custom
board check

Signed-off-by: guoshichao <guoshichao@xiaomi.com>
 2024-11-28 15:06:57 +08:00
wangmingrong1
4daafd0781 Fix path error 
Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com>
 2024-11-28 15:04:59 +08:00
Jouni Ukkonen
6b38b83331 arch/arm64/imx9: Clear DMA channel interrupts on init 
Avoid spurious interrupts on reboot

Signed-off-by: Jouni Ukkonen <jouni.ukkonen@unikie.com>
 2024-11-28 15:02:15 +08:00
Jouni Ukkonen
1d23baaa63 arch/arm64/imx9/imx9_flexspi: Replace memcpy by while loop 
libc memcpy cannot access fspi memory space correctly
remove unnecessary debugassert and cache operations

Signed-off-by: Jouni Ukkonen <jouni.ukkonen@unikie.com>
 2024-11-28 15:00:33 +08:00
simbit18
0476895c0d fix nxstyle 
Remove TABs
 2024-11-28 09:14:49 +08:00
Ville Juven
51171d66f2 riscv/riscv_ipi.h: Do not write to CSR_MIP.MSIP as it is read-only 
From the RISV-V Privileged Spec v1.10 (3.1.14 MIP/MIE):

Only the bits corresponding to lower-privilege software interrupts
(USIP, SSIP), timer interrupts (UTIP, STIP), and external interrupts
(UEIP, SEIP) in mip are writable through this CSR address; the
remaining bits are read-only.

Thus, it is futile to write to the M-mode status bit via the CSR, only
access via RISCV_IPI is valid.
 2024-11-28 09:14:07 +08:00
p-szafonimateusz
eca40ff053 arch/x86_64/intel64: re-enable interrupts before syscall handle 
arch/x86_64/intel64: re-enable interrupts before syscall handle
 2024-11-27 13:32:23 -03:00
p-szafonimateusz
908ac756ea arch/x86_64/intel64: remove unnecessary nested syscalls logic 
remove unnecessary nested syscalls logic, it's already handled different way
 2024-11-27 13:32:23 -03:00
p-szafonimateusz
c02dba9a0d Documentation: add x86_64 kernel build configs 
Documentation: add x86_64 kernel build configs
 2024-11-27 13:32:23 -03:00
p-szafonimateusz
e7d6f2c044 arch/x86_64/intel64_irq.c: remove some magic numbers 
arch/x86_64/intel64_irq.c: remove some magic numbers

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
 2024-11-27 13:32:23 -03:00
p-szafonimateusz
fc965b856b boards/qemu-intel64: add kernel build (ROMFS) configurations 
knsh_romfs - for QEMU and legacy serial port
knsh_romfs_pci - for bare-metal Intel hardware and PCI serial port

Steps to build kernel image with user-space apps in romfs:

$ ./tools/configure.sh qemu-intel64/knsh_romfs
$ make -j
$ make export -j
$ pushd ../apps
$ ./tools/mkimport.sh -z -x ../nuttx/nuttx-export-*.tar.gz
$ make import -j
$ ./tools/mkromfsimg.sh
$ mv boot_romfsimg.h ../nuttx/arch/x86_64/src/board/romfs_boot.c
$ popd
$ make -j

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
 2024-11-27 13:32:23 -03:00
p-szafonimateusz
e95ea6fbc4 arch/x86_64: handle TLB shootdown 
arch/x86_64: handle TLB shootdown

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
 2024-11-27 13:32:23 -03:00
p-szafonimateusz
ce22c28e88 arch/x86_64: add kernel stack support 
arch/x86_64: add kernel stack support

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
 2024-11-27 13:32:23 -03:00
p-szafonimateusz
712e8d9cc7 arch/x86_64: add kernel build support 
arch/x86_64: add kernel build support

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
 2024-11-27 13:32:23 -03:00
p-szafonimateusz
8702fbef8d arch/x86_64/include/intel64/arch.h: align definitions 
arch/x86_64/include/intel64/arch.h: align definitions

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
 2024-11-27 13:32:23 -03:00
p-szafonimateusz
d51ceccd7b arch/x86_64: add syscalls support 
arch/x86_64: add syscalls support

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
 2024-11-27 13:32:23 -03:00
p-szafonimateusz
7f4279b8af arch/x86_64/: fix broken set_cr3() 
arch/x86_64/: fix broken set_cr3()

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
 2024-11-27 13:32:23 -03:00
wangjianyu3
289f43f0ad Documentation/esp32s3-devkit: Add doc for esp32s3-devkit/USBMSC 
More details

  https://nuttx.apache.org/docs/latest/applications/system/usbmsc/index.html
  https://github.com/apache/nuttx/pull/14966

Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
 2024-11-27 13:30:44 -03:00
wangjianyu3
1cfaff011e esp32s3-devkit/usbmsc: Initializing configuration for USBMSC 
USBMSC - USB Mass Storage Class

Build

  $ ./tools/configure.sh -l esp32s3-devkit:usbmsc
  $ make flash ESPTOOL_PORT=/dev/ttyACMx

Runtime

  # Device
  nsh> mkrd -m 10 -s 512 640
  nsh> msconn

  # Host
  $ sudo mkfs.ext4 /dev/sdx
  $ sudo mount /dev/sdx ./mnt/

Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
 2024-11-27 13:30:44 -03:00
wangjianyu3
ffa2209b4a boards/xtensa/esp32s3: Add USB MSC support for esp32s3 
Test

  # Device:/dev/ram10 <----> Host:/dev/sde

  # Device (NuttX)
    nsh> mkrd -m 10 -s 512 640
    nsh> msconn
    nsh> ls -l /dev/ram10
     brw-rw-rw-      327680 /dev/ram10

  # Host (e.g /dev/sde)
    $ sudo mkfs.ext4 /dev/sdx
    $ sudo mount /dev/sdx /workspace/mnt

  #   Part of `df -h`
    /dev/sdx        292K   24K  248K   9% /workspace/mnt

  #   dmesg (/dev/sdd, /dev/sde)
    [1116587.199896] usb 1-10: new full-speed USB device number 122 using xhci_hcd
    [1116587.369226] usb 1-10: New USB device found, idVendor=584e, idProduct=5342, bcdDevice= 3.99
    [1116587.369231] usb 1-10: New USB device strings: Mfr=1, Product=2, SerialNumber=3
    [1116587.369232] usb 1-10: Product: Mass Storage
    [1116587.369233] usb 1-10: Manufacturer: NuttX
    [1116587.369234] usb 1-10: SerialNumber: 0101
    [1116587.385275] usb-storage 1-10:1.0: USB Mass Storage device detected
    [1116587.385526] scsi host5: usb-storage 1-10:1.0
    [1116588.423335] scsi 5:0:0:0: Direct-Access     NuttX    Mass Storage     0101 PQ: 0 ANSI: 2
    [1116588.423746] scsi 5:0:0:1: Direct-Access     NuttX    Mass Storage     0101 PQ: 0 ANSI: 2
    [1116588.424001] sd 5:0:0:0: Attached scsi generic sg3 type 0
    [1116588.424181] sd 5:0:0:1: Attached scsi generic sg4 type 0
    [1116588.424305] sd 5:0:0:0: [sdd] Unsupported sector size 256.
    [1116588.425336] sd 5:0:0:1: [sde] 640 512-byte logical blocks: (328 kB/320 KiB)
    [1116588.638620] sd 5:0:0:1: [sde] Write Protect is off
    [1116588.638624] sd 5:0:0:1: [sde] Mode Sense: 0f 00 00 00
    [1116588.858793] sd 5:0:0:0: [sdd] 0 512-byte logical blocks: (0 B/0 B)
    [1116588.858797] sd 5:0:0:0: [sdd] 256-byte physical blocks
    [1116589.078698] sd 5:0:0:0: [sdd] Write Protect is off
    [1116589.078702] sd 5:0:0:0: [sdd] Mode Sense: 0f 00 00 00
    [1116589.298629] sd 5:0:0:0: [sdd] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA
    [1116589.298903] sd 5:0:0:0: [sdd] Attached SCSI disk
    [1116589.518626] sd 5:0:0:1: [sde] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA
    [1116589.972872] sd 5:0:0:1: [sde] Attached SCSI disk
    [1116644.299819] EXT4-fs (sde): mounted filesystem d4e18b90-b0c3-4a0f-8969-2493a41c5e02 r/w without journal. Quota mode: none.

Copy from boards/arm/rp2040/common/src/rp2040_usbmsc.c

Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
 2024-11-27 13:30:44 -03:00
Jinliang Li
37a0445ddb armv8-r/gicv3: support fiq 
1. support fiq decoding and dispatch
2. replace CONFIG_ARMV8R_DECODEFIQ with CONFIG_ARCH_HIPRI_INTERRUPT

Signed-off-by: Jinliang Li <lijinliang1@lixiang.com>
 2024-11-27 14:28:27 +08:00