Commit graph

23032 commits

Author SHA1 Message Date
Eero Nurkkala
e111c9a256 risc-v/mpfs: introduce CONFIG_MPFS_CLKINIT flag
This CONFIG_MPFS_CLKINIT is set with bootloaders by default. However,
this gives an option to have it unset. In some cases, the clocks
may be already set so it becomes unnecessary to re-initialize them.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2024-11-30 03:14:10 +08:00
buxiasen
7a4fac0df6 coredump: add BOARD_CRASHDUMP_CUSTOM support
For only board specific crashdump and no syslog/blk/mtd coredump

Signed-off-by: buxiasen <buxiasen@xiaomi.com>
2024-11-30 03:08:35 +08:00
hujun5
321419491e missing update running_task
This commit fixes the regression from https://github.com/apache/nuttx/pull/14865

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-11-30 02:48:58 +08:00
hujun5
635da96bae xtensa: remove up_set_current_regs/up_current_regs
reason:
up_set_current_regs initially had two functions:

1: To mark the entry into an interrupt state.
2: To record the context before an interrupt/exception. If we switch to a new task, we need to store the upcoming context regs by calling up_set_current_regs(regs).

Currently, we record the context in other ways, so the second function is obsolete. Therefore, we need to rename up_set_current_regs to better reflect its actual meaning, which is solely to mark an interrupt.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-11-30 02:48:58 +08:00
wangmingrong1
137ca05249 arm64/toolchain: Cmake alignment makefile writing
They should be a relationship of choice:
ifeq ($(CONFIG_ARCH_CORTEX_A53),y)
  ARCHCPUFLAGS += -mcpu=cortex-a53
else ifeq ($(CONFIG_ARCH_CORTEX_A55),y)
  ARCHCPUFLAGS += -mcpu=cortex-a55
else ifeq ($(CONFIG_ARCH_CORTEX_A57),y)
  ARCHCPUFLAGS += -mcpu=cortex-a57
else ifeq ($(CONFIG_ARCH_CORTEX_A72),y)
  ARCHCPUFLAGS += -mcpu=cortex-a72
else ifeq ($(CONFIG_ARCH_CORTEX_R82),y)
  ARCHCPUFLAGS += -mcpu=cortex-r82
else ifeq ($(CONFIG_ARCH_ARMV8A),y)
  ARCHCPUFLAGS += -march=armv8-a
else ifeq ($(CONFIG_ARCH_ARMV8R),y)
  ARCHCPUFLAGS += -march=armv8-r
endif

Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com>
2024-11-29 18:37:21 +08:00
chao an
8257b11944 arm/isr: move up_set_interrupt_context() to chip define
up_set_interrupt_context() is chip specific implement, move this function to correct place

Signed-off-by: chao an <anchao@lixiang.com>
2024-11-29 18:37:08 +08:00
hujun5
d89f22eb98 arm64: remove g_running_tasks[this_cpu()] = NULL
reason:
We hope to keep g_running_tasks valid forever.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-11-29 10:04:50 +01:00
Jouni Ukkonen
1bfe8bcf71 arch/arm64/imx9: Boot, move mmu init to correct place
MMU init must be after ddrinit.

Signed-off-by: Jouni Ukkonen <jouni.ukkonen@unikie.com>
2024-11-29 10:03:28 +01:00
simbit18
9c9b945876 fix nxstyle
Removed extra spaces from .h and .c files
2024-11-28 20:40:13 +08:00
YAMAMOTO Takashi
388ab6c2db esp32s3: don't clear pending interrupts on eg. up_putc
Fixes https://github.com/apache/nuttx/issues/14872
2024-11-28 19:00:21 +08:00
hujun5
0bba53ce12 remove redundant scheduling records
reason:
Since the scheduling records have already been moved to the interrupt exit in this submission,
we need to delete the original records' locations.
This commit fixes the regression from https://github.com/apache/nuttx/pull/13651

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-11-28 18:56:13 +08:00
guoshichao
a2fcd9862c nuttx/arch: remove the custom board check in up_testset implementation
the up_testset implementation is common code, should not add custom
board check

Signed-off-by: guoshichao <guoshichao@xiaomi.com>
2024-11-28 15:06:57 +08:00
Jouni Ukkonen
6b38b83331 arch/arm64/imx9: Clear DMA channel interrupts on init
Avoid spurious interrupts on reboot

Signed-off-by: Jouni Ukkonen <jouni.ukkonen@unikie.com>
2024-11-28 15:02:15 +08:00
Jouni Ukkonen
1d23baaa63 arch/arm64/imx9/imx9_flexspi: Replace memcpy by while loop
libc memcpy cannot access fspi memory space correctly
remove unnecessary debugassert and cache operations

Signed-off-by: Jouni Ukkonen <jouni.ukkonen@unikie.com>
2024-11-28 15:00:33 +08:00
simbit18
0476895c0d fix nxstyle
Remove TABs
2024-11-28 09:14:49 +08:00
Ville Juven
51171d66f2 riscv/riscv_ipi.h: Do not write to CSR_MIP.MSIP as it is read-only
From the RISV-V Privileged Spec v1.10 (3.1.14 MIP/MIE):

Only the bits corresponding to lower-privilege software interrupts
(USIP, SSIP), timer interrupts (UTIP, STIP), and external interrupts
(UEIP, SEIP) in mip are writable through this CSR address; the
remaining bits are read-only.

Thus, it is futile to write to the M-mode status bit via the CSR, only
access via RISCV_IPI is valid.
2024-11-28 09:14:07 +08:00
p-szafonimateusz
eca40ff053 arch/x86_64/intel64: re-enable interrupts before syscall handle
arch/x86_64/intel64: re-enable interrupts before syscall handle
2024-11-27 13:32:23 -03:00
p-szafonimateusz
908ac756ea arch/x86_64/intel64: remove unnecessary nested syscalls logic
remove unnecessary nested syscalls logic, it's already handled different way
2024-11-27 13:32:23 -03:00
p-szafonimateusz
e7d6f2c044 arch/x86_64/intel64_irq.c: remove some magic numbers
arch/x86_64/intel64_irq.c: remove some magic numbers

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-11-27 13:32:23 -03:00
p-szafonimateusz
e95ea6fbc4 arch/x86_64: handle TLB shootdown
arch/x86_64: handle TLB shootdown

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-11-27 13:32:23 -03:00
p-szafonimateusz
ce22c28e88 arch/x86_64: add kernel stack support
arch/x86_64: add kernel stack support

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-11-27 13:32:23 -03:00
p-szafonimateusz
712e8d9cc7 arch/x86_64: add kernel build support
arch/x86_64: add kernel build support

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-11-27 13:32:23 -03:00
p-szafonimateusz
8702fbef8d arch/x86_64/include/intel64/arch.h: align definitions
arch/x86_64/include/intel64/arch.h: align definitions

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-11-27 13:32:23 -03:00
p-szafonimateusz
d51ceccd7b arch/x86_64: add syscalls support
arch/x86_64: add syscalls support

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-11-27 13:32:23 -03:00
p-szafonimateusz
7f4279b8af arch/x86_64/: fix broken set_cr3()
arch/x86_64/: fix broken set_cr3()

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-11-27 13:32:23 -03:00
Jinliang Li
37a0445ddb armv8-r/gicv3: support fiq
1. support fiq decoding and dispatch
2. replace CONFIG_ARMV8R_DECODEFIQ with CONFIG_ARCH_HIPRI_INTERRUPT

Signed-off-by: Jinliang Li <lijinliang1@lixiang.com>
2024-11-27 14:28:27 +08:00
p-szafonimateusz
825ba8ed7b arch/x86_64/intel64: fix revoke_low_memory
fix revoke_low_memory, problem found by Xiangzhen Ouyang.

g_pt_low mapping is removed during revoke_low_memory so we can't access this memory area with 1:1 mapping.
This logic has been broken for a long time, but for some reason it worked without any crash at boot.

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-11-27 03:28:37 +08:00
p-szafonimateusz
894b0f956b arch/x86_64/intel64: up_disable_irq should work from any CPU
simplify interrupt logic and allow any CPU
to disable interrupt, not only CPU that enabled it.

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-11-27 03:03:05 +08:00
hujun5
ef313755e7 sched: replace up_cpu_index with this_cpu
Make this_cpu is arch independent and up_cpu_index do that.
In AMP mode, up_cpu_index() may return the index of the physical core.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-11-27 03:00:32 +08:00
simbit18
430c2ecf46 arch/risc-v/src/cmake/Toolchain.cmake: Msys2 Cmake fixed nuttx/config.h: No such file or directory
fixed
/qemu-rv/qemu_rv_head.S:25:10: fatal error: nuttx/config.h: No such file or directory
   25 | #include <nuttx/config.h>
      |          ^~~~~~~~~~~~~~~~
compilation terminated.

added

# override the responsible file flag

if(CMAKE_GENERATOR MATCHES "Ninja")
  set(CMAKE_C_RESPONSE_FILE_FLAG "$DEFINES $INCLUDES $FLAGS @")
  set(CMAKE_CXX_RESPONSE_FILE_FLAG "$DEFINES $INCLUDES $FLAGS @")
  set(CMAKE_ASM_RESPONSE_FILE_FLAG "$DEFINES $INCLUDES $FLAGS @")
endif()
2024-11-27 02:35:48 +08:00
hujun5
610efc8f1a arm: remove up_set_current_regs/up_current_regs
reason:
up_set_current_regs initially had two functions:

1: To mark the entry into an interrupt state.
2: To record the context before an interrupt/exception. If we switch to
   a new task, we need to store the upcoming context regs by calling up_set_current_regs(regs).

Currently, we record the context in other ways, so the second function is obsolete.
Therefore, we need to rename up_set_current_regs to better reflect its actual meaning,
which is solely to mark an interrupt.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-11-26 20:04:54 +08:00
chao an
4dda9800b4 espressif/mcpwm: fix compile error
continue work of PR #14938

Signed-off-by: chao an <anchao@lixiang.com>
2024-11-26 16:34:19 +08:00
hujun5
111a0746c2 arm64: change name saved_reg to saved_regs
reason:
saved_regs is more meaningful and used by all other arch

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-11-26 10:09:31 +08:00
hujun5
53548509b1 fix build error
common/espressif/esp_rmt.c: In function 'rmt_set_tx_thr_intr_en':
common/espressif/esp_rmt.c:654:48: error: passing argument 1 of 'spin_lock_irqsave' makes pointer from integer without a cast [-Werror=int-conversion]
  654 |       flags = spin_lock_irqsave(g_rmtdev_common.rmt_spinlock);
      |                                 ~~~~~~~~~~~~~~~^~~~~~~~~~~~~
      |                                                |
      |                                                spinlock_t {aka unsigned char}
/home/hujun5/downloads1/vela_sim/nuttx/include/nuttx/spinlock.h:617:55: note: expected 'volatile spinlock_t *' {aka 'volatile unsigned char *'} but argument is of type 'spinlock_t' {aka 'unsigned char'}
  617 | irqstate_t spin_lock_irqsave(FAR volatile spinlock_t *lock)
      |                                  ~~~~~~~~~~~~~~~~~~~~~^~~~
CC:  nsh_script.c common/espressif/esp_rmt.c:662:48: error: passing argument 1 of 'spin_lock_irqsave' makes pointer from integer without a cast [-Werror=int-conversion]
  662 |       flags = spin_lock_irqsave(g_rmtdev_common.rmt_spinlock);
      |                                 ~~~~~~~~~~~~~~~^~~~~~~~~~~~~
      |                                                |
      |                                                spinlock_t {aka unsigned char}
/home/hujun5/downloads1/vela_sim/nuttx/include/nuttx/spinlock.h:617:55: note: expected '

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-11-26 09:03:29 +08:00
hujun5
34e79f9618 spinlock: use spin_lock_init replace spin_initialize
reason:
1: spin_lock_init and spin_initialize have similar functionalities.
2: spin_lock and spin_unlock should be called in matching pairs.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-11-26 00:02:44 +08:00
hujun5
03f430edf7 fix some build error
hujun5@hujun5-OptiPlex-7070:~/downloads1/vela_sim/nuttx$ make -j12
chip/qemu_boot.c: In function 'up_cpu_start':
chip/qemu_boot.c:102:3: warning: implicit declaration of function 'sched_note_cpu_start' [-Wimplicit-function-declaration]
  102 |   sched_note_cpu_start(this_task(), cpu);
      |   ^~~~~~~~~~~~~~~~~~~~
chip/qemu_boot.c:102:24: warning: implicit declaration of function 'this_task' [-Wimplicit-function-declaration]
  102 |   sched_note_cpu_start(this_task(), cpu);
      |                        ^~~~~~~~~

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-11-25 17:10:50 +08:00
hujun5
fccd908114 arch/arm64: syscall SYS_switch_context and SYS_restore_context use 0 para
reason:
simplify context switch
sys_call0(SYS_switch_context)
sys_call0(SYS_restore_context)

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-11-23 12:22:21 +08:00
hujun5
f4d212fd6d arm64: remove up_set_current_regs/up_current_regs
reason:
up_set_current_regs initially had two functions:

1: To mark the entry into an interrupt state.
2: To record the context before an interrupt/exception. If we switch to
a new task, we need to store the upcoming context regs by calling up_set_current_regs(regs).

Currently, we record the context in other ways, so the second function is obsolete. Therefore,
we need to rename up_set_current_regs to better reflect its actual meaning, which is solely to mark an interrupt.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-11-23 02:05:56 +02:00
cuiziwei
8e58245524 sim: Fix sim m32 start up crash issue.
After compilation, when starting nsh, the following crash occurs.
==2500151==Shadow memory range interleaves with an existing memory mapping. ASan cannot proceed correctly. ABORTING.
==2500151==ASan shadow was supposed to be located in the [0x1ffff000-0x3fffffff] range.
==2500151==Process memory map follows:
0x30000000-0x33dd4000 /nuttx/nuttx

To avoid overlaps, change the starting address of the text segment.

Using Ttext-segment=0x30000000 causes a crash when starting the 32-bit SIM.
Using -Ttext-segment=0x50000000 causes a crash when starting the 64-bit SIM.
Setting -Ttext-segment=0x40000000 resolves all issues perfectly.

Signed-off-by: cuiziwei <cuiziwei@xiaomi.com>
2024-11-23 01:47:34 +08:00
yinshengkai
0194c2f88a gcov: update gcov compilation parameters
profile-generate is used to generate compilation feedback optimization data, not just code coverage data

It will rely on the toolchain library:
nuttx/libs/libc/misc/lib_utsname.c:94:(.text.uname+0x2c): undefined reference to `__gcov_indirect_call_profiler_v4'
arm-none-eabi-ld: nuttx/libs/libc/misc/lib_utsname.c:113:(.text.uname+0x178): undefined reference to `__gcov_indirect_call'
arm-none-eabi-ld: nuttx/libs/libc/misc/lib_utsname.c:113:(.text.uname+0x188): undefined reference to `__gcov_time_profiler_counter'
arm-none-eabi-ld: nuttx/staging/libc.a(lib_utsname.o):(.data..LPBX0+0x30): undefined reference to `__gcov_merge_time_profile'

Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
2024-11-22 19:08:08 +08:00
wangmingrong1
1f2d1e97e8 x86-64: Added KASan compilation options
Sorry for this commit: 6cd43777c3
This is the real x86-64 modification, and this patch is x86
Fortunately, except for the error in the previous modification, the actual architecture is supported

Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com>
2024-11-22 15:06:02 +08:00
simbit18
d16de91e39 [MSYS2] CMake+Ninja Fix arm-none-eabi-ar: Argument list too long
This issue is related to the Arm toolchain for Windows which is available for x86 host architecture only (compatible with x86_64)

Windows (mingw-w64-i686) hosted cross toolchains
AArch32 bare-metal target (arm-none-eabi)

Issue
/bin/sh: line 1: /home/nuttx/nuttxnew/tools/gcc-arm-none-eabi/bin/arm-none-eabi-ar: Argument list too long

On Windows, arm-none-eabi-ar can only accept strings up to a maximum length of 32,768 characters.

We could suppress the 32K include string limitation by setting the CMake variable CMAKE_NINJA_FORCE_RESPONSE_FILE to ON.

This is unfortunately not enough!!! ): In the build phase this error comes out

$ cmake --build build
[2/1025] Building ASM object arch/CMakeFiles/arch.dir/arm/src/armv7-m/arm_exception.S.obj
FAILED: arch/CMakeFiles/arch.dir/arm/src/armv7-m/arm_exception.S.obj
/home/nuttx/nuttxnew/tools/gcc-arm-none-eabi/bin/arm-none-eabi-gcc.exe @arch/CMakeFiles/arch.dir/arm/src/armv7-m/arm_exception.S.obj.rsp -MD -MT arch/CMakeFiles/arch.dir/arm/src/armv7-m/arm_exception.S.obj -MF arch/CMakeFiles/arch.dir/arm/src/armv7-m/arm_exception.S.obj.d -o arch/CMakeFiles/arch.dir/arm/src/armv7-m/arm_exception.S.obj -c /home/nuttx/nxninja/nuttx/arch/arm/src/armv7-m/arm_exception.S
C:/msys64/home/nuttx/nxninja/nuttx/arch/arm/src/armv7-m/arm_exception.S:42:10: fatal error: nuttx/config.h: No such file or directory
   42 | #include <nuttx/config.h>
      |          ^~~~~~~~~~~~~~~~
compilation terminated.

The Workround I found to solve this problem is to overwrite
the responsible file flag CMAKE_${lang}_RESPONSE_FILE_FLAG with $DEFINES $INCLUDES $FLAGS

Maybe there is a better solution but this one it works. :)
2024-11-21 19:18:38 -03:00
wangmingrong1
6cd43777c3 x86-64: Support symbol table and kasan global variables cross-border detection
1. Add kasan compilation options
2. Modify the link process to support symbol tables and kasan global variables cross-border detection

Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com>
2024-11-22 00:01:36 +08:00
Jouni Ukkonen
085830612c arch/arm64/imx9: Fix cntfrq_el0 to correct value
Read base frequency from system counter0 and write it
to arm core register. This corrects timers to work properly
Then enable counting.

Signed-off-by: Jouni Ukkonen <jouni.ukkonen@unikie.com>
2024-11-21 11:26:45 -03:00
guoshichao
f6cfcfa39f armv6-m: fix the incorrect stub-function entry address of svc call
the stub-function entry address is stored in r4, we should branch to the
stub-function with blx r4, not r5

Signed-off-by: guoshichao <guoshichao@xiaomi.com>
2024-11-21 20:08:42 +08:00
Peter Bee
3e6913775d fix(rp2350): should copy data before init clock
Signed-off-by: Peter Bee <peter@PeterdeMac-mini.local>
2024-11-21 20:00:17 +08:00
cuiziwei
f0e03f6c3c Unify the linking options for 32-bit and 64-bit to text-segment=0x30000000.
In order to be compatible with 32-bit and 64-bit compilation, set the text-segment to 0x30000000.

Signed-off-by: cuiziwei <cuiziwei@xiaomi.com>
2024-11-21 16:13:52 +08:00
cuiziwei
feb38c43f2 sim/m64: Fix ld error.
/usr/bin/ld: nuttx.rel: relocation R_X86_64_32S against `.rodata' can not be used when making a PIE object; recompile with -fPIE
/usr/bin/ld: failed to set dynamic section sizes: bad value

Signed-off-by: cuiziwei <cuiziwei@xiaomi.com>
2024-11-21 12:13:14 +08:00
stbenn
9cd0ea32ea arch/stm32h5: Add timer register hardware file
This commit adds register definitions for advanced, basic, and general purpose timers. Formatting convention was taken from the H7 hardware timer header.
2024-11-21 10:54:10 +08:00
simbit18
7df0e945ad Fix Kconfig style
Remove spaces from Kconfig files
Add TABs
Replace help => ---help---
Remove extra TABs
Add comments
2024-11-20 16:45:40 -03:00