Created stm32h5 directory to add support for the H5 chip, and used a Nucleo-H563ZI dev board during development. The goal was to get a working nutshell through the STLink connector on the board.
Remove board/docs changes for PR update.
Squash commits into one for PR guideline conformity.
trying to fix build issues
Fix format from review
nucleo-144 combines 3 different ST boards. This approach is inconsistent with
the support for the rest of the nucleo boards, where each board is in separate folders.
Also nucleo-144 is no longer reserved for STM32F7 chips but other families also use this format.
After this commit nucleo-144 is divided into 3 boards:
- nucleo-f746zg
- nucleo-f767zi
- nucleo-f722ze
Follow the elf format, correct the memory region flag description:
Executable 0x1, Writable 0x2, Readable 0x4
Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
Summary
MPS-521 support Dual Cortex-M33 and maybe suitable for AMP-like
case which is for AUTO OS, the change
1. add support for single core at msp-521 with nsh bringup
2. testing with ostest
TODO:
Dual core support for flat-build
Dual CORE support for Protected Build
Signed-off-by: qinwei1 <qinwei1@xiaomi.com>
Signed-off-by: ligd <liguiding1@xiaomi.com>
This interface may be used by application specific logic to start
specified slave cpu core under the pseudo AMP case which is different
with armv7-a/armv8-a SMP. Support for this function is required by
board-level logic if CONFIG_BOARDCTL_START_CPU is selected.
Signed-off-by: wanggang26 <wanggang26@xiaomi.com>
reason:
BOARDIOC_SPINLOCK can support the combined semantics
of disabling interrupts (irq), trylock, and spinlock.
Signed-off-by: hujun5 <hujun5@xiaomi.com>
The ESP32-S3-Korvo-2 is a multimedia development board based on the
ESP32-S3 chip. It is equipped with a two-microphone array which is
suitable for voice recognition and near/far-field voice wake-up
applications. The board integrates multiple peripherals such as
LCD, camera, and microSD card. It also supports JPEG video stream
processing. With all of its outstanding features, the board is an
ideal choice for the development of low-cost and low-power
network-connected audio and video products.
- This PR adds the LED Driver for QEMU RISC-V 32-bit and 64-bit (User LEDs and Auto LEDs)
- QEMU RISC-V LED Driver will be used by the Rust Blinky App for Google Summer of Code
- Blinking the LED is probably the most common Embedded Demo, and now it's supported by QEMU RISC-V
- We added NuttX Configs `rv-virt:leds` and `rv-virt:leds64` to support User LEDs for 32-bit and 64-bit RISC-V
- Turning on/off a Simulated User LED will print a log message: "LED 1 set to 1"
- The code is derived from NuttX PinePhone LED Driver
- This PR adds the LED Driver for Ox64 Board (User LEDs and Auto LEDs)
- Ox64 LED Driver will be used by the Rust Blinky App for Google Summer of Code
- User LED 1 is configured for GPIO 29. Other User LEDs and Auto LEDs shall be configured by the NuttX Dev.
- The code is derived from NuttX PinePhone LED Driver
As suggested in PR:12530, changed the default names of ESP32S3WROOM chips to ESP32S3WROOM1N4,
ESP32S3WROOM2N16R8, ESP32S3WROOM2N32R8, ESP32S3MINI1N8.
Also regenerated all the defconfigs for board configurations.
Added a custom ESP32S3 module for custom flash configurations.
Declared ESP32S3_PSRAM_8M variable with prompt
This PR adds support for Milk-V Duo S 64-bit RISC-V SBC, based on SOPHGO SG2000 SoC (T-Head C906 Core). Most of the code is derived from NuttX for Ox64 BL808. The source files are explained in the articles here: https://github.com/lupyuen/nuttx-sg2000
Modified Files:
`boards/Kconfig`: Added Milk-V Duo S board
`arch/risc-v/src/sg2000/sg2000_timerisr.c`: Fixed MTIMER_FREQ for sleep() to work correctly
New Files in boards/risc-v/sg2000/milkv_duos:
`src/sg2000_appinit.c`: Startup Code
`include/board.h`: Milk-V Duo S Definitions
`include/board_memorymap.h`: Memory Map
`src/etc/init.d/rc.sysinit`, `rcS`: Startup Script
`src/.gitignore`: Ignore the tmp filesystem
`scripts/ld.script`: Linker Script
`scripts/Make.defs`: Milk-V Duo S Makefile
`src/Makefile`: Milk-V Duo S Makefile
`Kconfig`: Milk-V Duo S Config
`configs/nsh/defconfig`: Build Config for `milkv_duos:nsh`
Updated Documentation:
`platforms/risc-v/sg2000/index.rst`: New page for SOPHGO SG2000 SoC
`platforms/risc-v/sg2000/boards/milkv_duos/index.rst`: Building and booting NuttX for Milk-V Duo S
This is copy of raspberrypi-pico with all occurences of raspberrypi replaced by
w5500-evb. Only the usbnsh defconfig is available, which is based on the
raspberrypi-pico:usbnsh defconfig, but enables the WIZnet W5500 Ethernet chip.
TCP/IP for IPv4 and IPv6 is enabled.
Signed-off-by: Michael Jung <michael.jung@secore.ly>
This patch add support to use buttons example on raspberrypi-pico.
Note: unfortunately the raspberry-pico board doesn't have usables
buttons, then you need to add external buttons connected to GPIO16
and GPIO17.
Signed-off-by: Alan C. Assis <acassis@gmail.com>
Adds board definition for imx93-evk board
- Support for the Cortex-A55 core in i.MX93, support for the Cortex-M33
core is _not_ provided
- "nsh" profile is provided, this includes a minimalistic feature set
which boots the SoM to nsh console
- A bootloader is required, u-boot has been tested
Add support for tricore TC397
1. Porting based on AURIX TC397 KIT_A2G_TC397_5V_TFT evaluation board
https://www.infineon.com/cms/en/product/evaluation-boards/kit_a2g_tc397_5v_tft/
2. In order to avoid license and coding style issues, The chip-level code
still uses the implementation of AURIX Development Studio SDK.
The SDK package will be downloaded as a third-party package during compilation:
https://github.com/anchao/tc397_sdk
3. Single core only, SMP implementation will be provided in the future.
4. Implemented the basic System Timer, ASCLIN UART driver.
5. Only the Tasking tool chain is supported (ctc/ltc, license maybe required)
6. 'ostest' can be completed on the TC397 development board.
How to run?
1. Setup the tasking toolchain and license
$ export TSK_LICENSE_KEY_SW160800=d22f-7473-ff5d-1b70
$ export TSK_LICENSE_SERVER=192.168.36.12:9090
2. Build nuttx ELF
$ ./tools/configure.sh tc397/nsh
$ make -j
...
artc I800: creating archive libc_fpu.a
LD: nuttx
3. Switch to windows PC, setup AURIX-studio to Debugger Launcher
4. Replace runing ELF to nuttx, and re-download ELF
Signed-off-by: chao an <anchao@lixiang.com>
This commit adds support to autoleds and userleds for
raspberrypi-pico board. It uses the board LED connected
to GPIO 25.
Signed-off-by: Alan C. Assis <acassis@gmail.com>
The code is mainly derived from the NuttX qemu-rv/rv-virt codebase.
Major changes:
- boards/Kconfig: add new BOARD_K230_CANMV
- arch/risc-v/Kconfig: add new CHIP_K230 chip and ARCH_RV_MMIO_BITS
- arch/risc-v/src/common/riscv_mtimer.c: use ARCH_RV_MMIO_BITS to
select MMIO access width
New additions:
- arch/risc-v/include/k230/: k230 SoC definitions
- arch/risc-v/src/k230/: k230 SoC sources
- boards/risc-v/k230/canmv230/: CanMV-K230 board sources and configs
- Documentation/platforms/risc-v/k230/: simple doc
Note that only FLAT build works for canmv230 now.
This PR has changes in RiscV common layer thus may affect other RiscV ports
It changes the mtime/mtimecmp access control from using config ARCH_RV64 to
newly intorduced config ARCH_RV_MMIO_BITS.
Original design uses ARCH_RV64 to select 64bit MMIO in riscv_mtimer.c, this
can't cope with the situation with K230 --- it has ARCH_RV64 but only can do
32bit MMIO. So a new ARCH_RV_MMIO_BITS config has been introduced. Its value
depicts the MMIO width in bits. The MMIO_BITS defaults to 32/64 for RV32/
RV64 respectively. This allows the macro to replace current use of ARCH_RV64
in riscv_mtimer.c.
The new MMIO_BITS config is a derived one, and for RiscV chips with
equal CPU and MMIO widths there is no need to explicitly set it as the
default rule will do that. Only chips with different CPU and MMIO widths
need set it in Kconfig.
So by design this change should be safe but RiscV ports should be checked.
"ostest" verification has been done for:
- canmv230/nsh
- rv-vivt/nsh
- rv-virt/nsh64
configuration generation and manual check of derived RV_MMIO_BITS has been
done for:
- star64/nsh
- arty_a7/nsh
- bl602evb/nsh
Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
This PR adds support for PINE64 Ox64 64-bit RISC-V SBC, based on Bouffalo Lab BL808 SoC (T-Head C906 Core). Most of the code is derived from NuttX for Star64 JH7110. The source files are explained in the articles here: https://github.com/lupyuen/nuttx-ox64
### Modified Files
`boards/Kconfig`: Added Ox64 board
### New Files in boards/risc-v/bl808/ox64
`src/bl808_appinit.c`: Startup Code
`include/board.h`: Ox64 Definitions
`include/board_memorymap.h`: Memory Map
`src/etc/init.d/rc.sysinit`, `rcS`: Startup Script
`src/.gitignore`: Ignore the tmp filesystem
`scripts/ld.script`: Linker Script
`scripts/Make.defs`: Ox64 Makefile
`src/Makefile`: Ox64 Makefile
`Kconfig`: Ox64 Config
`configs/nsh/defconfig`: Build Config for `ox64:nsh`
### Updated Documentation
`platforms/risc-v/bl808/index.rst`: New page for Bouffalo Lab BL808 SoC
`platforms/risc-v/bl808/boards/ox64/index.rst`: Building and booting NuttX for Ox64
`platforms/risc-v/jh7110/boards/star64/index.rst`: Fix typo
